#define OFS_FAN_INST 0 /* Is 0 because plreg base will be set at INST */ #define OFS_FAN_FAIL 2 /* Is 2 bytes after base */ #define OFS_SEVSTAT 0 /* Is 0 because fn2 base will be set at SEVSTAT */ #define POWER_BIT 24
/* * Check the power status as if the platform is off the value * reported for the PWM will be incorrect. Report fan as * disabled.
*/
val = readl(drvdata->fn2 + OFS_SEVSTAT);
staticint gxp_pwm_write(struct device *dev, u32 attr, int channel, long val)
{ struct gxp_fan_ctrl_drvdata *drvdata = dev_get_drvdata(dev);
switch (attr) { case hwmon_pwm_input: if (val > 255 || val < 0) return -EINVAL;
writeb(val, drvdata->base + channel); return 0; default: return -EOPNOTSUPP;
}
}
staticint gxp_fan_ctrl_write(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long val)
{ switch (type) { case hwmon_pwm: return gxp_pwm_write(dev, attr, channel, val); default: return -EOPNOTSUPP;
}
}
staticint gxp_fan_read(struct device *dev, u32 attr, int channel, long *val)
{ switch (attr) { case hwmon_fan_enable:
*val = fan_enabled(dev, channel); return 0; case hwmon_fan_fault:
*val = fan_failed(dev, channel); return 0; default: return -EOPNOTSUPP;
}
}
staticint gxp_pwm_read(struct device *dev, u32 attr, int channel, long *val)
{ struct gxp_fan_ctrl_drvdata *drvdata = dev_get_drvdata(dev);
u32 reg;
/* * Check the power status of the platform. If the platform is off * the value reported for the PWM will be incorrect. In this case * report a PWM of zero.
*/
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