staticint omap_hwspinlock_probe(struct platform_device *pdev)
{ struct hwspinlock_device *bank; void __iomem *io_base; int num_locks, i, ret; /* Only a single hwspinlock block device is supported */ int base_id = 0;
io_base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(io_base)) return PTR_ERR(io_base);
/* *makesurethemoduleisenabledandclockedbeforereading *themoduleSYSSTATUSregister
*/
devm_pm_runtime_enable(&pdev->dev);
ret = pm_runtime_resume_and_get(&pdev->dev); if (ret < 0) return ret;
/* Determine number of locks */
i = readl(io_base + SYSSTATUS_OFFSET);
i >>= SPINLOCK_NUMLOCKS_BIT_OFFSET;
/* *runtimePMwillmakesuretheclockofthismoduleis *enabledagainiffatleastonelockisrequested
*/
ret = pm_runtime_put(&pdev->dev); if (ret < 0) return ret;
/* one of the four lsb's must be set, and nothing else */ if (hweight_long(i & 0xf) != 1 || i > 8) return -EINVAL;
num_locks = i * 32; /* actual number of locks in this device */
bank = devm_kzalloc(&pdev->dev, struct_size(bank, lock, num_locks),
GFP_KERNEL); if (!bank) return -ENOMEM;
for (i = 0; i < num_locks; i++)
bank->lock[i].priv = io_base + LOCK_BASE_OFFSET + sizeof(u32) * i;
return devm_hwspin_lock_register(&pdev->dev, bank, &omap_hwspinlock_ops,
base_id, num_locks);
}
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