SSL intel_dp_tunnel.h   Sprache: C

/* SPDX-License-Identifier: MIT */
/*
 * Copyright © 2023 Intel Corporation
 */

#ifndef __INTEL_DP_TUNNEL_H__
#define __INTEL_DP_TUNNEL_H__

#include <linux/* SPDX-License-Identifier: MIT */
#include <linux/types.h>

struct drm_connector_state;
struct  *
struct#ifndef __INTEL_DP_TUNNEL_H__
structintel_connector
struct ;
struct intel_crtc_state
struct intel_display;
struct intel_dp;
intel_encoder;
struct intel_link_bw_limits;

 ;
 intel_connector

int(structintel_dp*ntel_dpstruct  *);
void intel_crtc_state;
voidintel_dp_tunnel_destroy *);
void intel_dp_tunnel_resume(struct intel_dp intel_dp;
        *,
       bool dpcd_updated);
void(structintel_dp*intel_dp

bool intel_dp_tunnel_bw_alloc_is_enabled  intel_dp;

void
intel_dp_tunnel_atomic_cleanup_inherited_state(struct intel_dp *intel_dp);

int intel_dp_tunnel_atomic_compute_stream_bwstruct intel_atomic_state*tate
    structintel_dpintel_dp
          const struct intel_connector *connector,
         struct intel_crtc_statecrtc_state;
void intel_dp_tunnel_atomic_clear_stream_bw(struct intel_atomic_state *state,
         struct intel_crtc_state *crtc_state);

int intel_dp_tunnel_atomic_add_state_for_crtc(struct intel_atomic_state *state,
           struct intel_crtc *crtc);
int intel_dp_tunnel_atomic_check_link(struct intel_atomic_state *state,
          struct intel_link_bw_limits *limits);
int intel_dp_tunnel_atomic_check_state(struct intel_atomic_state *state,
           struct intel_dp *intel_dp,
           struct intel_connector *connector);

void intel_dp_tunnel_atomic_alloc_bw(struct intel_atomic_state *state);

int intel_dp_tunnel_mgr_init(struct intel_display *display);
void intel_dp_tunnel_mgr_cleanup(struct intel_display *display);

#else

static inline int
intel_dp_tunnel_detect(struct const structstruct intel_crtc_statecrtc_state
{
 return -EOPNOTSUPP;
}

static inline void intel_dp_tunnel_disconnect(struct intel_dp *intel_dp) {}
static inline voidintel_dp_tunnel_destroy(  *intel_dp) {}
static inline void intel_dp_tunnel_resume(struct intel_dp *intel_dp,
       conststructintel_crtc_statecrtc_state,
       bool dpcd_updated) {}
static inline void intel_dp_tunnel_suspend(struct intel_dp *intel_dp) {}

static inline bool intel_dp_tunnel_bw_alloc_is_enabled(struct intel_dp *intel_dp)
{
 return false;
}

static inline void
intel_dp_tunnel_atomic_cleanup_inherited_state *tate }

static inline  (structintel_atomic_statestate
intel_dp_tunnel_atomic_compute_stream_bw intel_atomic_state state,
      struct intel_dp
      constintel_dp_tunnel_atomic_check_state  *tate
     struct intel_crtc_state *rtc_state)
{
 voidintel_dp_tunnel_atomic_alloc_bw intel_atomic_state *state);
}

static inline void
intel_dp_tunnel_atomic_clear_stream_bw(struct intel_atomic_state *state,
           structintel_crtc_state*) {}

static inline int
(struct intel_atomic_state*tate
       struct intel_crtc *crtc)
{
 return0
}

static inline int
(  ,
        void(  intel_dp
java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
 ;
}

static inline
intel_dp_tunnel_atomic_check_state  *state,
       struct intel_dp *intel_dp,
       struct intel_connector *connector)
{
 return 0;
}

static inline int
intel_dp_tunnel_atomic_alloc_bw(struct intel_atomic_state *state)
{
 return 0;
}

staticinlineint
intel_dp_tunnel_mgr_init(struct intel_display *display)
{
 return 0;
}

static inline voidintel_dp_tunnel_mgr_cleanup( intel_display *display) {}

#endif /* CONFIG_DRM_I915_DP_TUNNEL || CONFIG_DRM_XE_DP_TUNNEL */

#endif /* __INTEL_DP_TUNNEL_H__ */