/* * Copyright © 2018, VideoLAN and dav1d authors * Copyright © 2019, Martin Storsjo * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * * 1. Redistributions of source code must retain the above copyright notice, this * list of conditions and the following disclaimer. * * 2. Redistributions in binary form must reproduce the above copyright notice, * this list of conditions and the following disclaimer in the documentation * and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. "src/arm/asm.S" "util.S" sub w3, w3, #25word 640b - ipred_dc_128_tblword 320b - ipred_dc_128_tblword 160b - ipred_dc_128_tblword 80b - ipred_dc_128_tblword 40b - ipred_dc_128_tblsub w3, w3, #25word 640b - ipred_v_tblword 320b - ipred_v_tblword 160b - ipred_v_tblword 80b - ipred_v_tblword 40b - ipred_v_tblsub w3, w3, #25sub x2, x2, #4word 640b - ipred_h_tblword 320b - ipred_h_tblword 160b - ipred_h_tblword 80b - ipred_h_tblword 40b - ipred_h_tblsub w3, w3, #25word 640b - ipred_dc_top_tblword 320b - ipred_dc_top_tblword 160b - ipred_dc_top_tblword 80b - ipred_dc_top_tblword 40b - ipred_dc_top_tblsub x2, x2, w4, uxtwsub w3, w3, #20 // 25 leading bits, minus table offset 5sub w7, w7, #25word L(ipred_dc_left_h64) - ipred_dc_left_tblword L(ipred_dc_left_h32) - ipred_dc_left_tblword L(ipred_dc_left_h16) - ipred_dc_left_tblword L(ipred_dc_left_h8) - ipred_dc_left_tblword L(ipred_dc_left_h4) - ipred_dc_left_tblword L(ipred_dc_left_w64) - ipred_dc_left_tblword L(ipred_dc_left_w32) - ipred_dc_left_tblword L(ipred_dc_left_w16) - ipred_dc_left_tblword L(ipred_dc_left_w8) - ipred_dc_left_tblword L(ipred_dc_left_w4) - ipred_dc_left_tblsub x2, x2, w4, uxtwsub w3, w3, #20 // 25 leading bits, minus table offset 5sub w6, w6, #25word L(ipred_dc_h64) - ipred_dc_tblword L(ipred_dc_h32) - ipred_dc_tblword L(ipred_dc_h16) - ipred_dc_tblword L(ipred_dc_h8) - ipred_dc_tblword L(ipred_dc_h4) - ipred_dc_tblword L(ipred_dc_w64) - ipred_dc_tblword L(ipred_dc_w32) - ipred_dc_tblword L(ipred_dc_w16) - ipred_dc_tblword L(ipred_dc_w8) - ipred_dc_tblword L(ipred_dc_w4) - ipred_dc_tblsub w9, w9, #25sub x2, x2, #4Set up pointers for four rows in parallel; x0, x6, x5, x10sub x1, x1, w3, uxtwsub x8, x8, w9, uxtwword 640b - ipred_paeth_tblword 320b - ipred_paeth_tblword 160b - ipred_paeth_tblword 80b - ipred_paeth_tblword 40b - ipred_paeth_tblsub x12, x2, w4, uxtwsub w9, w9, #25sub x2, x2, #4sub x2, x2, #4sub x2, x2, #2sub x1, x1, w3, uxtwsub x8, x8, w9, uxtwsub x10, x10, w9, uxtwword 640b - ipred_smooth_tblword 320b - ipred_smooth_tblword 160b - ipred_smooth_tblword 80b - ipred_smooth_tblword 40b - ipred_smooth_tblsub x8, x2, w4, uxtwsub w9, w9, #25Set up pointers for four rows in parallel; x0, x6, x5, x8sub x1, x1, w3, uxtwsub x2, x2, w9, uxtwword 640b - ipred_smooth_v_tblword 320b - ipred_smooth_v_tblword 160b - ipred_smooth_v_tblword 80b - ipred_smooth_v_tblword 40b - ipred_smooth_v_tblsub w9, w9, #25sub x2, x2, #4sub x2, x2, #4sub x2, x2, #4Set up pointers for four rows in parallel; x0, x6, x5, x10sub x1, x1, w3, uxtwsub x8, x8, w9, uxtwword 640b - ipred_smooth_h_tblword 320b - ipred_smooth_h_tblword 160b - ipred_smooth_h_tblword 80b - ipred_smooth_h_tblword 40b - ipred_smooth_h_tblsub x4, x4, w3, uxtwsub v16.8h, v16.8h, v18.8hsub v17.8h, v17.8h, v19.8hsub x4, x4, w1, uxtwsub v16.8h, v16.8h, v18.8hsub w3, w3, #16sub w6, w3, #32sub x5, x5, w3, uxtwsub x2, x2, #1 // topleft -= 1sub w3, w3, #16sub w6, w3, #31sub x5, x5, w3, uxtwsub w3, w3, #16
Messung V0.5 C=100 H=100 G=100
¤ Dauer der Verarbeitung: 0.31 Sekunden
(vorverarbeitet)
¤ *© Formatika GbR, Deutschland
