// SPDX-License-Identifier: GPL-2.0-only /* * cardbus.c -- 16-bit PCMCIA core support * * The initial developer of the original code is David A. Hinds * <dahinds@users.sourceforge.net>. Portions created by David A. Hinds * are Copyright (C) 1999 David A. Hinds. All Rights Reserved. * * (C) 1999 David A. Hinds
*/
/* * Cardbus handling has been re-written to be more of a PCI bridge thing, * and the PCI code basically does all the resource handling. * * Linus, Jan 2000
*/
/* * Since there is only one interrupt available to * CardBus devices, all devices downstream of this * device must be using this IRQ.
*/
pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &irq_pin); if (irq_pin) {
dev->irq = irq;
pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
}
/* * Some controllers transfer very slowly with 0 CLS. * Configure it. This may fail as CLS configuration * is mandatory only for MWI.
*/
pci_set_cacheline_size(dev);
if (dev->subordinate)
cardbus_config_irq_and_cls(dev->subordinate, irq);
}
}
/** * cb_alloc() - add CardBus device * @s: the pcmcia_socket where the CardBus device is located * * cb_alloc() allocates the kernel data structures for a Cardbus device * and handles the lowest level PCI device setup issues.
*/ int __ref cb_alloc(struct pcmcia_socket *s)
{ struct pci_bus *bus = s->cb_dev->subordinate; struct pci_dev *dev; unsignedint max, pass;
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