/*
* P1023 RDB Device Tree Source
*
* Copyright 2013 - 2014 Freescale Semiconductor Inc.
*
* Author: Chunhe Lan <Chunhe.Lan@freescale.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* * Neither the name of Freescale Semiconductor nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
*
* ALTERNATIVELY, this software may be distributed under the terms of the
* GNU General Public License ("GPL") as published by the Free Software
* Foundation, either version 2 of that License or (at your option) any
* later version.
*
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/include/ "p1023si-pre.dtsi"
/ {
model = "fsl,P1023";
compatible = "fsl,P1023RDB";
#address-cells = <2>;
#size-cells = <2>;
interrupt-parent = <&mpic>;
memory {
device_type = "memory";
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
bman_fbpr: bman-fbpr {
size = <0 0x1000000>;
alignment = <0 0x1000000>;
};
qman_fqd: qman-fqd {
size = <0 0x400000>;
alignment = <0 0x400000>;
};
qman_pfdr: qman-pfdr {
size = <0 0x2000000>;
alignment = <0 0x2000000>;
};
};
qportals: qman-portals@ff000000 {
ranges = <0x0 0xf 0xff000000 0x200000>;
};
bportals: bman-portals@ff200000 {
ranges = <0x0 0xf 0xff200000 0x200000>;
};
soc: soc@ff600000 {
ranges = <0x0 0x0 0xff600000 0x200000>;
i2c@3000 {
eeprom@53 {
compatible = "atmel,24c04";
reg = <0x53>;
};
rtc@6f {
compatible = "microchip,mcp7941x";
reg = <0x6f>;
};
};
usb@22000 {
dr_mode = "host";
phy_type = "ulpi";
};
};
lbc: localbus@ff605000 {
reg = <0 0xff605000 0 0x1000>;
/* NOR, NAND Flashes */
ranges = <0x0 0x0 0x0 0xec000000 0x04000000
0x1 0x0 0x0 0xffa00000 0x08000000>;
nor@0,0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "cfi-flash";
reg = <0x0 0x0 0x04000000>;
bank-width = <2>;
device-width = <1>;
partition@0 {
/* 48MB for Root File System */
reg = <0x00000000 0x03000000>;
label = "NOR Root File System";
};
partition@3000000 {
/* 1MB for DTB Image */
reg = <0x03000000 0x00100000>;
label = "NOR DTB Image";
};
partition@3100000 {
/* 14MB for Linux Kernel Image */
reg = <0x03100000 0x00e00000>;
label = "NOR Linux Kernel Image";
};
partition@3f00000 {
/* This location must not be altered */
/* 512KB for u-boot Bootloader Image */
/* 512KB for u-boot Environment Variables */
reg = <0x03f00000 0x00100000>;
label = "NOR U-Boot Image";
read-only;
};
};
nand@1,0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,elbc-fcm-nand";
reg = <0x1 0x0 0x40000>;
partition@0 {
/* This location must not be altered */
/* 1MB for u-boot Bootloader Image */
reg = <0x0 0x00100000>;
label = "NAND U-Boot Image";
read-only;
};
partition@100000 {
/* 1MB for DTB Image */
reg = <0x00100000 0x00100000>;
label = "NAND DTB Image";
};
partition@200000 {
/* 14MB for Linux Kernel Image */
reg = <0x00200000 0x00e00000>;
label = "NAND Linux Kernel Image";
};
partition@1000000 {
/* 96MB for Root File System Image */
reg = <0x01000000 0x06000000>;
label = "NAND Root File System";
};
partition@7000000 {
/* 16MB for User Writable Area */
reg = <0x07000000 0x01000000>;
label = "NAND Writable User area";
};
};
};
pci0: pcie@ff60a000 {
reg = <0 0xff60a000 0 0x1000>;
ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>;
pcie@0 {
/* IRQ[0:3] are pulled up on board, set to active-low */
interrupt-map-mask = <0xf800 0 0 7>;
interrupt-map = <
/* IDSEL 0x0 */
0000 0 0 1 &mpic 0 1 0 0
0000 0 0 2 &mpic 1 1 0 0
0000 0 0 3 &mpic 2 1 0 0
0000 0 0 4 &mpic 3 1 0 0
>;
ranges = <0x2000000 0x0 0xc0000000
0x2000000 0x0 0xc0000000
0x0 0x20000000
0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
};
};
board_pci1: pci1: pcie@ff609000 {
reg = <0 0xff609000 0 0x1000>;
ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
pcie@0 {
/*
* IRQ[4:6] only for PCIe, set to active-high,
* IRQ[7] is pulled up on board, set to active-low
*/
interrupt-map-mask = <0xf800 0 0 7>;
interrupt-map = <
/* IDSEL 0x0 */
0000 0 0 1 &mpic 4 2 0 0
0000 0 0 2 &mpic 5 2 0 0
0000 0 0 3 &mpic 6 2 0 0
0000 0 0 4 &mpic 7 1 0 0
>;
ranges = <0x2000000 0x0 0xa0000000
0x2000000 0x0 0xa0000000
0x0 0x20000000
0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
};
};
pci2: pcie@ff60b000 {
reg = <0 0xff60b000 0 0x1000>;
ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
pcie@0 {
/*
* IRQ[8:10] are pulled up on board, set to active-low
* IRQ[11] only for PCIe, set to active-high,
*/
interrupt-map-mask = <0xf800 0 0 7>;
interrupt-map = <
/* IDSEL 0x0 */
0000 0 0 1 &mpic 8 1 0 0
0000 0 0 2 &mpic 9 1 0 0
0000 0 0 3 &mpic 10 1 0 0
0000 0 0 4 &mpic 11 2 0 0
>;
ranges = <0x2000000 0x0 0x80000000
0x2000000 0x0 0x80000000
0x0 0x20000000
0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
};
};
};
/include/ "p1023si-post.dtsi"
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