/* in hvCall.S */
EXPORT_SYMBOL(plpar_hcall);
EXPORT_SYMBOL(plpar_hcall9);
EXPORT_SYMBOL(plpar_hcall_norets);
#ifdef CONFIG_PPC_64S_HASH_MMU /* * H_BLOCK_REMOVE supported block size for this page size in segment who's base * page size is that page size. * * The first index is the segment base page size, the second one is the actual * page size.
*/ staticint hblkrm_size[MMU_PAGE_COUNT][MMU_PAGE_COUNT] __ro_after_init; #endif
/* * Due to the involved complexity, and that the current hypervisor is only * returning this value or 0, we are limiting the support of the H_BLOCK_REMOVE * buffer size to 8 size block.
*/ #define HBLKRM_SUPPORTED_BLOCK_SIZE 8
for_each_possible_cpu(cpu) {
pp = paca_ptrs[cpu]; if (pp->dispatch_log) continue;
dtl = kmem_cache_alloc(dtl_cache, GFP_KERNEL); if (!dtl) {
pr_warn("Failed to allocate dispatch trace log for cpu %d\n",
cpu); #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
pr_warn("Stolen time statistics will be unreliable\n"); #endif break;
}
/* hypervisor reads buffer length from this field */
dtl->enqueue_to_dispatch_time = cpu_to_be32(DISPATCH_LOG_BYTES);
ret = register_dtl(hwcpu, __pa(dtl)); if (ret)
pr_err("WARNING: DTL registration of cpu %d (hw %d) failed with %ld\n",
cpu, hwcpu, ret);
int same_cpu_disp; int same_chip_disp; int diff_chip_disp; int far_chip_disp;
int numa_home_disp; int numa_remote_disp; int numa_far_disp;
};
/* * This represents the number of cpus in the hypervisor. Since there is no * architected way to discover the number of processors in the host, we * provision for dealing with NR_CPUS. This is currently 2048 by default, and * is sufficient for our purposes. This will need to be tweaked if * CONFIG_NR_CPUS is changed.
*/ #define NR_CPUS_H NR_CPUS
/* if we have been migrated away, we cancel ourself */ if (d->cpu != smp_processor_id()) {
pr_debug("vcpudispatch_stats: cpu %d worker migrated -- canceling worker\n",
smp_processor_id()); return;
}
if (i == be64_to_cpu(vpa->dtl_idx)) goto out;
while (i < be64_to_cpu(vpa->dtl_idx)) {
dtle = *dtl;
barrier(); if (i + N_DISPATCH_LOG < be64_to_cpu(vpa->dtl_idx)) { /* buffer has overflowed */
pr_debug_ratelimited("vcpudispatch_stats: cpu %d lost %lld DTL samples\n",
d->cpu,
be64_to_cpu(vpa->dtl_idx) - N_DISPATCH_LOG - i);
i = be64_to_cpu(vpa->dtl_idx) - N_DISPATCH_LOG;
dtl = local_paca->dispatch_log + (i % N_DISPATCH_LOG); continue;
}
update_vcpu_disp_stat(be16_to_cpu(dtle.processor_id));
++i;
++dtl; if (dtl == dtl_end)
dtl = local_paca->dispatch_log;
}
/* * VPA steal time counters are reported at TB frequency. Hence do a * conversion to ns before returning
*/ return tb_to_ns(be64_to_cpu(READ_ONCE(lppaca->enqueue_dispatch_tb)) +
be64_to_cpu(READ_ONCE(lppaca->ready_enqueue_tb)));
} #endif
#endif/* CONFIG_PPC_SPLPAR */
void vpa_init(int cpu)
{ int hwcpu = get_hard_smp_processor_id(cpu); unsignedlong addr; long ret;
/* * The spec says it "may be problematic" if CPU x registers the VPA of * CPU y. We should never do that, but wail if we ever do.
*/
WARN_ON(cpu != smp_processor_id());
if (cpu_has_feature(CPU_FTR_ALTIVEC))
lppaca_of(cpu).vmxregs_in_use = 1;
if (cpu_has_feature(CPU_FTR_ARCH_207S))
lppaca_of(cpu).ebb_regs_in_use = 1;
addr = __pa(&lppaca_of(cpu));
ret = register_vpa(hwcpu, addr);
if (ret) {
pr_err("WARNING: VPA registration for cpu %d (hw %d) of area " "%lx failed with %ld\n", cpu, hwcpu, addr, ret); return;
}
#ifdef CONFIG_PPC_64S_HASH_MMU /* * PAPR says this feature is SLB-Buffer but firmware never * reports that. All SPLPAR support SLB shadow buffer.
*/ if (!radix_enabled() && firmware_has_feature(FW_FEATURE_SPLPAR)) {
addr = __pa(paca_ptrs[cpu]->slb_shadow_ptr);
ret = register_slb_shadow(hwcpu, addr); if (ret)
pr_err("WARNING: SLB shadow buffer registration for " "cpu %d (hw %d) of area %lx failed with %ld\n",
cpu, hwcpu, addr, ret);
} #endif/* CONFIG_PPC_64S_HASH_MMU */
/* * Register dispatch trace log, if one has been allocated.
*/
register_dtl_buffer(cpu);
}
if (!(vflags & HPTE_V_BOLTED))
pr_devel(" hpte_v=%016lx, hpte_r=%016lx\n", hpte_v, hpte_r);
/* Now fill in the actual HPTE */ /* Set CEC cookie to 0 */ /* Zero page = 0 */ /* I-cache Invalidate = 0 */ /* I-cache synchronize = 0 */ /* Exact = 0 */
flags = 0;
if (firmware_has_feature(FW_FEATURE_XCMO) && !(hpte_r & HPTE_R_N))
flags |= H_COALESCE_CAND;
lpar_rc = plpar_pte_enter(flags, hpte_group, hpte_v, hpte_r, &slot); if (unlikely(lpar_rc == H_PTEG_FULL)) {
pr_devel("Hash table group is full\n"); return -1;
}
/* * Since we try and ioremap PHBs we don't own, the pte insert * will fail. However we must catch the failure in hash_page * or we will loop forever, so return -2 in this case.
*/ if (unlikely(lpar_rc != H_SUCCESS)) {
pr_err("Failed hash pte insert with error %ld\n", lpar_rc); return -2;
} if (!(vflags & HPTE_V_BOLTED))
pr_devel(" -> slot: %lu\n", slot & 7);
/* Because of iSeries, we have to pass down the secondary * bucket bit here as well
*/ return (slot & 7) | (!!(vflags & HPTE_V_SECONDARY) << 3);
}
/* * The test for adjunct partition is performed before the * ANDCOND test. H_RESOURCE may be returned, so we need to * check for that as well.
*/
BUG_ON(lpar_rc != H_NOT_FOUND && lpar_rc != H_RESOURCE);
slot_offset++;
slot_offset &= 0x7;
}
return -1;
}
/* Called during kexec sequence with MMU off */ static notrace void manual_hpte_clear_all(void)
{ unsignedlong size_bytes = 1UL << ppc64_pft_size; unsignedlong hpte_count = size_bytes >> 4; struct { unsignedlong pteh; unsignedlong ptel;
} ptes[4]; long lpar_rc; unsignedlong i, j;
/* Read in batches of 4, * invalidate only valid entries not in the VRMA * hpte_count will be a multiple of 4
*/ for (i = 0; i < hpte_count; i += 4) {
lpar_rc = plpar_pte_read_4_raw(0, i, (void *)ptes); if (lpar_rc != H_SUCCESS) {
pr_info("Failed to read hash page table at %ld err %ld\n",
i, lpar_rc); continue;
} for (j = 0; j < 4; j++){ if ((ptes[j].pteh & HPTE_V_VRMA_MASK) ==
HPTE_V_VRMA_MASK) continue; if (ptes[j].pteh & HPTE_V_VALID)
plpar_pte_remove_raw(0, i + j, 0,
&(ptes[j].pteh), &(ptes[j].ptel));
}
}
}
/* Called during kexec sequence with MMU off */ static notrace int hcall_hpte_clear_all(void)
{ int rc;
do {
rc = plpar_hcall_norets(H_CLEAR_HPT);
} while (rc == H_CONTINUE);
return rc;
}
/* Called during kexec sequence with MMU off */ static notrace void pseries_hpte_clear_all(void)
{ int rc;
rc = hcall_hpte_clear_all(); if (rc != H_SUCCESS)
manual_hpte_clear_all();
#ifdef __LITTLE_ENDIAN__ /* * Reset exceptions to big endian. * * FIXME this is a hack for kexec, we need to reset the exception * endian before starting the new kernel and this is a convenient place * to do it. * * This is also called on boot when a fadump happens. In that case we * must not change the exception endian mode.
*/ if (firmware_has_feature(FW_FEATURE_SET_MODE) && !is_fadump_active())
pseries_big_endian_exceptions(); #endif
}
/* * NOTE: for updatepp ops we are fortunate that the linux "newpp" bits and * the low 3 bits of flags happen to line up. So no transform is needed. * We can probably optimize here and assume the high bits of newpp are * already zero. For now I am paranoid.
*/ staticlong pSeries_lpar_hpte_updatepp(unsignedlong slot, unsignedlong newpp, unsignedlong vpn, int psize, int apsize, int ssize, unsignedlong inv_flags)
{ unsignedlong lpar_rc; unsignedlong flags; unsignedlong want_v;
/* * We try to keep bolted entries always in primary hash * But in some case we can find them in secondary too.
*/
hpte_group = (hash & htab_hash_mask) * HPTES_PER_GROUP;
slot = __pSeries_lpar_hpte_find(want_v, hpte_group); if (slot < 0) { /* Try in secondary */
hpte_group = (~hash & htab_hash_mask) * HPTES_PER_GROUP;
slot = __pSeries_lpar_hpte_find(want_v, hpte_group); if (slot < 0) return -1;
} return hpte_group + slot;
}
staticvoid pSeries_lpar_hpte_updateboltedpp(unsignedlong newpp, unsignedlong ea, int psize, int ssize)
{ unsignedlong vpn; unsignedlong lpar_rc, slot, vsid, flags;
/* * As defined in the PAPR's section 14.5.4.1.8 * The control mask doesn't include the returned reference and change bit from * the processed PTE.
*/ #define HBLKR_AVPN 0x0100000000000000UL #define HBLKR_CTRL_MASK 0xf800000000000000UL #define HBLKR_CTRL_SUCCESS 0x8000000000000000UL #define HBLKR_CTRL_ERRNOTFOUND 0x8800000000000000UL #define HBLKR_CTRL_ERRBUSY 0xa000000000000000UL
/* * Returned true if we are supporting this block size for the specified segment * base page size and actual page size. * * Currently, we only support 8 size block.
*/ staticinlinebool is_supported_hlbkrm(int bpsize, int psize)
{ return (hblkrm_size[bpsize][psize] == HBLKRM_SUPPORTED_BLOCK_SIZE);
}
/** * H_BLOCK_REMOVE caller. * @idx should point to the latest @param entry set with a PTEX. * If PTE cannot be processed because another CPUs has already locked that * group, those entries are put back in @param starting at index 1. * If entries has to be retried and @retry_busy is set to true, these entries * are retried until success. If @retry_busy is set to false, the returned * is the number of entries yet to process.
*/ staticunsignedlong call_block_remove(unsignedlong idx, unsignedlong *param, bool retry_busy)
{ unsignedlong i, rc, new_idx; unsignedlong retbuf[PLPAR_HCALL9_BUFSIZE];
if (idx < 2) {
pr_warn("Unexpected empty call to H_BLOCK_REMOVE"); return 0;
}
again:
new_idx = 0; if (idx > PLPAR_HCALL9_BUFSIZE) {
pr_err("Too many PTEs (%lu) for H_BLOCK_REMOVE", idx);
idx = PLPAR_HCALL9_BUFSIZE;
} elseif (idx < PLPAR_HCALL9_BUFSIZE)
param[idx] = HBR_END;
/* * If there were entries found busy, retry these entries if requested, * of if all the entries have to be retried.
*/ if (new_idx && (retry_busy || new_idx == (PLPAR_HCALL9_BUFSIZE-1))) {
idx = new_idx + 1; goto again;
}
return new_idx;
}
#ifdef CONFIG_TRANSPARENT_HUGEPAGE /* * Limit iterations holding pSeries_lpar_tlbie_lock to 3. We also need * to make sure that we avoid bouncing the hypervisor tlbie lock.
*/ #define PPC64_HUGE_HPTE_BATCH 12
staticvoid hugepage_block_invalidate(unsignedlong *slot, unsignedlong *vpn, int count, int psize, int ssize)
{ unsignedlong param[PLPAR_HCALL9_BUFSIZE]; unsignedlong shift, current_vpgb, vpgb; int i, pix = 0;
shift = mmu_psize_defs[psize].shift;
for (i = 0; i < count; i++) { /* * Shifting 3 bits more on the right to get a * 8 pages aligned virtual addresse.
*/
vpgb = (vpn[i] >> (shift - VPN_SHIFT + 3)); if (!pix || vpgb != current_vpgb) { /* * Need to start a new 8 pages block, flush * the current one if needed.
*/ if (pix)
(void)call_block_remove(pix, param, true);
current_vpgb = vpgb;
param[0] = hpte_encode_avpn(vpn[i], psize, ssize);
pix = 1;
}
param[pix++] = HBR_REQUEST | HBLKR_AVPN | slot[i]; if (pix == PLPAR_HCALL9_BUFSIZE) {
pix = call_block_remove(pix, param, false); /* * pix = 0 means that all the entries were * removed, we can start a new block. * Otherwise, this means that there are entries * to retry, and pix points to latest one, so * we should increment it and try to continue * the same block.
*/ if (pix)
pix++;
}
} if (pix)
(void)call_block_remove(pix, param, true);
}
staticvoid hugepage_bulk_invalidate(unsignedlong *slot, unsignedlong *vpn, int count, int psize, int ssize)
{ unsignedlong param[PLPAR_HCALL9_BUFSIZE]; int i = 0, pix = 0, rc;
staticinlinevoid __pSeries_lpar_hugepage_invalidate(unsignedlong *slot, unsignedlong *vpn, int count, int psize, int ssize)
{ unsignedlong flags = 0; int lock_tlbie = !mmu_has_feature(MMU_FTR_LOCKLESS_TLBIE);
if (lock_tlbie)
spin_lock_irqsave(&pSeries_lpar_tlbie_lock, flags);
/** * The hcall H_BLOCK_REMOVE implies that the virtual pages to processed are * "all within the same naturally aligned 8 page virtual address block".
*/ staticvoid do_block_remove(unsignedlong number, struct ppc64_tlb_batch *batch, unsignedlong *param)
{ unsignedlong vpn; unsignedlong i, pix = 0; unsignedlong index, shift, slot, current_vpgb, vpgb;
real_pte_t pte; int psize, ssize;
psize = batch->psize;
ssize = batch->ssize;
for (i = 0; i < number; i++) {
vpn = batch->vpn[i];
pte = batch->pte[i];
pte_iterate_hashed_subpages(pte, psize, vpn, index, shift) { /* * Shifting 3 bits more on the right to get a * 8 pages aligned virtual addresse.
*/
vpgb = (vpn >> (shift - VPN_SHIFT + 3)); if (!pix || vpgb != current_vpgb) { /* * Need to start a new 8 pages block, flush * the current one if needed.
*/ if (pix)
(void)call_block_remove(pix, param, true);
current_vpgb = vpgb;
param[0] = hpte_encode_avpn(vpn, psize,
ssize);
pix = 1;
}
if (pix == PLPAR_HCALL9_BUFSIZE) {
pix = call_block_remove(pix, param, false); /* * pix = 0 means that all the entries were * removed, we can start a new block. * Otherwise, this means that there are entries * to retry, and pix points to latest one, so * we should increment it and try to continue * the same block.
*/ if (pix)
pix++;
}
} pte_iterate_hashed_end();
}
if (pix)
(void)call_block_remove(pix, param, true);
}
/* * TLB Block Invalidate Characteristics * * These characteristics define the size of the block the hcall H_BLOCK_REMOVE * is able to process for each couple segment base page size, actual page size. * * The ibm,get-system-parameter properties is returning a buffer with the * following layout: * * [ 2 bytes size of the RTAS buffer (excluding these 2 bytes) ] * ----------------- * TLB Block Invalidate Specifiers: * [ 1 byte LOG base 2 of the TLB invalidate block size being specified ] * [ 1 byte Number of page sizes (N) that are supported for the specified * TLB invalidate block size ] * [ 1 byte Encoded segment base page size and actual page size * MSB=0 means 4k segment base page size and actual page size * MSB=1 the penc value in mmu_psize_def ] * ... * ----------------- * Next TLB Block Invalidate Specifiers... * ----------------- * [ 0 ]
*/ staticinlinevoid set_hblkrm_bloc_size(int bpsize, int psize, unsignedint block_size)
{ if (block_size > hblkrm_size[bpsize][psize])
hblkrm_size[bpsize][psize] = block_size;
}
/* * Decode the Encoded segment base page size and actual page size. * PAPR specifies: * - bit 7 is the L bit * - bits 0-5 are the penc value * If the L bit is 0, this means 4K segment base page size and actual page size * otherwise the penc value should be read.
*/ #define HBLKRM_L_MASK 0x80 #define HBLKRM_PENC_MASK 0x3f staticinlinevoid __init check_lp_set_hblkrm(unsignedint lp, unsignedint block_size)
{ unsignedint bpsize, psize;
/* First, check the L bit, if not set, this means 4K */ if ((lp & HBLKRM_L_MASK) == 0) {
set_hblkrm_bloc_size(MMU_PAGE_4K, MMU_PAGE_4K, block_size); return;
}
/* * The size of the TLB Block Invalidate Characteristics is variable. But at the * maximum it will be the number of possible page sizes *2 + 10 bytes. * Currently MMU_PAGE_COUNT is 16, which means 42 bytes. Use a cache line size * (128 bytes) for the buffer to get plenty of space.
*/ #define SPLPAR_TLB_BIC_MAXLENGTH 128
/* * Must be called in process context. The caller must hold the * cpus_lock.
*/ staticint pseries_lpar_resize_hpt(unsignedlong shift)
{ struct hpt_resize_state state = {
.shift = shift,
.commit_rc = H_FUNCTION,
}; unsignedint delay, total_delay = 0; int rc;
ktime_t t0, t1, t2;
might_sleep();
if (!firmware_has_feature(FW_FEATURE_HPT_RESIZE)) return -ENODEV;
pr_info("Attempting to resize HPT to shift %lu\n", shift);
t0 = ktime_get();
rc = plpar_resize_hpt_prepare(0, shift); while (H_IS_LONG_BUSY(rc)) {
delay = get_longbusy_msecs(rc);
total_delay += delay; if (total_delay > HPT_RESIZE_TIMEOUT) { /* prepare with shift==0 cancels an in-progress resize */
rc = plpar_resize_hpt_prepare(0, 0); if (rc != H_SUCCESS)
pr_warn("Unexpected error %d cancelling timed out HPT resize\n",
rc); return -ETIMEDOUT;
}
msleep(delay);
rc = plpar_resize_hpt_prepare(0, shift);
}
switch (rc) { case H_SUCCESS: /* Continue on */ break;
case H_PARAMETER:
pr_warn("Invalid argument from H_RESIZE_HPT_PREPARE\n"); return -EINVAL; case H_RESOURCE:
pr_warn("Operation not permitted from H_RESIZE_HPT_PREPARE\n"); return -EPERM; default:
pr_warn("Unexpected error %d from H_RESIZE_HPT_PREPARE\n", rc); return -EIO;
}
if (firmware_has_feature(FW_FEATURE_HPT_RESIZE))
mmu_hash_ops.resize_hpt = pseries_lpar_resize_hpt;
/* * On POWER9, we need to do a H_REGISTER_PROC_TBL hcall * to inform the hypervisor that we wish to use the HPT.
*/ if (cpu_has_feature(CPU_FTR_ARCH_300))
pseries_lpar_register_process_table(0, 0, 0);
} #endif/* CONFIG_PPC_64S_HASH_MMU */
for (i = 0; i < (1 << order); i++, addr += PAGE_SIZE) { for (j = 0; j < PAGE_SIZE; j += cmo_page_sz)
plpar_hcall_norets(H_PAGE_INIT, state, addr + j, 0);
}
}
void arch_free_page(struct page *page, int order)
{ if (radix_enabled()) return; if (!cmo_free_hint_flag || !firmware_has_feature(FW_FEATURE_CMO)) return;
int hcall_tracepoint_regfunc(void)
{
static_key_slow_inc(&hcall_tracepoint_key); return 0;
}
void hcall_tracepoint_unregfunc(void)
{
static_key_slow_dec(&hcall_tracepoint_key);
} #else /* * We optimise our hcall path by placing hcall_tracepoint_refcount * directly in the TOC so we can check if the hcall tracepoints are * enabled via a single load.
*/
/* NB: reg/unreg are called while guarded with the tracepoints_mutex */ externlong hcall_tracepoint_refcount;
int hcall_tracepoint_regfunc(void)
{
hcall_tracepoint_refcount++; return 0;
}
/* * Keep track of hcall tracing depth and prevent recursion. Warn if any is * detected because it may indicate a problem. This will not catch all * problems with tracing code making hcalls, because the tracing might have * been invoked from a non-hcall, so the first hcall could recurse into it * without warning here, but this better than nothing. * * Hcalls with specific problems being traced should use the _notrace * plpar_hcall variants.
*/ static DEFINE_PER_CPU(unsignedint, hcall_trace_depth);
/* * If modinv is the modular multiplicate inverse of (x % vsid_modulus) * and vsid = (protovsid * x) % vsid_modulus, then we say: * protovsid = (vsid * modinv) % vsid_modulus
*/
/* * Reserve context ids which map to reserved virtual addresses. For now * we only reserve the context id which maps to the VRMA VSID. We ignore * the addresses in "ibm,adjunct-virtual-addresses" because we don't * enable adjunct support via the "ibm,client-architecture-support" * interface.
*/
protovsid = vsid_unscramble(VRMA_VSID, MMU_SEGSIZE_1T);
hash__reserve_context_id(protovsid >> ESID_BITS_1T); return 0;
}
machine_device_initcall(pseries, reserve_vrma_context_id); #endif
#ifdef CONFIG_DEBUG_FS /* debugfs file interface for vpa data */ static ssize_t vpa_file_read(struct file *filp, char __user *buf, size_t len,
loff_t *pos)
{ int cpu = (long)filp->private_data; struct lppaca *lppaca = &lppaca_of(cpu);
Die Informationen auf dieser Webseite wurden
nach bestem Wissen sorgfältig zusammengestellt. Es wird jedoch weder Vollständigkeit, noch Richtigkeit,
noch Qualität der bereit gestellten Informationen zugesichert.
Bemerkung:
Die farbliche Syntaxdarstellung und die Messung sind noch experimentell.
