// SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2022 MediaTek Inc. * Author: Garmin Chang <garmin.chang@mediatek.com> #include <dt-bindings/clock/mediatek,mt8188-clk.h>#include <linux/clk-provider.h>#include <linux/platform_device.h>#include "clk-gate.h" #include "clk-mtk.h" static const struct mtk_gate_regs vpp1_0_cg_regs = {static const struct mtk_gate_regs vpp1_1_cg_regs = {#define GATE_VPP1_0(_id, _name, _parent, _shift) \#define GATE_VPP1_1(_id, _name, _parent, _shift) \static const struct mtk_gate vpp1_clks[] = {/* VPP1_0 */ "vpp1_svpp1_mdp_ovl" , "top_vpp" , 0),"vpp1_svpp1_mdp_tcc" , "top_vpp" , 1),"vpp1_svpp1_mdp_wrot" , "top_vpp" , 2),"vpp1_svpp1_vpp_pad" , "top_vpp" , 3),"vpp1_svpp2_mdp_wrot" , "top_vpp" , 4),"vpp1_svpp2_vpp_pad" , "top_vpp" , 5),"vpp1_svpp3_mdp_wrot" , "top_vpp" , 6),"vpp1_svpp3_vpp_pad" , "top_vpp" , 7),"vpp1_svpp1_mdp_rdma" , "top_vpp" , 8),"vpp1_svpp1_mdp_fg" , "top_vpp" , 9),"vpp1_svpp2_mdp_rdma" , "top_vpp" , 10),"vpp1_svpp2_mdp_fg" , "top_vpp" , 11),"vpp1_svpp3_mdp_rdma" , "top_vpp" , 12),"vpp1_svpp3_mdp_fg" , "top_vpp" , 13),"vpp1_vpp_split" , "top_vpp" , 14),"vpp1_svpp2_vdo0_dl_relay" , "top_vpp" , 15),"vpp1_svpp1_mdp_rsz" , "top_vpp" , 16),"vpp1_svpp1_mdp_tdshp" , "top_vpp" , 17),"vpp1_svpp1_mdp_color" , "top_vpp" , 18),"vpp1_svpp3_vdo1_dl_relay" , "top_vpp" , 19),"vpp1_svpp2_mdp_rsz" , "top_vpp" , 20),"vpp1_svpp2_vpp_merge" , "top_vpp" , 21),"vpp1_svpp2_mdp_tdshp" , "top_vpp" , 22),"vpp1_svpp2_mdp_color" , "top_vpp" , 23),"vpp1_svpp3_mdp_rsz" , "top_vpp" , 24),"vpp1_svpp3_vpp_merge" , "top_vpp" , 25),"vpp1_svpp3_mdp_tdshp" , "top_vpp" , 26),"vpp1_svpp3_mdp_color" , "top_vpp" , 27),"vpp1_gals5" , "top_vpp" , 28),"vpp1_gals6" , "top_vpp" , 29),"vpp1_larb5" , "top_vpp" , 30),"vpp1_larb6" , "top_vpp" , 31),/* VPP1_1 */ "vpp1_svpp1_mdp_hdr" , "top_vpp" , 0),"vpp1_svpp1_mdp_aal" , "top_vpp" , 1),"vpp1_svpp2_mdp_hdr" , "top_vpp" , 2),"vpp1_svpp2_mdp_aal" , "top_vpp" , 3),"vpp1_svpp3_mdp_hdr" , "top_vpp" , 4),"vpp1_svpp3_mdp_aal" , "top_vpp" , 5),"vpp1_disp_mutex" , "top_vpp" , 7),"vpp1_svpp2_vdo1_dl_relay" , "top_vpp" , 8),"vpp1_svpp3_vdo0_dl_relay" , "top_vpp" , 9),"vpp1_vpp0_dl_async" , "top_vpp" , 10),"vpp1_vpp0_dl1_relay" , "top_vpp" , 11),"vpp1_larb5_fake_eng" , "top_vpp" , 12),"vpp1_larb6_fake_eng" , "top_vpp" , 13),"vpp1_hdmi_meta" , "top_vpp" , 16),"vpp1_vpp_split_hdmi" , "top_vpp" , 17),"vpp1_dgi_in" , "top_vpp" , 18),"vpp1_dgi_out" , "top_vpp" , 19),"vpp1_vpp_split_dgi" , "top_vpp" , 20),"vpp1_dl_con_occ" , "top_vpp" , 21),"vpp1_vpp_split_26m" , "top_vpp" , 26),static const struct mtk_clk_desc vpp1_desc = {static const struct platform_device_id clk_mt8188_vpp1_id_table[] = {"clk-mt8188-vpp1" , .driver_data = (kernel_ulong_t)&vpp1_desc },/* sentinel */ } static struct platform_driver clk_mt8188_vpp1_drv = {"clk-mt8188-vpp1" ,"MediaTek MT8188 Video Processing Pipe 1 clocks driver" );"GPL" );
Messung V0.5 C=94 H=94 G=93
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