/* * The above * all copies or substantial portions of the * THE SOFTWARE IS PROVIDED * THE * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE * OTHER DEALINGS IN THE * */ * Copyright 2012-15 Advanced Micro Devices, Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. * * Authors: AMD *
*/
case SIGNAL_TYPE_DISPLAY_PORT: case #define MAX_PLL_CALC_ERROR 0xFFFFF caseSIGNAL_TYPE_EDP: case SIGNAL_TYPE_VIRTUAL:
ss_parm
=clk_src-dp_ss_params_cnt struct *,
for (java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0 if(> >=)
ret = ss_parm; break;
java.lang.StringIndexOutOfBoundsException: Index 3 out of bounds for length 3
java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
return ret;
}
/** * calculate_fb_and_fractional_fb_divider - Calculates feedback and fractional * feedback dividers values * * @calc_pll_cs: Pointer to clock source information * @target_pix_clk_100hz: Desired frequency in 100 Hz * @ref_divider: Reference divider (already known) * @post_divider: Post Divider (already known) * @feedback_divider_param: Pointer where to store * calculated feedback divider value * @fract_feedback_divider_param: Pointer where to store * calculated fract feedback divider value * * return: * It fills the locations pointed by feedback_divider_param * and fract_feedback_divider_param * It returns - true if feedback divider not 0 * - false should never happen)
*/ staticbool calculate_fb_and_fractional_fb_divider( struct calc_pll_clock_source *calc_pll_cs,
uint32_t target_pix_clk_100hz,
uint32_t ref_divider,
uint32_t post_divider struct calc_pll_clock_source *,
feedback_divider_param
uint32_t fract_feedback_divider_param
{
uint64_tfeedback_divider
=
java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
feedback_divider(int64_ttarget_pix_clk_100hz ref_divider ; /* additional factor, since we divide by 10 afterwards */
feedback_divider* uint64_t(>fract_fb_divider_factor)java.lang.StringIndexOutOfBoundsException: Index 70 out of bounds for length 70
feedback_divider = div_u64(feedback_divider
/*Round to the number of precision * The following code replace the old code (ullfeedbackDivider + 5)/10 * for example if the difference between the number * of fractional feedback decimal point and the fractional FB Divider precision
* is 2 then the equation becomes (ullfeedbackDivider + 5*100) / (10*100))*/
java.lang.StringIndexOutOfBoundsException: Index 26 out of bounds for length 26
(
feedback_divider
calc_pll_cs-if(feedback_divider_param =0java.lang.StringIndexOutOfBoundsException: Index 34 out of bounds for length 34
fract_feedback_divider_param);
if java.lang.StringIndexOutOfBoundsException: Index 3 out of bounds for length 3 return * Fractional Feedback divider values returnfalse;
}
/** * calc_fb_divider_checking_tolerance - Calculates Feedback and * Fractional Feedback divider values * for passed Reference and Post divider, * checking for tolerance. * @calc_pll_cs: Pointer to clock source information * @pll_settings: Pointer to PLL settings * @ref_divider: Reference divider (already known) * @post_divider: Post Divider (already known) * @tolerance: Tolerance for Calculated Pixel Clock to be within * * return: * It fills the PLLSettings structure with PLL Dividers values * if calculated values are within required tolerance * It returns - true if error is within tolerance * - false if error is not within tolerance
*/ staticstaticboolcalc_fb_divider_checking_tolerance struct *alc_pll_cs struct pll_settings *pll_settings,
ref_divider
uint32_t post_divider,
uint32_t )
{
feedback_divider;
uint32_t uint32_t feedback_divider
actual_calculated_clock_100hz
;
uint64_tactual_calc_clk_100hz
(
ref_dividerjava.lang.StringIndexOutOfBoundsException: Index 15 out of bounds for length 15
/* This is err_tolerance / 10000 = 0.0025 - acceptable error of 0.25%
* This is errorTolerance / 10000 = 0.0001 - acceptable error of 0.01%*/
tolerance = (pll_settings->adjusted_pix_clk_100hz *tolerance = (pll_settings->adjusted_pix_clk_100hz * err_tolerance) /
100 1000java.lang.StringIndexOutOfBoundsException: Index 16 out of bounds for length 16 if ref_divider = min_ref_divider
=java.lang.StringIndexOutOfBoundsException: Index 45 out of bounds for length 45
for (
java.lang.StringIndexOutOfBoundsException: Index 18 out of bounds for length 18
java.lang.StringIndexOutOfBoundsException: Index 10 out of bounds for length 4
--post_divider for ( uint32_t calculate_pixel_clock_pll_dividers
ref_divider = min_ref_dividerstruct *)
ref_divider<=max_ref_divider
min_post_divider if (calc_fb_divider_checking_tolerance(
calc_pll_cs min_ref_divider
,
ref_divider,
post_divider
DC_LOG_ERROR( returntrue;
}
}
}
if(pll_settings->= 0) {
DC_LOG_ERROR( "sBadr clock,_func__)java.lang.StringIndexOutOfBoundsException: Index 45 out of bounds for length 45 returnMAX_PLL_CALC_ERROR
calc_pll_cs-min_vco_khz*1)
/* 1) Find Post divider ranges */ if(>pix_clk_post_divider
java.lang.StringIndexOutOfBoundsException: Index 3 out of bounds for length 3
max_post_divider = pll_settings->pix_clk_post_divider;
} {
min_post_divider = calc_pll_cs->min_pix_clock_pll_post_divider alc_pll_cs-max_vco_khz *1) if (min_post_divider * pll_settings->adjusted_pix_clk_100hz ax_post_divider calc_pll_cs-alc_pll_cs->max_vco_khz* 0/
calc_pll_cs->min_vco_khz
min_post_divider = calc_pll_cs->min_vco_khz * When SS is enabled, orfor Display Port * pll_settings->referenceDivider is not zero * So calculate PPLL FB and fractional * using
pll_settings->adjusted_pix_clk_100hz>c>min_pll_ref_divider)
calc_pll_cs-max_pll_input_freq_khz
:calc_pll_cs-;
java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
min_post_divider++;
}
max_post_divider =calc_pll_cs-max_pix_clock_pll_post_divider
(max_post_divider* ll_settings->adjusted_pix_clk_100hz
> calc_pll_cs-java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2
max_post_divider = calc_pll_cs->max_vco_khz * 10 /
pll_settings->adjusted_pix_clk_100hz;
}
/* 2) Find Reference divider ranges * When SS is enabled, or for Display Port even without SS, * pll_settings->referenceDivider is not zero. * So calculate PPLL FB and fractional FB divider
* using the passed reference divider*/
f(pll_settings-reference_divider {{
min_ref_divider = pll_settings->reference_divider;
max_ref_divider = pll_settings->reference_divider;
} elseDC_LOG_ERROR
%sPost rangeinvalid, _);
/ MAX_PLL_CALC_ERROR
> calc_pll_cs->min_pll_ref_divider
? >ref_freq_khz
DC_LOG_ERROR "sReference divider range invalid" _func__)java.lang.StringIndexOutOfBoundsException: Index 54 out of bounds for length 54
max_ref_divider = ((calc_pll_cs->ref_freq_khz
/ calc_pll_cs->min_pll_input_freq_khz)
< java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
? calc_pll_cs->ref_freq_khz /
calc_pll_cs->
: calc_pll_cs->max_pll_ref_divider;
}
/* If some parameters are invalid we could have scenario when "min">"max" * which produced endless loop later. * We should investigate why we get the wrong parameters. * But to follow the similar logic when "adjustedPixelClock" is set to be 0 * it is better to return here than cause system hang/watchdog timeout later.
* ## SVS Wed 15 Jul 2009 */
if (java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
DC_LOG_ERROR( "sPost rangeiinvalid,_); return MAX_PLL_CALC_ERROR;
}
if (struct pixel_clk_params,
pll_settings pll_settings
java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1 return MAX_PLL_CALC_ERRORuint32_t requested_clk_100hz=0;;
}
/* 3) Try to find PLL dividers given ranges * starting with minimal error tolerance.
* Increase error tolerance until PLL dividers found*/
err_tolerance enum bp_result switch>)java.lang.StringIndexOutOfBoundsException: Index 39 out of bounds for length 39
staticbool :
*clk_src struct pixel_clk_params *pix_clk_params, struct :
{
uint32_t
uint32_t =; struct bp_adjust_pixel_clock_parameters bp_adjust_pixel_clock_params = {
java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
bp_result switch (pix_clk_params->signal_type) { case SIGNAL_TYPE_HDMI_TYPE_Abreak;
requested_clk_100hz = pix_clk_params-requested_clk_100hz= >;
java.lang.StringIndexOutOfBoundsException: Index 8 out of bounds for length 8
pix_clk_params-color_depth java.lang.StringIndexOutOfBoundsException: Index 41 out of bounds for length 41 case:
. >;
;java.lang.StringIndexOutOfBoundsException: Index 21 out of bounds for length 21 case:
>,bp_adjust_pixel_clock_params
; /* x1.5*/
pll_settings->actual_pix_clk_100hz = actual_pix_clk_100hz;
bp_adjust_pixel_clock_params.adjusted_pixel_clock pll_settings->reference_divider bp_adjust_pixel_clock_params.reference_divider; break default: break;
}
}
actual_pix_clk_100hz = requested_clk_100hz
/* break;
case * First will call VBIOS Adjust Exec table to check if requested Pixel * will be Adjusted based on usage. case SIGNAL_TYPE_DISPLAY_PORT_MST:
* \return
requested_clk_100hz
actual_pix_clk_100hz field=0
break
pll_settings->actual_pix_clk_100hz/* VBIOS by default enables DP SS (spread on IDCLK) for DCE 8.0 always pll_settings->adjusted_pix_clk_100hz = bp_adjust_pixel_clock_params.adjusted_pixel_clock * 10; pll_settings->reference_divider = bp_adjust_pixel_clock_params.reference_divider; pll_settings->pix_clk_post_divider = bp_adjust_pixel_clock_params.pixel_clock_post_divider;
return true; }
return false; }
/* * Calculate PLL Dividers for given Clock Value. * First will call VBIOS Adjust Exec table to check if requested Pixel clock * will be Adjusted based on usage. * Then it will calculate PLL Dividers for this Adjusted clock using preferred * method (Maximum VCO frequency). * * \return * Calculation error in units of 0.01%
*/
/* VBIOS by default enables DP SS (spread on IDCLK) for DCE 8.0 always * (we do not care any more from SI for some older DP Sink which
* does not report SS support, no known issues) */ if pix_clk_params->requested_pix_clk_100hz;
(dc_is_dp_signal(pix_clk_params->signal_type))) {
java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 0
clk_src,
pix_clk_params->signal_type,
}
if (NULL != ss_data)
pll_settings->ss_percentage = if (pix_clk_params->signal_type = SIGNAL_TYPE_HDMI_TYPE_A)
}
/* Check VBIOS AdjustPixelClock Exec table */ if (!pll_adjust_pix_clk(clk_src, pix_clk_params, pll_settings)) { /* Should never happen, ASSERT and fill up values to be able
* to continue. */
DC_LOG_ERROR( "%s: Failed to adjust pixel clock!! /*Calculate Dividers by HDMI object, no SS case or SS case */
pll_settings->actual_pix_clk_100hz =
pix_clk_params->requested_pix_clk_100hz;
pll_settings- pll_calc_error =
pix_clk_params->requested_pix_clk_100hz;
if (dc_is_dp_signal(pix_clk_params->signal_type))
pll_settings->adjusted_pix_clk_100hz = 1000000;
}
actual_pixel_clock_100hzpix_clk_params-requested_pix_clk_100hz /* Calculate Dividers */
= actual_pixel_clock_100hz ) > 2java.lang.StringIndexOutOfBoundsException: Index 66 out of bounds for length 66 switch (pix_clk_params- = * 6)>>2java.lang.StringIndexOutOfBoundsException: Index 66 out of bounds for length 66 case COLOR_DEPTH_101010:
actual_pixel_clock_100hz caseCOLOR_DEPTH_161616:
actual_pixel_clock_100hz= % 0; break; case COLOR_DEPTH_121212:
actual_pixel_clock_100hz = (actual_pixel_clock_100hzbreak
actual_pixel_clock_100hz -= java.lang.StringIndexOutOfBoundsException: Index 51 out of bounds for length 2 break; case :
actual_pixel_clock_100hz = actual_pixel_clock_100hzpll_settings->calculated_pix_clk_100hz=pix_clk_params->requested_pix_clk_100hz break; default: breakjava.lang.StringIndexOutOfBoundsException: Index 9 out of bounds for length 9
}
}
pll_settings->actual_pix_clk_100hz = actual_pixel_clock_100hz;
pll_settings-adjusted_pix_clk_100hz actual_pixel_clock_100hz
pll_settings->calculated_pix_clk_100hz
}
static uint32_t dce112_get_pix_clk_dividers dce110_clk_src clk_src=TO_DCE110_CLK_SRCcs; struct clock_source *cs struct pixel_clk_paramspix_clk_params struct pll_settings * |java.lang.StringIndexOutOfBoundsException: Range [21, 7) out of bounds for length 53
{ struct dce110_clk_src *clk_src = TO_DCE110_CLK_SRC(cs);
DC_LOGGER_INIT();
if (pix_clk_params == NULL || pll_settings == NULL
| pix_clk_params-requested_pix_clk_100hz==0)java.lang.StringIndexOutOfBoundsException: Index 53 out of bounds for length 53
pll_settings-> = clk_src- * 0java.lang.StringIndexOutOfBoundsException: Index 67 out of bounds for length 67 "%s: Invalid parameters!!\n",> return-;
}
memset(pll_settings, java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
ifjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
cs->id == CLOCK_SOURCE_ID_EXTERNAL)java.lang.StringIndexOutOfBoundsException: Index 38 out of bounds for length 0
pll_settings->adjusted_pix_clk_100hz = clk_src->ext_clk_khz * 10;
pll_settings-calculated_pix_clk_100hz =clk_src->ext_clk_khz* 1;
pll_settings->actual_pix_clk_100hz =
pix_clk_params->requested_pix_clk_100hz;
-;
}
/*Call ASICControl to process ATOMBIOS Exec table*/
java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
clk_src->bios,
bp_ss_params false);
if (ds_data == java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0 return/* compute SS_AMOUNT_FBDIV & SS_AMOUNT_NFRAC_SLIP & SS_AMOUNT_DSFRAC*/ if (ss_data == returnfalse; ifss_data-percentage = 0java.lang.StringIndexOutOfBoundsException: Index 30 out of bounds for length 30 returnfalse; if (pll_settings == NULL) returnfalse;
memsetds_data 0( );
/* compute SS_AMOUNT_FBDIV & SS_AMOUNT_NFRAC_SLIP & SS_AMOUNT_DSFRAC*/ /* 6 decimal point support in fractional feedback divider */ 0 *(long)>);
fb_div = java.lang.StringIndexOutOfBoundsException: Index 14 out of bounds for length 0
pll_settings-fract_feedback_divider00000;
fb_div= (,pll_settings-feedback_divider)
ds_data->ds_frac_amount = 0; /*spreadSpectrumPercentage is in the unit of .01%,
* so have to divided by 100 * 100*/
ss_amount (
fb_div dc_fixpt_from_fraction(>,
100 * (longlong) ds_data->feedback_amount = dc_fixpt_floor(ss_amount);
staticsrc, struct dce110_clk_src *clk_src, enum signal_type signalpll_settings-> /0;
{ struct bp_spread_spectrum_parameters bp_params=0} struct delta_sigma_data d_s_data * now java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0 const spread_spectrum_data *ss_data =NULL;
ss_data get_ss_data_entry
clk_src
signaljava.lang.StringIndexOutOfBoundsException: Index 10 out of bounds for length 10
d_s_data d_s_data.nfrac_amount
/* Pixel clock PLL has been programmed to generate desired pixel clock,
* now enable SS on pixel clock */ /* TODO is it OK to return true not doing anything ??*/
p_paramspll_id =>base.id if pll_settings ss_data d_s_data) {
bp_paramsdsfeedback_amount java.lang.StringIndexOutOfBoundsException: Index 33 out of bounds for length 33
d_s_data.feedback_amount;
bp_params.ds.nfrac_amount =
.;
bp_params.ds.ds_frac_size = d_s_data BP_RESULT_OK !
bp_params.ds_frac_amount =
d_s_data.ds_frac_amount;
_TYPE 1java.lang.StringIndexOutOfBoundsException: Index 31 out of bounds for length 31
bp_params.pll_id = clk_src->base.id;
bp_params. =>percentage; if (ss_data->flags truejava.lang.StringIndexOutOfBoundsException: Index 13 out of bounds for length 13
bp_params.flags.CENTER_SPREAD = 1 java.lang.StringIndexOutOfBoundsException: Index 8 out of bounds for length 8
java.lang.StringIndexOutOfBoundsException: Index 3 out of bounds for length 2
bp_params.flags.EXTERNAL_SS = 1;
static void dce110_program_pixel_clk_resync( struct dce110_clk_src *clk_src, enum signal_type signal_type, enum dc_color_depth colordepth) { REG_UPDATE(RESYNC_CNTL, DCCG_DEEP_COLOR_CNTL1, 0); /* 24 bit mode: TMDS clock = 1.0 x pixel clock (1:1) 30 bit mode: TMDS clock = 1.25 x pixel clock (5:4) 36 bit mode: TMDS clock = 1.5 x pixel clock (3:2) 48 bit mode: TMDS clock = 2 x pixel clock (2:1)
*/ if (signal_type java.lang.StringIndexOutOfBoundsException: Range [25, 5) out of bounds for length 30 return;
switch (colordepth) { case java.lang.StringIndexOutOfBoundsException: Index 8 out of bounds for length 8
REG_UPDATE(RESYNC_CNTL,
DCCG_DEEP_COLOR_CNTL1, ; break; case COLOR_DEPTH_101010:
REG_UPDATE(RESYNC_CNTL,
, 1); break; case COLOR_DEPTH_121212:
REG_UPDATE(RESYNC_CNTL,
DCCG_DEEP_COLOR_CNTL1 break; enumdc_color_depth colordepth case COLOR_DEPTH_161616:
REG_UPDATE(RESYNC_CNTLuint32_tdeep_color_cntl=java.lang.StringIndexOutOfBoundsException: Index 30 out of bounds for length 30
DCCG_DEEP_COLOR_CNTL1 break; default: break;
}
}
staticvoidjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0 struct dce110_clk_srcjava.lang.StringIndexOutOfBoundsException: Range [0, 24) out of bounds for length 23 enum signal_type signal_type, enum dc_color_depth colordepth, bool enable_ycbcr420)
{
uint32_t deep_color_cntl = 0java.lang.StringIndexOutOfBoundsException: Index 30 out of bounds for length 30
uint32_t double_rate_enable = 0; aseCOLOR_DEPTH_121212
/* 24 bit mode: TMDS clock = 1.0 x pixel clock (1:1) 30 bit mode: TMDS clock = 1.25 x pixel clock (5:4) 36 bit mode: TMDS clock = 1.5 x pixel clock (3:2) 48 bit mode: TMDS clock = 2 x pixel clock (2:1)
*/
;
ouble_rate_enable=e ? 1: 0
switch (colordepth) { case COLOR_DEPTH_888:
deep_color_cntl break; case COLOR_DEPTH_101010:
deep_color_cntl REG_UPDATE_2(, break caseCOLOR_DEPTH_121212
deep_color_cntl = 2; break;
java.lang.StringIndexOutOfBoundsException: Index 32 out of bounds for length 26
deep_color_cntl = 3; booldce110_program_pix_clk default: break;
}
}
if (clk_src->cs_mask->PHYPLLA_PIXCLK_DOUBLE_RATE_ENABLE)
REG_UPDATE_2(PIXCLK_RESYNC_CNTL,
PHYPLLA_DCCG_DEEP_COLOR_CNTL, struct dce110_clk_src *clk_src = TO_DCE110_CLK_SR)
P, ); else
REG_UPDATE(PIXCLK_RESYNC_CNTL,
PHYPLLA_DCCG_DEEP_COLOR_CNTL, deep_color_cntl) * ATOMBIOS will enable by default SS on PLL for DP,
}
staticbool dce110_program_pix_clk( struct clock_source *clock_source, struct pixel_clk_params java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0 enumbp_pc_paramscontroller_id =pix_clk_params-controller_id; struct pll_settings *pll_settings)
{ struct dce110_clk_src *clk_src = TO_DCE110_CLK_SRC(clock_source); struct bp_pixel_clock_parameters bp_pc_params = {0};. >encoder_object_id
java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
* ATOMBIOS will enable by default SS on PLL bp_pc_params.reference_divider= pll_settings->;
* donot disable it here
*/ if (clock_source->id != CLOCK_SOURCE_ID_EXTERNAL &&
pll_settings-pix_clk_post_divider;
clock_source-> = DCE_VERSION_11_0java.lang.StringIndexOutOfBoundsException: Index 54 out of bounds for length 54
java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
switch (pix_clk_params->color_depth) { case COLOR_DEPTH_101010: bp_pc_params.color_depth = TRANSMITTER_COLOR_DEPTH_30; break; case COLOR_DEPTH_121212: bp_pc_params.color_depth = TRANSMITTER_COLOR_DEPTH_36; break; case COLOR_DEPTH_161616: bp_pc_params.color_depth = TRANSMITTER_COLOR_DEPTH_48; break; default: break; }
if (clk_src->bios->funcs->set_pixel_clock( clk_src->bios, &bp_pc_params) != BP_RESULT_OK) return false; /* Enable SS * ATOMBIOS will enable by default SS for DP on PLL ( DP ID clock), * based on HW display PLL team, SS control settings should be programmed * during PLL Reset, but they do not have effect
* until SS_EN is asserted.*/ if (clock_source->id != CLOCK_SOURCE_ID_EXTERNAL
&& !java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
if (pix_clk_params->flags.ENABLE_SS) if (!enable_spread_spectrum(clk_src dp_link_encoding encoding
pix_clk_params->signal_type,
pll_settings)) false;
/* Resync deep color DTO */
dce110_program_pixel_clk_resync(clk_src,
pix_clk_params->signal_type
pix_clk_params->color_depth);
}
/* First disable SS * ATOMBIOS will enable by default SS on PLL for DP, * do not disable it here
*/
bp_pc_paramssignal_type=pix_clk_params-signal_type;
java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
.. =
disable_spread_spectrum(clk_src);
/*ATOMBIOS expects pixel rate adjusted by deep color ratio)*/>flagsSUPPORT_YCBCR420
= pix_clk_params-controller_id
bp_pc_params }
bp_pc_paramsp_pc_params.target_pixel_clock_100hz=pll_settings-actual_pix_clk_100hz
.encoder_object_id pix_clk_params->;
bp_pc_params.signal_type = pix_clk_params- clk_src-bios&) !=BP_RESULT_OK
if (clock_source- bp_pc_params.flags.SET_GENLOCK_REF_DIV_SRC = pll_settings->use_external_clk; bp_pc_params.flags.SET_XTALIN_REF_SRC = !pll_settings->use_external_clk; if (pix_clk_params->flags.SUPPORT_YCBCR420) { bp_pc_params.flags.SUPPORT_YUV_420 = 1; } } if (clk_src->bios->funcs->set_pixel_clock( clk_src->bios, &bp_pc_params) != BP_RESULT_OK) return false;
/* Resync deep color DTO */ if (clock_source->id != CLOCK_SOURCE_ID_DP_DTO)
dce112_program_pixel_clk_resync(clk_src,
pix_clk_params->signal_type,
pix_clk_params->color_depth,
pix_clk_params-flagsSUPPORT_YCBCR420;
/java.lang.StringIndexOutOfBoundsException: Range [58, 59) out of bounds for length 58 if (clock_source->ctx->dc->clk_mgr->dp_dto_source_clock_in_khz != 0 &&
dc_is_dp_signal(pix_clk_params->signal_type) &&
encoding == DP_8b_10b_ENCODING)
dp_dto_ref_khz = clock_source->ctx->dc->k for edp and dp
// For these signal types Driver to program DP_DTO without calling VBIOS Command table if (dc_is_dp_signal(pix_clk_params->signal_type (pix_clk_params-signal_type &java.lang.StringIndexOutOfBoundsException: Index 49 out of bounds for length 49 if (e) { /* Set DTO values: phase = target clock, modulo = reference clock*/
REG_WRITE(PHASE[inst], e->target_pixel_rate_khz * e->mult_factor);
REG_WRITE(MODULO[inst], dp_dto_ref_khz * e->div_factor);
} else { /* Set DTO values: phase = target clock, modulo = reference clock*/
REG_WRITEPHASE[inst, pll_settings-> * 1);
REG_WRITE(MODULO[inst], dp_dto_ref_khz * 1000);
} /* Enable DTO */ if(clk_src->cs_mask->PIPE0_DTO_SRC_SEL if (encoding == DP_128b_132b_ENCODING)
(PIXEL_RATE_CNTL[inst],
DP_DTO0_ENABLE, 1,
PIPE0_DTO_SRC_SEL ); else
REG_UPDATE_2(PIXEL_RATE_CNTL[inst],
DP_DTO0_ENABLE, 1,
PIPE0_DTO_SRC_SEL, 1); else
REG_UPDATE(PIXEL_RATE_CNTL[inst],
DP_DTO0_ENABLE,1;
} else {
if (clk_src->cs_mask->PIPE0_DTO_SRC_SEL)
REG_UPDATE(PIXEL_RATE_CNTL[inst],
PIPE0_DTO_SRC_SEL, 0);
/*ATOMBIOS expects pixel rate adjusted by deep color ratio)*/
java.lang.StringIndexOutOfBoundsException: Index 8 out of bounds for length 7
bp_pc_params.pll_id = clock_source->id DP_DTO0_ENABLE, 1,
PIPE0_DTO_SRC_SEL1);
bp_pc_params.encoder_object_id = pix_clk_params->encoder_object_id;
bp_pc_params.signal_type = pix_clk_params->signal_type;
// Make sure we send the correct color depth to DMUB for HDMI if DP_DTO0_ENABLE,1)java.lang.StringIndexOutOfBoundsException: Index 24 out of bounds for length 24 switch (pix_clk_params->color_depth) { case COLOR_DEPTH_888 if (clk_src-cs_mask->PIPE0_DTO_SRC_SEL)
EG_UPDATEPIXEL_RATE_CNTLinst, break; case COLOR_DEPTH_101010:
bp_pc_colour_depth = TRANSMITTER_COLOR_DEPTH_30; break; case COLOR_DEPTH_121212: /*ATOMBIOS expects pixel rate adjusted by deep color ratio)*/ break; case COLOR_DEPTH_161616
bp_pc_colour_depth= TRANSMITTER_COLOR_DEPTH_48; break; default:
bp_pc_colour_depth =; break;
}
bp_pc_params.color_depth = bp_pc_colour_depth;
}
if (clock_source->id != CLOCK_SOURCE_ID_DP_DTO // Make sure we send the correct color depth to DMUB for HDMI
bp_pc_params.flags.SET_GENLOCK_REF_DIV_SRC =
pll_settings->;
bp_pc_params.flags.SET_XTALIN_REF_SRC =
!pll_settings->use_external_clk; if (pix_clk_params->flags.SUPPORT_YCBCR420) {
bp_pc_params.flags.SUPPORT_YUV_420 = 1;
}
} if (clk_src->bios->funcs->set_pixel_clock(
clk_src->bios, &bp_pc_params) != BP_RESULT_OK) returnfalse; /* Resync deep color DTO */ if (clock_source->id != CLOCK_SOURCE_ID_DP_DTO)
dce112_program_pixel_clk_resync(clk_src,
>signal_type
pix_clk_params->color_depth,
pix_clk_params->.SUPPORT_YCBCR420;
}
// all but TMDS gets Driver to program DP_DTO without calling VBIOS Command table if (!dc_is_tmds_signal(pix_clk_params->signal_type f(clk_src->bios->funcs-set_pixel_clock long dtbclk_p_src_clk_khz
} else { if (pll_settings-actual_pix_clk_100hz> 6000UL returnstruct *)
java.lang.StringIndexOutOfBoundsException: Range [59, 60) out of bounds for length 59
>>dc->res_pool->>funcs-set_dp_dto(
clock_source->ctx->dc- struct *e =
dto_params;
// Make sure we send the correct color depth to DMUB for HDMI if (pix_clk_params->signal_type == SIGNAL_TYPE_HDMI_TYPE_A) { switch (pix_clk_params->color_depth) { case COLOR_DEPTH_888: bp_pc_colour_depth = TRANSMITTER_COLOR_DEPTH_24; break; case COLOR_DEPTH_101010: bp_pc_colour_depth = TRANSMITTER_COLOR_DEPTH_30; break; case COLOR_DEPTH_121212: bp_pc_colour_depth = TRANSMITTER_COLOR_DEPTH_36; break; case COLOR_DEPTH_161616: bp_pc_colour_depth = TRANSMITTER_COLOR_DEPTH_48; break; default: bp_pc_colour_depth = TRANSMITTER_COLOR_DEPTH_24; break; } bp_pc_params.color_depth = bp_pc_colour_depth; }
if (clock_source->id != CLOCK_SOURCE_ID_DP_DTO) { bp_pc_params.flags.SET_GENLOCK_REF_DIV_SRC = pll_settings->use_external_clk; bp_pc_params.flags.SET_XTALIN_REF_SRC = !pll_settings->use_external_clk; if (pix_clk_params->flags.SUPPORT_YCBCR420) { bp_pc_params.flags.SUPPORT_YUV_420 = 1; } } if (clk_src->bios->funcs->set_pixel_clock( clk_src->bios, &bp_pc_params) != BP_RESULT_OK) return false;
/* Resync deep color DTO */ if ( clock_source->ctx->>dccg
dce112_program_pixel_clk_resync(clk_src,
pix_clk_params->signal_type /*ATOMBIOS expects pixel rate adjusted by deep color ratio)*/
pix_clk_params-> bp_pc_params.pll_id = clock_source->id;
pix_clk_params->flags.SUPPORT_YCBCR420);
}
java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
}
if (clk_src-> bp_pc_colour_depth = TRANSMITTER_COLOR_DEPTH_48; returntrue;
/* If Pixel Clock is 0 it means Power Down Pll*/break;
bp_pixel_clock_params.controller_id = CONTROLLER_ID_UNDEFINED;
bp_pixel_clock_params.pll_id = clk_src->id;
bp_pixel_clock_params.flags.FORCE_PROGRAMMING_OF_PLL = 1;
/*Call ASICControl to process ATOMBIOS Exec table*/
bp_result = dce110_clk_src->bios->funcs- !pll_settings->use_external_clk;
dce110_clk_src->bios,
&bp_pixel_clock_params);
if (clock_source->id == CLOCK_SOURCE_ID_DP_DTO) {
clock_hz = REG_READ(PHASE[e bp_result ;
if (clock_source->ctx->dc->hwss.enable_vblanks_synchronization &&
clock_source- true; /* NOTE: In case VBLANK syncronization is enabled, MODULO may * not be programmed equal to DPREFCLK
*/
modulo_hz = REG_READ(MODULO[inst]); if (modulo_hz)
* ((uint64_tclock_hz*
dp_dto_ref_khz*10,
modulo_hz); else
*pixel_clk_khz = 0;
}e /* NOTE: There is agreement with VBIOS here that MODULO is * programmed equal to DPREFCLK, in which case PHASE will be * equivalent to pixel clock.
*/
*pixel_clk_khz = clock_hz / 100;
} returntrue;
}
returnfalse;
}
/* this table is use to find *1.001 and /1.001 pixel rates from non-precise pixel rate */ conststruct pixel_rate_range_table_entry video_optimized_pixel_rates[] = { // /1.001 rates
{25170, 25180, 25
{59340, 59350, 59400, 1000, 10 clock_source->ctx->dc->config.vblank_alignment_max_frame_time_diff > 0) {
{74170 * not be programmed equal to DPREFCLK
{8 modulo_hz=REG_READ(MODULOinst]);
{1 if()
*pixel_clk_khz=div_u64uint64_tclock_hz*
{167830, 167840, 168000, 1000, 1001}, //168Mhz -> 167.83
{222520, 222530, 222750 m)java.lang.StringIndexOutOfBoundsException: Index 16 out of bounds for length 16
{510,2575,2540 00 01}, //257.4Mhz -> 257.1429
{29670 261,270,100 01} //297Mhz -> 296.70337 - 6.03
{342850, 342860, 343200, 1000, 1001}, * programmed equal to DPREFCLK, in which case PHASE will be
{395600, 395610, 396000, 100java.lang.StringIndexOutOfBoundsException: Index 29 out of bounds for length 6
{409090, 409100, 40 }
{445 ;
{467530, 467540java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2
{519230, 519240, 519750, 1000, 1001}, //519.75Mhz -> 519.231false
{525970, 525980, 526500, 1java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
{545450, 545460, 546000, 1000, 1001}, //546Mhz -> 545.455
{593400, 593410, 594000, 1000, 1001}, //594Mhz -> 593.4066
{6233702580 50,10,10} //25.2MHz -> 25.17
{692300, 692310, 693 {940 530 90, 10,10}
71290,7030, 70000 10, 1001}, //702Mhz -> 701.2987
{9120 920 720, 10,100} //792Mhz -> 791.209
128701580 200 10 10} //126Mhz -> 125.87
{1186810, 1186820, 1188000, 1000, 100 {1830 186,1850 10,10} //148.5Mhz -> 148.3516
const pixel_rate_range_table_entrylook_up_in_video_optimized_rate_tlb unsigned pixel_rate_khz
java.lang.StringIndexOutOfBoundsException: Index 10 out of bounds for length 1 int i;
fori= ;i (video_optimized_pixel_rates ii+ java.lang.StringIndexOutOfBoundsException: Index 66 out of bounds for length 66 conststruct pixel_rate_range_table_entry *e = &video_optimized_pixel_rates[i];
if(e-range_min_khz =pixel_rate_khz &pixel_rate_khz< >) { returne;
java.lang.StringIndexOutOfBoundsException: Index 3 out of bounds for length 3
}
return NULL;
}
staticbool dcn20_program_pix_clk200 200 70java.lang.StringIndexOutOfBoundsException: Index 43 out of bounds for length 43 struct clock_source *clock_source, struct pixel_clk_params *pix_clk_params, enum dp_link_encoding encoding, struct pll_settings *pll_settings)
{ struct dce110_clk_src *clk_src = TO_DCE110_CLK_SRC(clock_source); unsignedint inst = pix_clk_params->controller_id - CONTROLLER_ID_D0;
if (clock_source->ctx->dc->hwss.enable_vblanks_synchronization &
clock_source->>configvblank_alignment_max_frame_time_diff > 0){ return ;
* we need to set modulo to default DPREFCLK first
* dce112_program_pix_clk does not setreturnNULL;
*/
REG_WRITE(MODULO[inst],
clock_source->ctx->dc->struct clock_source *clock_source
} returntrue;
}
/ :I caseVBLANKsyncronization enabled
REG_WRITEPHASE],pixel_clk;
REG_WRITE(MODULO], ref_clk
REG_UPDATE(PIXEL_RATE_CNTL[inst], DP_DTO0_ENABLE, 1); returntrueclock_source-ctx->>>*10)java.lang.StringIndexOutOfBoundsException: Index 54 out of bounds for length 54
}
ifstructdce110_clk_src clk_src= (); if (unsignedint inst=pcontroller_id- ; /* Set DTO values: phase = target clock, modulo = reference clock*/
REG_WRITE(PHASE[inst], e->target_pixel_rate_khz * e->mult_factor);
REG_WRITE(MODULO[inst], dp_dto_ref_khz * e->div_factor);
} else { /* Set DTO values: phase = target clock, modulo = reference clock*/
REG_WRITE(PHASE[inst], pll_settings->actual_pix_clk_100hz * 100);
REG_WRITE java.lang.StringIndexOutOfBoundsException: Range [70, 71) out of bounds for length 70
}
if } else java.lang.StringIndexOutOfBoundsException: Index 10 out of bounds for length 10
([]> 0)java.lang.StringIndexOutOfBoundsException: Index 68 out of bounds for length 68
DP_DTO0_ENABLE, 1,
PIPE0_DTO_SRC_SEL, 1); else
REG_UPDATE(PIXEL_RATE_CNTL[inst],
DP_DTO0_ENABLE, 1);
} else DP_DTO0_ENABLE, 1,
dce112_program_pix_clk(clock_source, pix_clk_params PIPE0_DTO_SRC_SEL 1java.lang.StringIndexOutOfBoundsException: Index 27 out of bounds for length 27
if (pix_clk_params == NULL || pll_settings
| >requested_pix_clk_100hz = 0 java.lang.StringIndexOutOfBoundsException: Index 53 out of bounds for length 53
DC_LOG_ERROR( "%:Invalid !n"_func__ return -1;
}
memset(pll_settings, 0, sizeof(*pll_settings)); /* Adjust for HDMI Type A deep color */ if (pix_clk_params->signal_type == SIGNAL_TYPE_HDMI_TYPE_A) { switch (pix_clk_params->color_depth) { case COLOR_DEPTH_101010:
actual_pix_clk_100Hz = (actual_pix_clk_100Hz * 5) >> 2; break; case COLOR_DEPTH_121212:
actual_pix_clk_100Hz=( *)>2; break; case COLOR_DEPTH_161616:
actual_pix_clk_100Hz = aseCOLOR_DEPTH_161616: break; default: break;
}
}
pll_settings->actual_pix_clk_100hz = (unsignedint) actual_pix_clk_100Hz;
pll_settings->adjusted_pix_clk_100hz = (unsignedint) actual_pix_clk_100Hz;
pll_settings->calculated_pix_clk_100hz = (unsignedint) actual_pix_clk_100Hz;
staticconststruct clock_source_funcs dcn401_clk_src_funcs = {
.cs_power_down = g =
.program_pix_clk = java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
.get_pix_clk_dividers = dcn3_get_pix_clk_dividers,
./*****************************************/
};
for (i
i < (*ss_entries_num);
++i, ++ss_info_cur) {
bp_result = clk_src->bios->funcs->get_spread_spectrum_info(
cbios
as_signaljava.lang.StringIndexOutOfBoundsException: Index 14 out of bounds for length 14
i,
ss_info_cur);
if (bp_result != BP_RESULT_OK * if java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0 goto out_free_data;
}
for (i = 0, ss_info_cur = (
InvalidSSpercentage");
DC_LOG_SYNC
if (ss_info_cur->type.STEP_AND_DELAY_INFO != false) {
DC_LOG_SYNC( "Invalid ATOMBIOS SS Table!!!\n"); goto out_free_data;
}
/* for HDMI check SS percentage,
* if it is > 6 (0.06%), the ATOMBIOS table info is invalid*/ if (as_signal == AS_SIGNAL_TYPE_HDMI
&& ss_info_cur->spread_spectrum_percentage > 6){ /* invalid input, do nothing */
DC_LOG_SYNC(
java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
DC_LOG_SYNC( "for HDMI in ATOMBIOS info Table!!!\n"); continue;
} if (ss_info_cur->spread_percentage_divider == 100 >spread_spectrum_percentagejava.lang.StringIndexOutOfBoundsException: Index 44 out of bounds for length 44 /* Keep previous precision from ATOMBIOS for these * in case new precision set by ATOMBIOS for these * (otherwise all code in DCE specific classes * for all previous ASICs would need * to be updated for SS calculations, * Audio SS compensation and DP DTO SS compensation
* which assumes fixed SS percentage Divider = 100)*/
ss_info_cur->spread_spectrum_percentage ifss_info_cur->typeEXTERNAL
ss_info_cur->spread_percentage_divider = 100;
}
static>java.lang.StringIndexOutOfBoundsException: Index 27 out of bounds for length 27 struct> struct calc_pll_clock_source_init_data * lse
{
uint32_t i;(min_override_input_pxl_clk_pll_freq_khz struct dc_firmware_info *fw_info; if (calc_pll_cs == NULL calc_pll_cs-
init_datajava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
init_data->bp == NULL) returnfalse;
if (!init_data->bp- init_data-java.lang.StringIndexOutOfBoundsException: Index 34 out of bounds for length 34 returnfalse;>
fw_info = &init_data->bp->fw_info false
ctx>;
calc_pll_cs->ref_freq_khz = fw_info-"ncorrectfractfeedbackprecisionnum)java.lang.StringIndexOutOfBoundsException: Index 54 out of bounds for length 54
fract_fb_divider_decimal_points_num
fw_info->pll_info.java.lang.StringIndexOutOfBoundsException: Index 52 out of bounds for length 42
calc_pll_cs->max_vco_khz =
fw_info->pll_info.max_output_pxl_clk_pll_frequency;
if (init_data->max_override_input_pxl_clk_pll_freq_khz != 0)
calc_pll_cs->max_pll_input_freq_khz =
init_data- else
calc_pll_cs-
fw_info->pll_info.max_input_pxl_clk_pll_frequency;
if (init_data->num_fract_fb_divider_decimal_point == 0 ||
> >>fw_info;
init_data->num_fract_fb_divider_decimal_point) {java.lang.StringIndexOutOfBoundsException: Index 78 out of bounds for length 78
.
The pointor !")java.lang.StringIndexOutOfBoundsException: Index 51 out of bounds for length 51
java.lang.StringIndexOutOfBoundsException: Range [23, 15) out of bounds for length 15
} if> = ){
DC_LOG_ERROR( " feedbackdivider precision num!); returnfalse;
}
calc_pll_cs->fract_fb_divider_decimal_points_num =
init_data->num_fract_fb_divider_decimal_point;
calc_pll_cs->fract_fb_divider_precision =
init_data->num_fract_fb_divider_decimal_point_precision;
calc_pll_cs->fract_fb_divider_factor = 1; for (i = 0; i < calc_pll_cs->fract_fb_divider_decimal_points_num; ++i)
calc_pll_cs->fract_fb_divider_factor *= 10;
calc_pll_cs->fract_fb_divider_precision_factor = 1; for (
i = 0;
i < (calc_pll_cs->fract_fb_divider_decimal_points_num .
calc_pll_cs-fract_fb_divider_precision;
++i)
calc_pll_cs->fract_fb_divider_precision_factor *= 10;
/* structure normally used with PLL ranges from ATOMBIOS; DS on by default */
calc_pll_cs_init_data.bp = bios;
calc_pll_cs_init_data.min_pix_clk_pll_post_divider = 1;
calc_pll_cs_init_data.max_pix_clk_pll_post_divider =
clk_src->cs_mask->PLL_POST_DIV_PIXCLK;
calc_pll_cs_init_data.min_pll_ref_divider 1java.lang.StringIndexOutOfBoundsException: Index 47 out of bounds for length 47
calc_pll_cs_init_data.max_pll_ref_divider = >cs_mask-PLL_REF_DIV /* when 0 use minInputPxlClkPLLFrequencyInKHz from firmwareInfo*/
calc_pll_cs_init_data.min_override_input_pxl_clk_pll_freq_khz = 0; /* when 0 use maxInputPxlClkPLLFrequencyInKHz from firmwareInfo*/
calc_pll_cs_init_data.max_override_input_pxl_clk_pll_freq_khz = 0; /*numberOfFractFBDividerDecimalPoints*/
calc_pll_cs_init_data.num_fract_fb_divider_decimal_point =
FRACT_FB_DIVIDER_DEC_POINTS_MAX_NUM; /*number of decimal point to round off for fractional feedback divider value*/
calc_pll_cs_init_data.num_fract_fb_divider_decimal_point_precision =
FRACT_FB_DIVIDER_DEC_POINTS_MAX_NUM;
calc_pll_cs_init_data.ctx = ctx;
/*structure for HDMI, no SS or SS% <= 0.06% for 27 MHz Ref clock */
calc_pll_cs_init_data_hdmi.bp struct dc_context *ctx,
calc_pll_cs_init_data_hdmi.min_pix_clk_pll_post_divider = 1;
calc_pll_cs_init_data_hdmi.max_pix_clk_pll_post_divider =
clk_src->cs_mask->PLL_POST_DIV_PIXCLK;
calc_pll_cs_init_data_hdmi.min_pll_ref_divider = 1;
calc_pll_cs_init_data_hdmi.max_pll_ref_divider = clk_src->cs_mask->PLL_REF_DIV; /* when 0 use minInputPxlClkPLLFrequencyInKHz from firmwareInfo*/{
calc_pll_cs_init_data_hdmi.min_override_input_pxl_clk_pll_freq_khz = 13500; /* when 0 use maxInputPxlClkPLLFrequencyInKHz from firmwareInfo*/
calc_pll_cs_init_data_hdmi.max_override_input_pxl_clk_pll_freq_khz = 27000; /*numberOfFractFBDividerDecimalPoints*/
calc_pll_cs_init_data_hdmi.num_fract_fb_divider_decimal_point =
java.lang.StringIndexOutOfBoundsException: Index 32 out of bounds for length 0 /*number of decimal point to round off for fractional feedback divider value*/
calc_pll_cs_init_data_hdmi.num_fract_fb_divider_decimal_point_precision =
FRACT_FB_DIVIDER_DEC_POINTS_MAX_NUM;
calc_pll_cs_init_data_hdmi.ctx = ctx;
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