if (crtc_state->has_pch_encoder) { int fdi_dotclock = intel_dotclock_calculate(intel_fdi_link_freq(display, crtc_state),
&crtc_state->fdi_m_n); int dotclock = crtc_state->hw.adjusted_mode.crtc_clock;
/* * FDI already provided one idea for the dotclock. * Yell if the encoder disagrees. Allow for slight * rounding differences.
*/
drm_WARN(display->drm, abs(fdi_dotclock - dotclock) > 1, "FDI dotclock and encoder dotclock mismatch, fdi: %i, encoder: %i\n",
fdi_dotclock, dotclock);
}
}
INTEL_DISPLAY_STATE_WARN(display, !!encoder->base.crtc != enabled, "encoder's enabled state mismatch (expected %i, found %i)\n",
!!encoder->base.crtc, enabled);
if (!encoder->base.crtc) { bool active;
active = encoder->get_hw_state(encoder, &pipe);
INTEL_DISPLAY_STATE_WARN(display, active, "encoder detached but still enabled on pipe %c.\n",
pipe_name(pipe));
}
}
}
/* we keep both pipes enabled on 830 */ if (display->platform.i830 && hw_crtc_state->hw.active)
hw_crtc_state->hw.active = sw_crtc_state->hw.active;
INTEL_DISPLAY_STATE_WARN(display,
sw_crtc_state->hw.active != hw_crtc_state->hw.active, "crtc active state doesn't match with hw state (expected %i, found %i)\n",
sw_crtc_state->hw.active, hw_crtc_state->hw.active);
INTEL_DISPLAY_STATE_WARN(display, crtc->active != sw_crtc_state->hw.active, "transitional active state does not match atomic hw state (expected %i, found %i)\n",
sw_crtc_state->hw.active, crtc->active);
active = encoder->get_hw_state(encoder, &pipe);
INTEL_DISPLAY_STATE_WARN(display, active != sw_crtc_state->hw.active, "[ENCODER:%i] active %i with crtc active %i\n",
encoder->base.base.id, active,
sw_crtc_state->hw.active);
INTEL_DISPLAY_STATE_WARN(display, active && primary_crtc->pipe != pipe, "Encoder connected to wrong pipe %c\n",
pipe_name(pipe));
if (active)
intel_encoder_get_config(encoder, hw_crtc_state);
}
if (!sw_crtc_state->hw.active) goto destroy_state;
intel_pipe_config_sanity_check(hw_crtc_state);
if (!intel_pipe_config_compare(sw_crtc_state,
hw_crtc_state, false)) {
INTEL_DISPLAY_STATE_WARN(display, 1, "pipe state doesn't match!\n");
intel_crtc_state_dump(hw_crtc_state, NULL, "hw state");
intel_crtc_state_dump(sw_crtc_state, NULL, "sw state");
}
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