staticinlinevoid intel_ring_advance(struct i915_request *rq, u32 *cs)
{ /* Dummy function. * * This serves as a placeholder in the code so that the reader * can compare against the preceding intel_ring_begin() and * check that the number of dwords emitted matches the space * reserved for the command packet (i.e. the value passed to * intel_ring_begin()).
*/
GEM_BUG_ON((rq->ring->vaddr + rq->ring->emit) != cs);
GEM_BUG_ON(!IS_ALIGNED(rq->ring->emit, 8)); /* RING_TAIL qword align */
}
staticinlinebool
intel_ring_offset_valid(conststruct intel_ring *ring, unsignedint pos)
{ if (pos & -ring->size) /* must be strictly within the ring */ returnfalse;
if (!IS_ALIGNED(pos, 8)) /* must be qword aligned */ returnfalse;
returntrue;
}
staticinline u32 intel_ring_offset(conststruct i915_request *rq, void *addr)
{ /* Don't write ring->size (equivalent to 0) as that hangs some GPUs. */
u32 offset = addr - rq->ring->vaddr;
/* * "Ring Buffer Use" * Gen2 BSpec "1. Programming Environment" / 1.4.4.6 * Gen3 BSpec "1c Memory Interface Functions" / 2.3.4.5 * Gen4+ BSpec "1c Memory Interface and Command Stream" / 5.3.4.5 * "If the Ring Buffer Head Pointer and the Tail Pointer are on the * same cacheline, the Head Pointer must not be greater than the Tail * Pointer." * * We use ring->head as the last known location of the actual RING_HEAD, * it may have advanced but in the worst case it is equally the same * as ring->head and so we should never program RING_TAIL to advance * into the same cacheline as ring->head.
*/ #define cacheline(a) round_down(a, CACHELINE_BYTES)
GEM_BUG_ON(cacheline(tail) == cacheline(head) && tail < head); #undef cacheline
}
staticinlineunsignedint
intel_ring_set_tail(struct intel_ring *ring, unsignedint tail)
{ /* Whilst writes to the tail are strictly order, there is no * serialisation between readers and the writers. The tail may be * read by i915_request_retire() just as it is being updated * by execlists, as although the breadcrumb is complete, the context * switch hasn't been seen.
*/
assert_ring_tail_valid(ring, tail);
ring->tail = tail; return tail;
}
staticinlineunsignedint
__intel_ring_space(unsignedint head, unsignedint tail, unsignedint size)
{ /* * "If the Ring Buffer Head Pointer and the Tail Pointer are on the * same cacheline, the Head Pointer must not be greater than the Tail * Pointer."
*/
GEM_BUG_ON(!is_power_of_2(size)); return (head - tail - CACHELINE_BYTES) & (size - 1);
}
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