/* SPDX-License-Identifier: GPL-2.0-only OR MIT */ /* Copyright (c) 2023 Imagination Technologies Ltd. */ #ifndef PVR_ROGUE_FWIF_SF_H#define PVR_ROGUE_FWIF_SF_H/* ****************************************************************************** * *DO*NOT* rearrange or delete lines in rogue_fw_log_sfgroups or stid_fmts * WILL BREAK fw tracing message compatibility with previous * fw versions. Only add new ones, if so required. ****************************************************************************** /* Available log groups. */ enum rogue_fw_log_sfgroups {#define PVR_SF_STRING_MAX_SIZE 256U/* pair of string format id and string formats */ struct rogue_fw_stid_fmt {char name[PVR_SF_STRING_MAX_SIZE];/* * The symbolic names found in the table above are assigned an u32 value of * the following format: * 31 30 28 27 20 19 16 15 12 11 0 bits * - --- ---- ---- ---- ---- ---- ---- ---- * 0-11: id number * 12-15: group id number * 16-19: number of parameters * 20-27: unused * 28-30: active: identify SF packet, otherwise regular int32 * 31: reserved for signed/unsigned compatibility * * The following macro assigns those values to the enum generated SF ids list. #define ROGUE_FW_LOG_IDMARKER (0x70000000U)#define ROGUE_FW_LOG_CREATESFID(a, b, e) ((u32)(a) | ((u32)(b) << 12) | ((u32)(e) << 16) | \#define ROGUE_FW_LOG_IDMASK (0xFFF00000)#define ROGUE_FW_LOG_VALIDID(I) (((I) & ROGUE_FW_LOG_IDMASK) == ROGUE_FW_LOG_IDMARKER)/* Return the group id that the given (enum generated) id belongs to */ #define ROGUE_FW_SF_GID(x) (((u32)(x) >> 12) & 0xfU)/* Returns how many arguments the SF(string format) for the given (enum generated) id requires */ #define ROGUE_FW_SF_PARAMNUM(x) (((u32)(x) >> 16) & 0xfU)/* pair of string format id and string formats */ struct rogue_km_stid_fmt {const char *name;static const struct rogue_km_stid_fmt stid_fmts[] = {"You should not use this string" },"Kick 3D: FWCtx 0x%08.8x @ %d, RTD 0x%08x. Partial render:%d, CSW resume:%d, prio:%d" },"3D finished, HWRTData0State=%x, HWRTData1State=%x" },"Kick 3D TQ: FWCtx 0x%08.8x @ %d, CSW resume:%d, prio: %d" },"3D Transfer finished" },"Kick Compute: FWCtx 0x%08.8x @ %d, prio: %d" },"Compute finished" },"Kick TA: FWCtx 0x%08.8x @ %d, RTD 0x%08x. First kick:%d, Last kick:%d, CSW resume:%d, prio:%d" },"TA finished" },"Restart TA after partial render" },"Resume TA without partial render" },"Out of memory! Context 0x%08x, HWRTData 0x%x" },"Kick TLA: FWCtx 0x%08.8x @ %d, prio:%d" },"TLA finished" },"cCCB Woff update = %d, DM = %d, FWCtx = 0x%08.8x" },"UFO Checks for FWCtx 0x%08.8x @ %d" },"UFO Check: [0x%08.8x] is 0x%08.8x requires 0x%08.8x" },"UFO Checks succeeded" },"UFO PR-Check: [0x%08.8x] is 0x%08.8x requires >= 0x%08.8x" },"UFO SPM PR-Checks for FWCtx 0x%08.8x" },"UFO SPM special PR-Check: [0x%08.8x] is 0x%08.8x requires >= ????????, [0x%08.8x] is ???????? requires 0x%08.8x" },"UFO Updates for FWCtx 0x%08.8x @ %d" },"UFO Update: [0x%08.8x] = 0x%08.8x" },"ASSERT Failed: line %d of:" },"HWR: Lockup detected on DM%d, FWCtx: 0x%08.8x" },"HWR: Reset fw state for DM%d, FWCtx: 0x%08.8x, MemCtx: 0x%08.8x" },"HWR: Reset HW" },"HWR: Lockup recovered." },"HWR: False lockup detected for DM%u" },"Alignment check %d failed: host = 0x%x, fw = 0x%x" },"GP USC triggered" },"Overallocating %u temporary registers and %u shared registers for breakpoint handler" },"Setting breakpoint: Addr 0x%08.8x" },"Store breakpoint state" },"Unsetting BP Registers" },"Active RTs expected to be zero, actually %u" },"RTC present, %u active render targets" },"Estimated Power 0x%x" },"RTA render target %u" },"Kick RTA render %u of %u" },"HWR sizes check %d failed: addresses = %d, sizes = %d" },"Pow: DUSTS_ENABLE = 0x%x" },"Pow: On(1)/Off(0): %d, Units: 0x%08.8x" },"Pow: Changing number of dusts from %d to %d" },"Pow: Sidekick ready to be powered down" },"Pow: Request to change num of dusts to %d (bPowRascalDust=%d)" },"No ZS Buffer used for partial render (store)" },"No Depth/Stencil Buffer used for partial render (load)" },"HWR: Lock-up DM%d FWCtx: 0x%08.8x" },"MLIST%d checker: CatBase TE=0x%08x (%d Pages), VCE=0x%08x (%d Pages), ALIST=0x%08x, IsTA=%d" },"MLIST%d checker: MList[%d] = 0x%08x" },"MLIST%d OK" },"MLIST%d is empty" },"MLIST%d checker: CatBase TE=0x%08x%08x, VCE=0x%08x%08x, ALIST=0x%08x%08x, IsTA=%d" },"3D OQ flush kick" },"HWPerf block ID (0x%x) unsupported by device" },"Setting breakpoint: Addr 0x%08.8x DM%u" },"Kick RTU: FWCtx 0x%08.8x @ %d, prio: %d" },"RDM finished on context %u" },"Kick SHG: FWCtx 0x%08.8x @ %d, prio: %d" },"SHG finished" },"FBA finished on context %u" },"UFO Checks failed" },"Kill DM%d start" },"Kill DM%d complete" },"FC%u cCCB Woff update = %u" },"Kick RTU: FWCtx 0x%08.8x @ %d, prio: %d, Frame Context: %d" },"GPU init" },"GPU Units init (# mask: 0x%x)" },"Register access cycles: read: %d cycles, write: %d cycles, iterations: %d" },"Register configuration added. Address: 0x%x Value: 0x%x%x" },"Register configuration applied to type %d. (0:pow on, 1:Rascal/dust init, 2-5: TA,3D,CDM,TLA, 6:All)" },"Perform TPC flush." },"GPU has locked up (see HWR logs for more info)" },"HWR has been triggered - GPU has overrun its deadline (see HWR logs)" },"HWR has been triggered - GPU has failed a poll (see HWR logs)" },"Doppler out of memory event for FC %u" },"UFO SPM special PR-Check: [0x%08.8x] is 0x%08.8x requires >= 0x%08.8x" },"UFO SPM special PR-Check: [0x%08.8x] is 0x%08.8x requires 0x%08.8x" },"TIMESTAMP -> [0x%08.8x]" },"UFO RMW Updates for FWCtx 0x%08.8x @ %d" },"UFO Update: [0x%08.8x] = 0x%08.8x" },"Kick Null cmd: FWCtx 0x%08.8x @ %d" },"RPM Out of memory! Context 0x%08x, SH requestor %d" },"Discard RTU due to RPM abort: FWCtx 0x%08.8x @ %d, prio: %d, Frame Context: %d" },"Deferring DM%u from running context 0x%08x @ %d (deferred DMs = 0x%08x)" },"Deferring DM%u from running context 0x%08x @ %d to let other deferred DMs run (deferred DMs = 0x%08x)" },"No longer deferring DM%u from running context = 0x%08x @ %d (deferred DMs = 0x%08x)" },"FWCCB for DM%u is full, we will have to wait for space! (Roff = %u, Woff = %u)" },"FWCCB for OSid %u is full, we will have to wait for space! (Roff = %u, Woff = %u)" },"Host Sync Partition marker: %d" },"Host Sync Partition repeat: %d" },"Core clock set to %d Hz" },"Compute Queue: FWCtx 0x%08.8x, prio: %d, queue: 0x%08x%08x (Roff = %u, Woff = %u, Size = %u)" },"Signal check failed, Required Data: 0x%x, Address: 0x%08x%08x" },"Signal update, Snoop Filter: %u, MMU Ctx: %u, Signal Id: %u, Signals Base: 0x%08x%08x" },"Signalled the previously waiting FWCtx: 0x%08.8x, OSId: %u, Signal Address: 0x%08x%08x" },"Compute stalled" },"Compute stalled (Roff = %u, Woff = %u, Size = %u)" },"Compute resumed (Roff = %u, Woff = %u, Size = %u)" },"Signal update notification from the host, PC Physical Address: 0x%08x%08x, Signal Virtual Address: 0x%08x%08x" },"Signal update from DM: %u, OSId: %u, PC Physical Address: 0x%08x%08x" },"DM: %u signal check failed" },"Kick TDM: FWCtx 0x%08.8x @ %d, prio:%d" },"TDM finished" },"MMU_PM_CAT_BASE_TE[%d]_PIPE[%d]: 0x%08x 0x%08x)" },"BRN 54141 HIT" },"BRN 54141 Dummy TA kicked" },"BRN 54141 resume TA" },"BRN 54141 double hit after applying WA" },"BRN 54141 Dummy TA VDM base address: 0x%08x%08x" },"Signal check failed, Required Data: 0x%x, Current Data: 0x%x, Address: 0x%08x%08x" },"TDM stalled (Roff = %u, Woff = %u)" },"Write Offset update notification for stalled FWCtx 0x%08.8x" },"Changing OSid %d's priority from %u to %u" },"Compute resumed" },"Kick TLA: FWCtx 0x%08.8x @ %d. (PID:%d, prio:%d, frame:%d, ext:0x%08x, int:0x%08x)" },"Kick TDM: FWCtx 0x%08.8x @ %d. (PID:%d, prio:%d, frame:%d, ext:0x%08x, int:0x%08x)" },"Kick TA: FWCtx 0x%08.8x @ %d, RTD 0x%08x, First kick:%d, Last kick:%d, CSW resume:%d. (PID:%d, prio:%d, frame:%d, ext:0x%08x, int:0x%08x)" },"Kick 3D: FWCtx 0x%08.8x @ %d, RTD 0x%08x, Partial render:%d, CSW resume:%d. (PID:%d, prio:%d, frame:%d, ext:0x%08x, int:0x%08x)" },"Kick 3D TQ: FWCtx 0x%08.8x @ %d, CSW resume:%d. (PID:%d, prio:%d, frame:%d, ext:0x%08x, int:0x%08x)" },"Kick Compute: FWCtx 0x%08.8x @ %d. (PID:%d, prio:%d, ext:0x%08x, int:0x%08x)" },"Kick RTU: FWCtx 0x%08.8x @ %d, Frame Context:%d. (PID:%d, prio:%d, frame:%d, ext:0x%08x, int:0x%08x)" },"Kick SHG: FWCtx 0x%08.8x @ %d. (PID:%d, prio:%d, frame:%d, ext:0x%08x, int:0x%08x)" },"Reconfigure CSRM: special coeff support enable %d." },"TA requires max coeff mode, deferring: %d." },"3D requires max coeff mode, deferring: %d." },"Kill DM%d failed" },"Thread Queue is full, we will have to wait for space! (Roff = %u, Woff = %u)" },"Thread Queue is fencing, we are waiting for Roff = %d (Roff = %u, Woff = %u)" },"DM %d failed to Context Switch on time. Triggered HCS (see HWR logs)." },"HCS changed to %d ms" },"Updating Tiles In Flight (Dusts=%d, PartitionMask=0x%08x, ISPCtl=0x%08x%08x)" }," Phantom %d: USCTiles=%d" },"Isolation grouping is disabled" },"Isolation group configured with a priority threshold of %d" },"OS %d has come online" },"OS %d has gone offline" },"Signalled the previously stalled FWCtx: 0x%08.8x, OSId: %u, Signal Address: 0x%08x%08x" },"TDM Queue: FWCtx 0x%08.8x, prio: %d, queue: 0x%08x%08x (Roff = %u, Woff = %u, Size = %u)" },"Reset TDM Queue Read Offset: FWCtx 0x%08.8x, queue: 0x%08x%08x (Roff = %u becomes 0, Woff = %u, Size = %u)" },"User Mode Queue mismatched stream start: FWCtx 0x%08.8x, queue: 0x%08x%08x (Roff = %u, StreamStartOffset = %u)" },"GPU deinit" },"GPU units deinit" },"Initialised OS %d with config flags 0x%08x" },"UFO limit exceeded %d/%d" },"3D Dummy stencil store" },"Initialised OS %d with config flags 0x%08x and extended config flags 0x%08x" },"Unknown Command (eCmdType=0x%08x)" },"UFO forced update: FWCtx 0x%08.8x @ %d [0x%08.8x] = 0x%08.8x" },"UFO forced update NOP: FWCtx 0x%08.8x @ %d [0x%08.8x] = 0x%08.8x, reason %d" },"TDM context switch check: Roff %u points to 0x%08x, Match=%u" },"OSid %d CCB init status: %d (1-ok 0-fail): kCCBCtl@0x%x kCCB@0x%x fwCCBCtl@0x%x fwCCB@0x%x" },"FW IRQ # %u @ %u" },"Setting breakpoint: Addr 0x%08.8x DM%u usc_breakpoint_ctrl_dm = %u" },"Invalid KCCB setup for OSid %u: KCCB 0x%08x, KCCB Ctrl 0x%08x" },"Invalid KCCB cmd (%u) for OSid %u @ KCCB 0x%08x" },"FW FAULT: At line %d in file 0x%08x%08x, additional data=0x%08x" },"Invalid breakpoint: MemCtx 0x%08x Addr 0x%08.8x DM%u usc_breakpoint_ctrl_dm = %u" },"Discarding invalid SLC flushinval command for OSid %u: DM %u, FWCtx 0x%08x" },"Invalid Write Offset update notification from OSid %u to DM %u: FWCtx 0x%08x, MemCtx 0x%08x" },"Null FWCtx in KCCB kick cmd for OSid %u: KCCB 0x%08x, ROff %u, WOff %u" },"Checkpoint CCB for OSid %u is full, signalling host for full check state (Roff = %u, Woff = %u)" },"OSid %d CCB init status: %d (1-ok 0-fail): kCCBCtl@0x%x kCCB@0x%x fwCCBCtl@0x%x fwCCB@0x%x chptCCBCtl@0x%x chptCCB@0x%x" },"OSid %d fw state transition request: from %d to %d (0-offline 1-ready 2-active 3-offloading). Status %d (1-ok 0-fail)" },"OSid %u has %u stale commands in its KCCB" },"Applying VCE pause" },"OSid %u KCCB slot %u value updated to %u" },"Unknown KCCB Command: KCCBCtl=0x%08x, KCCB=0x%08x, Roff=%u, Woff=%u, Wrap=%u, Cmd=0x%08x, CmdType=0x%08x" },"Unknown Client CCB Command processing fences: FWCtx=0x%08x, CCBCtl=0x%08x, CCB=0x%08x, Roff=%u, Doff=%u, Woff=%u, Wrap=%u, CmdHdr=0x%08x, CmdType=0x%08x, CmdSize=%u" },"Unknown Client CCB Command executing kick: FWCtx=0x%08x, CCBCtl=0x%08x, CCB=0x%08x, Roff=%u, Doff=%u, Woff=%u, Wrap=%u, CmdHdr=0x%08x, CmdType=0x%08x, CmdSize=%u" },"Null FWCtx in KCCB kick cmd for OSid %u with WOff %u" },"Discarding invalid SLC flushinval command for OSid %u, FWCtx 0x%08x" },"Invalid Write Offset update notification from OSid %u: FWCtx 0x%08x, MemCtx 0x%08x" },"Initialised Firmware with config flags 0x%08x and extended config flags 0x%08x" },"Set Periodic Hardware Reset Mode: %d" },"PHR mode %d, FW state: 0x%08x, HWR flags: 0x%08x" },"PHR mode %d triggered a reset" },"Signal update, Snoop Filter: %u, Signal Id: %u" },"WARNING: Skipping FW KCCB Cmd type %d which is not yet supported on Series8." },"MMU context cache data NULL, but cache flags=0x%x (sync counter=%u, update value=%u) OSId=%u" },"SLC range based flush: Context=%u VAddr=0x%02x%08x, Size=0x%08x, Invalidate=%d" },"FBSC invalidate for Context Set [0x%08x]: Entry mask 0x%08x%08x." },"TDM context switch check: Roff %u was not valid for kick starting at %u, moving back to %u" },"Signal updates: FIFO: %u, Signals: 0x%08x" },"Invalid FBSC cmd: FWCtx 0x%08x, MemCtx 0x%08x" },"Insert BRN68497 WA blit after TDM Context store." },"UFO Updates for previously finished FWCtx 0x%08.8x" },"RTC with RTA present, %u active render targets" },"Invalid RTA Set-up. The ValidRenderTargets array in RTACtl is Null!" },"Block 0x%x / Counter 0x%x INVALID and ignored" },"ECC fault GPU=0x%08x FW=0x%08x" },"Processing XPU event on DM = %d" },"OSid %u failed to respond to the virtualisation watchdog in time. Timestamp of its last input = %u" },"GPU-%u has locked up (see HWR logs for more info)" },"Updating Tiles In Flight (Dusts=%d, PartitionMask=0x%08x, ISPCtl=0x%08x)" },"GPU has locked up (see HWR logs for more info)" },"Reprocessing outstanding XPU events from cores 0x%02x" },"Secondary XPU event on DM=%d, CoreMask=0x%02x, Raised=0x%02x" },"TDM Queue: Core %u, FWCtx 0x%08.8x, prio: %d, queue: 0x%08x%08x (Roff = %u, Woff = %u, Size = %u)" },"TDM stalled Core %u (Roff = %u, Woff = %u)" },"Compute Queue: Core %u, FWCtx 0x%08.8x, prio: %d, queue: 0x%08x%08x (Roff = %u, Woff = %u, Size = %u)" },"Compute stalled core %u (Roff = %u, Woff = %u, Size = %u)" },"User Mode Queue mismatched stream start: Core %u, FWCtx 0x%08.8x, queue: 0x%08x%08x (Roff = %u, StreamStartOffset = %u)" },"TDM resumed core %u (Roff = %u, Woff = %u)" },"Compute resumed core %u (Roff = %u, Woff = %u, Size = %u)" }," Updated permission for OSid %u to perform MTS kicks: %u (1 = allowed, 0 = not allowed)" },"Mask = 0x%X, mask2 = 0x%X" }," core %u, reg = %u, mask = 0x%X)" },"ECC fault received from safety bus: 0x%08x" },"Safety Watchdog threshold period set to 0x%x clock cycles" },"MTS Safety Event triggered by the safety watchdog." },"DM%d USC tasks range limit 0 - %d, stride %d" },"ECC fault GPU=0x%08x" },"GPU Hardware units reset to prevent transient faults." },"Kick Abort cmd: FWCtx 0x%08.8x @ %d" },"Kick Ray: FWCtx 0x%08.8x @ %d. (PID:%d, prio:%d, frame:%d, ext:0x%08x, int:0x%08x)" },"Ray finished" },"State of firmware's private data at boot time: %d (0 = uninitialised, 1 = initialised); Fw State Flags = 0x%08X" },"CFI Timeout detected (%d increasing to %d)" },"CFI Timeout detected for FBM (%d increasing to %d)" },"Geom OOM event not allowed" },"Changing OSid %d's priority from %u to %u; Isolation = %u (0 = off; 1 = on)" },"Skipping already executed TA FWCtx 0x%08.8x @ %d" },"Attempt to execute TA FWCtx 0x%08.8x @ %d ahead of time on other GEOM" },"Kick TDM: Kick ID %u FWCtx 0x%08.8x @ %d. (PID:%d, prio:%d, frame:%d, ext:0x%08x, int:0x%08x)" },"Kick TA: Kick ID %u FWCtx 0x%08.8x @ %d, RTD 0x%08x, First kick:%d, Last kick:%d, CSW resume:%d. (PID:%d, prio:%d, frame:%d, ext:0x%08x, int:0x%08x)" },"Kick 3D: Kick ID %u FWCtx 0x%08.8x @ %d, RTD 0x%08x, Partial render:%d, CSW resume:%d. (PID:%d, prio:%d, frame:%d, ext:0x%08x, int:0x%08x)" },"Kick Compute: Kick ID %u FWCtx 0x%08.8x @ %d. (PID:%d, prio:%d, ext:0x%08x, int:0x%08x)" },"TDM finished: Kick ID %u " },"TA finished: Kick ID %u " },"3D finished: Kick ID %u , HWRTData0State=%x, HWRTData1State=%x" },"Compute finished: Kick ID %u " },"Kick TDM: Kick ID %u FWCtx 0x%08.8x @ %d, Base 0x%08x%08x. (PID:%d, prio:%d, frame:%d, ext:0x%08x, int:0x%08x)" },"Kick Ray: Kick ID %u FWCtx 0x%08.8x @ %d. (PID:%d, prio:%d, frame:%d, ext:0x%08x, int:0x%08x)" },"Ray finished: Kick ID %u " },"Bg Task DM = %u, counted = %d" },"Bg Task complete DM = %u" },"Irq Task DM = %u, Breq = %d, SBIrq = 0x%x" },"Irq Task complete DM = %u" },"Kick MTS Bg task DM=All" },"Kick MTS Irq task DM=%d" },"Ready queue debug DM = %u, celltype = %d" },"Ready-to-run debug DM = %u, item = 0x%x" },"Client command header DM = %u, client CCB = 0x%x, cmd = 0x%x" },"Ready-to-run debug OSid = %u, DM = %u, item = 0x%x" },"Ready queue debug DM = %u, celltype = %d, OSid = %u" },"Bg Task DM = %u, counted = %d, OSid = %u" },"Bg Task complete DM Bitfield: %u" },"Irq Task complete." },"Discarded Command Type: %d OS ID = %d PID = %d context = 0x%08x cccb ROff = 0x%x, due to USC breakpoint hit by OS ID = %d PID = %d." },"KCCB Slot %u: DM=%u, Cmd=0x%08x, OSid=%u" },"KCCB Slot %u: Return value %u" },"Bg Task OSid = %u" },"KCCB Slot %u: Cmd=0x%08x, OSid=%u" },"Irq Task (EVENT_STATUS=0x%08x)" },"VZ sideband test, kicked with OSid=%u from MTS, OSid for test=%u" },"FwCommonContext [0x%08x] cleaned" },"FwCommonContext [0x%08x] is busy: ReadOffset = %d, WriteOffset = %d" },"HWRTData [0x%08x] for DM=%d, received cleanup request" },"HWRTData [0x%08x] HW Context cleaned for DM%u, executed commands = %d" },"HWRTData [0x%08x] HW Context for DM%u is busy" },"HWRTData [0x%08x] HW Context %u cleaned" },"Freelist [0x%08x] cleaned" },"ZSBuffer [0x%08x] cleaned" },"ZSBuffer [0x%08x] is busy: submitted = %d, executed = %d" },"HWRTData [0x%08x] HW Context for DM%u is busy: submitted = %d, executed = %d" },"HW Ray Frame data [0x%08x] for DM=%d, received cleanup request" },"HW Ray Frame Data [0x%08x] cleaned for DM%u, executed commands = %d" },"HW Ray Frame Data [0x%08x] for DM%u is busy: submitted = %d, executed = %d" },"HW Ray Frame Data [0x%08x] HW Context %u cleaned" },"Discarding invalid cleanup request of type 0x%x" },"Received cleanup request for HWRTData [0x%08x]" },"HWRTData [0x%08x] HW Context is busy: submitted = %d, executed = %d" },"HWRTData [0x%08x] HW Context %u cleaned, executed commands = %d" },"CDM FWCtx 0x%08.8x needs resume" },"*** CDM FWCtx 0x%08.8x resume from snapshot buffer 0x%08x%08x" },"CDM FWCtx shared alloc size load 0x%x" },"*** CDM FWCtx store complete" },"*** CDM FWCtx store start" },"CDM Soft Reset" },"3D FWCtx 0x%08.8x needs resume" },"*** 3D FWCtx 0x%08.8x resume" },"*** 3D context store complete" },"3D context store pipe state: 0x%08.8x 0x%08.8x 0x%08.8x" },"*** 3D context store start" },"*** 3D TQ FWCtx 0x%08.8x resume" },"TA FWCtx 0x%08.8x needs resume" },"*** TA FWCtx 0x%08.8x resume from snapshot buffer 0x%08x%08x" },"TA context shared alloc size store 0x%x, load 0x%x" },"*** TA context store complete" },"*** TA context store start" },"Higher priority context scheduled for DM %u, old prio:%d, new prio:%d" },"Set FWCtx 0x%x priority to %u" },"3D context store pipe%d state: 0x%08.8x" },"3D context resume pipe%d state: 0x%08.8x" },"SHG FWCtx 0x%08.8x needs resume" },"*** SHG FWCtx 0x%08.8x resume from snapshot buffer 0x%08x%08x" },"SHG context shared alloc size store 0x%x, load 0x%x" },"*** SHG context store complete" },"*** SHG context store start" },"Performing TA indirection, last used pipe %d" },"CDM context store hit ctrl stream terminate. Skip resume." },"*** CDM FWCtx 0x%08.8x resume from snapshot buffer 0x%08x%08x, shader state %u" },"TA PDS/USC state buffer flip (%d->%d)" },"TA context store hit BRN 52563: vertex store tasks outstanding" },"TA USC poll failed (USC vertex task count: %d)" },"TA context store deferred due to BRN 54141." },"Higher priority context scheduled for DM %u. Prios (OSid, OSid Prio, Context Prio): Current: %u, %u, %u New: %u, %u, %u" },"*** TDM context store start" },"*** TDM context store complete" },"TDM context needs resume, header [0x%08.8x, 0x%08.8x]" },"Higher priority context scheduled for DM %u. Prios (OSid, OSid Prio, Context Prio): Current: %u, %u, %u New: %u, %u, %u. Hard Context Switching: %u" },"3D context store pipe %2d (%2d) state: 0x%08.8x" },"3D context resume pipe %2d (%2d) state: 0x%08.8x" },"*** 3D context store start version %d (1=IPP_TILE, 2=ISP_TILE)" },"3D context store pipe%d state: 0x%08.8x%08x" },"3D context resume pipe%d state: 0x%08.8x%08x" },"3D context resume IPP state: 0x%08.8x%08x" },"All 3D pipes empty after ISP tile mode store! IPP_status: 0x%08x" },"TDM context resume pipe%d state: 0x%08.8x%08x" },"*** 3D context store start version 4" },"Multicore context resume on DM%d active core mask 0x%04.4x" },"Multicore context store on DM%d active core mask 0x%04.4x" },"TDM context resume Core %d, pipe%d state: 0x%08.8x%08x%08x" },"*** RDM FWCtx store complete" },"*** RDM FWCtx store start" },"RDM FWCtx 0x%08.8x needs resume" },"RDM FWCtx 0x%08.8x resume" },"Activate MemCtx=0x%08x BIFreq=%d secure=%d" },"Deactivate MemCtx=0x%08x" },"Alloc PC reg %d" },"Grab reg set %d refcount now %d" },"Ungrab reg set %d refcount now %d" },"Setup reg=%d BIFreq=%d, expect=0x%08x%08x, actual=0x%08x%08x" },"Trust enabled:%d, for BIFreq=%d" },"BIF Tiling Cfg %d base 0x%08x%08x len 0x%08x%08x enable %d stride %d --> 0x%08x%08x" },"Wrote the Value %d to OSID0, Cat Base %d, Register's contents are now 0x%08x 0x%08x" },"Wrote the Value %d to OSID1, Context %d, Register's contents are now 0x%04x" },"ui32OSid = %u, Catbase = %u, Reg Address = 0x%x, Reg index = %u, Bitshift index = %u, Val = 0x%08x%08x" }, \"Map GPU memory DevVAddr 0x%x%08x, Size %u, Context ID %u, BIFREQ %u" },"Unmap GPU memory (event status 0x%x)" },"Activate MemCtx=0x%08x DM=%d secure=%d" },"Setup reg=%d DM=%d, expect=0x%08x%08x, actual=0x%08x%08x" },"Map GPU memory DevVAddr 0x%x%08x, Size %u, Context ID %u" },"Trust enabled:%d, for DM=%d" },"Map GPU memory DevVAddr 0x%x%08x, Size %u, Context ID %u, DM %u" },"Setup register set=%d DM=%d, PC address=0x%08x%08x, OSid=%u, NewPCRegRequired=%d" },"Alloc PC set %d as register range [%u - %u]" },"GPIO write 0x%02x" },"GPIO read 0x%02x" },"GPIO enabled" },"GPIO disabled" },"GPIO status=%d (0=OK, 1=Disabled)" },"GPIO_AP: Read address=0x%02x (%d byte(s))" },"GPIO_AP: Write address=0x%02x (%d byte(s))" },"GPIO_AP timeout!" },"GPIO_AP error. GPIO status=%d (0=OK, 1=Disabled)" },"GPIO already read 0x%02x" },"SR: Check buffer %d available returned %d" },"SR: Waiting for buffer %d" },"SR: Timeout waiting for buffer %d (after %d ticks)" },"SR: Skip frame check for strip %d returned %d (0=No skip, 1=Skip frame)" },"SR: Skip remaining strip %d in frame" },"SR: Inform HW that strip %d is a new frame" },"SR: Timeout waiting for INTERRUPT_FRAME_SKIP (after %d ticks)" },"SR: Strip mode is %d" },"SR: Strip Render start (strip %d)" },"SR: Strip Render complete (buffer %d)" },"SR: Strip Render fault (buffer %d)" },"TRP state: %d" },"TRP failure: %d" },"SW TRP State: %d" },"SW TRP failure: %d" },"HW kick event (%u)" },"GPU core (%u/%u): checksum 0x%08x vs. 0x%08x" },"GPU core (%u/%u), unit (%u,%u): checksum 0x%08x vs. 0x%08x" },"HWR: Core%u, Register=0x%08x, OldValue=0x%08x%08x, CurrValue=0x%08x%08x" },"HWR: USC Core%u, ui32TotalSlotsUsedByDM=0x%08x, psDMHWCtl->ui32USCSlotsUsedByDM=0x%08x, bHWRNeeded=%u" },"HWR: USC Core%u, Register=0x%08x, OldValue=0x%08x%08x, CurrValue=0x%08x%08x" },"ALIST%d SP = %u, MLIST%d SP = %u (VCE 0x%08x%08x, TE 0x%08x%08x, ALIST 0x%08x%08x)" },"Is TA: %d, finished: %d on HW %u (HWRTData = 0x%08x, MemCtx = 0x%08x). FL different between TA/3D: global:%d, local:%d, mmu:%d" },"UFL-3D-Base: 0x%08x%08x (SP = %u, 4PB = %u, 4PT = %u), FL-3D-Base: 0x%08x%08x (SP = %u, 4PB = %u, 4PT = %u), MFL-3D-Base: 0x%08x%08x (SP = %u, 4PT = %u)" },"UFL-TA-Base: 0x%08x%08x (SP = %u, 4PB = %u, 4PT = %u), FL-TA-Base: 0x%08x%08x (SP = %u, 4PB = %u, 4PT = %u), MFL-TA-Base: 0x%08x%08x (SP = %u, 4PT = %u)" },"Freelist grow completed [0x%08x]: added pages 0x%08x, total pages 0x%08x, new DevVirtAddr 0x%08x%08x" },"Grow for freelist ID=0x%08x denied by host" },"Freelist update completed [0x%08x]: old total pages 0x%08x, new total pages 0x%08x, new DevVirtAddr 0x%08x%08x" },"Reconstruction of freelist ID=0x%08x failed" },"Ignored attempt to pause or unpause the DM while there is no relevant operation in progress (0-TA,1-3D): %d, operation(0-unpause, 1-pause): %d" },"Force free 3D Context memory, FWCtx: 0x%08x, status(1:success, 0:fail): %d" },"PM pause TA ALLOC: PM_PAGE_MANAGEOP set to 0x%x" },"PM unpause TA ALLOC: PM_PAGE_MANAGEOP set to 0x%x" },"PM pause 3D DALLOC: PM_PAGE_MANAGEOP set to 0x%x" },"PM unpause 3D DALLOC: PM_PAGE_MANAGEOP set to 0x%x" },"PM ALLOC/DALLOC change was not actioned: PM_PAGE_MANAGEOP_STATUS=0x%x" },"Is TA: %d, finished: %d on HW %u (HWRTData = 0x%08x, MemCtx = 0x%08x). FL different between TA/3D: global:%d, local:%d" },"UFL-3D-Base: 0x%08x%08x (SP = %u, 4PB = %u, 4PT = %u), FL-3D-Base: 0x%08x%08x (SP = %u, 4PB = %u, 4PT = %u)" },"UFL-TA-Base: 0x%08x%08x (SP = %u, 4PB = %u, 4PT = %u), FL-TA-Base: 0x%08x%08x (SP = %u, 4PB = %u, 4PT = %u)" },"Freelist update completed [0x%08x / FL State 0x%08x%08x]: old total pages 0x%08x, new total pages 0x%08x, new DevVirtAddr 0x%08x%08x" },"Freelist update failed [0x%08x / FL State 0x%08x%08x]: old total pages 0x%08x, new total pages 0x%08x, new DevVirtAddr 0x%08x%08x" },"UFL-3D-State-Base: 0x%08x%08x (SP = %u, 4PB = %u, 4PT = %u), FL-3D-State-Base: 0x%08x%08x (SP = %u, 4PB = %u, 4PT = %u)" },"UFL-TA-State-Base: 0x%08x%08x (SP = %u, 4PB = %u, 4PT = %u), FL-TA-State-Base: 0x%08x%08x (SP = %u, 4PB = %u, 4PT = %u)" },"Freelist 0x%08x base address from HW: 0x%02x%08x (expected value: 0x%02x%08x)" },"Analysis of FL grow: Pause=(%u,%u) Paused+Valid(%u,%u) PMStateBuffer=0x%x" },"Attempt FL grow for FL: 0x%08x, new dev address: 0x%02x%08x, new page count: %u, new ready count: %u" },"Deferring FL grow for non-loaded FL: 0x%08x, new dev address: 0x%02x%08x, new page count: %u, new ready count: %u" },"Is GEOM: %d, finished: %d (HWRTData = 0x%08x, MemCtx = 0x%08x)" },"3D Timeout Now for FWCtx 0x%08.8x" },"GEOM PM Recycle for FWCtx 0x%08.8x" },"PM running primary config (Core %d)" },"PM running secondary config (Core %d)" },"PM running tertiary config (Core %d)" },"PM running quaternary config (Core %d)" },"Global link list dynamic page count: vertex 0x%x, varying 0x%x, node 0x%x" },"Global link list static page count: vertex 0x%x, varying 0x%x, node 0x%x" },"RPM request failed. Waiting for freelist grow." },"RPM request failed. Aborting the current frame." },"RPM waiting for pending grow on freelist 0x%08x" },"Request freelist grow [0x%08x] current pages %d, grow size %d" },"Freelist load: SHF = 0x%08x, SHG = 0x%08x" },"SHF FPL register: 0x%08x.0x%08x" },"SHG FPL register: 0x%08x.0x%08x" },"Kernel requested RPM grow on freelist (type %d) at 0x%08x from current size %d to new size %d, RPM restart: %d (1=Yes)" },"Restarting SHG" },"Grow failed, aborting the current frame." },"RPM abort complete on HWFrameData [0x%08x]." },"RPM freelist cleanup [0x%08x] requires abort to proceed." },"RPM page table base register: 0x%08x.0x%08x" },"Issuing RPM abort." },"RPM OOM received but toggle bits indicate free pages available" },"RPM hardware timeout. Unable to process OOM event." },"SHF FL (0x%08x) load, FPL: 0x%08x.0x%08x, roff: 0x%08x, woff: 0x%08x" },"SHG FL (0x%08x) load, FPL: 0x%08x.0x%08x, roff: 0x%08x, woff: 0x%08x" },"SHF FL (0x%08x) store, roff: 0x%08x, woff: 0x%08x" },"SHG FL (0x%08x) store, roff: 0x%08x, woff: 0x%08x" },"3D RTData 0x%08x finished on HW context %u" },"3D RTData 0x%08x ready on HW context %u" },"CONTEXT_PB_BASE set to 0x%x, FL different between TA/3D: local: %d, global: %d, mmu: %d" },"Loading VFP table 0x%08x%08x for 3D" },"Loading VFP table 0x%08x%08x for TA" },"Load Freelist 0x%x type: %d (0:local,1:global,2:mmu) for DM%d: TotalPMPages = %d, FL-addr = 0x%08x%08x, stacktop = 0x%08x%08x, Alloc Page Count = %u, Alloc MMU Page Count = %u" },"Perform VHEAP table store" },"RTData 0x%08x: found match in Context=%d: Load=No, Store=No" },"RTData 0x%08x: found NULL in Context=%d: Load=Yes, Store=No" },"RTData 0x%08x: found state 3D finished (0x%08x) in Context=%d: Load=Yes, Store=Yes" },"RTData 0x%08x: found state TA finished (0x%08x) in Context=%d: Load=Yes, Store=Yes" },"Loading stack-pointers for %d (0:MidTA,1:3D) on context %d, MLIST = 0x%08x, ALIST = 0x%08x%08x" },"Store Freelist 0x%x type: %d (0:local,1:global,2:mmu) for DM%d: TotalPMPages = %d, FL-addr = 0x%08x%08x, stacktop = 0x%08x%08x, Alloc Page Count = %u, Alloc MMU Page Count = %u" },"TA RTData 0x%08x finished on HW context %u" },"TA RTData 0x%08x loaded on HW context %u" },"Store Freelist 0x%x type: %d (0:local,1:global,2:mmu) for DM%d: FL Total Pages %u (max=%u,grow size=%u), FL-addr = 0x%08x%08x, stacktop = 0x%08x%08x, Alloc Page Count = %u, Alloc MMU Page Count = %u" },"Load Freelist 0x%x type: %d (0:local,1:global,2:mmu) for DM%d: FL Total Pages %u (max=%u,grow size=%u), FL-addr = 0x%08x%08x, stacktop = 0x%08x%08x, Alloc Page Count = %u, Alloc MMU Page Count = %u" },"Freelist 0x%x RESET!!!!!!!!" },"Freelist 0x%x stacktop = 0x%08x%08x, Alloc Page Count = %u, Alloc MMU Page Count = %u" },"Request reconstruction of Freelist 0x%x type: %d (0:local,1:global,2:mmu) on HW context %u" },"Freelist reconstruction ACK from host (HWR state :%u)" },"Freelist reconstruction completed" },"TA RTData 0x%08x loaded on HW context %u HWRTDataNeedsLoading=%d" },"TE Region headers base 0x%08x%08x (RGNHDR Init: %d)" },"TA Buffers: FWCtx 0x%08x, RT 0x%08x, RTData 0x%08x, VHeap 0x%08x%08x, TPC 0x%08x%08x (MemCtx 0x%08x)" },"3D RTData 0x%08x loaded on HW context %u" },"3D Buffers: FWCtx 0x%08x, RT 0x%08x, RTData 0x%08x (MemCtx 0x%08x)" },"Restarting TA after partial render, HWRTData0State=0x%x, HWRTData1State=0x%x" },"CONTEXT_PB_BASE set to 0x%x, FL different between TA/3D: local: %d, global: %d" },"Store Freelist 0x%x type: %d (0:local,1:global) for PMDM%d: FL Total Pages %u (max=%u,grow size=%u), FL-addr = 0x%08x%08x, stacktop = 0x%08x%08x, Alloc Page Count = %u, Alloc MMU Page Count = %u" },"Load Freelist 0x%x type: %d (0:local,1:global) for PMDM%d: FL Total Pages %u (max=%u,grow size=%u), FL-addr = 0x%08x%08x, stacktop = 0x%08x%08x, Alloc Page Count = %u, Alloc MMU Page Count = %u" },"3D Buffers: FWCtx 0x%08x, parent RT 0x%08x, RTData 0x%08x on ctx %d, (MemCtx 0x%08x)" },"TA Buffers: FWCtx 0x%08x, RTData 0x%08x, VHeap 0x%08x%08x, TPC 0x%08x%08x (MemCtx 0x%08x)" },"3D Buffers: FWCtx 0x%08x, RTData 0x%08x on ctx %d, (MemCtx 0x%08x)" },"Load Freelist 0x%x type: %d (0:local,1:global) for PMDM%d: FL Total Pages %u (max=%u,grow size=%u)" },"TA RTData 0x%08x marked as killed." },"3D RTData 0x%08x marked as killed." },"RTData 0x%08x will be killed after TA restart." },"RTData 0x%08x Render State Buffer 0x%02x%08x will be reset." },"GEOM RTData 0x%08x using Render State Buffer 0x%02x%08x." },"FRAG RTData 0x%08x using Render State Buffer 0x%02x%08x." },"Force Z-Load for partial render" },"Force Z-Store for partial render" },"3D MemFree: Local FL 0x%08x" },"3D MemFree: MMU FL 0x%08x" },"3D MemFree: Global FL 0x%08x" },"OOM TA/3D PR Check: [0x%08.8x] is 0x%08.8x requires 0x%08.8x, HardwareSync Fence [0x%08.8x] is 0x%08.8x requires 0x%08.8x" },"OOM TA_cmd=0x%08x, U-FL 0x%08x, N-FL 0x%08x" },"OOM TA_cmd=0x%08x, OOM MMU:%d, U-FL 0x%08x, N-FL 0x%08x, MMU-FL 0x%08x" },"Partial render avoided" },"Partial render discarded" },"Partial Render finished" },"SPM Owner = 3D-BG" },"SPM Owner = 3D-IRQ" },"SPM Owner = NONE" },"SPM Owner = TA-BG" },"SPM Owner = TA-IRQ" },"ZStore address 0x%08x%08x" },"SStore address 0x%08x%08x" },"ZLoad address 0x%08x%08x" },"SLoad address 0x%08x%08x" },"No deferred ZS Buffer provided" },"ZS Buffer successfully populated (ID=0x%08x)" },"No need to populate ZS Buffer (ID=0x%08x)" },"ZS Buffer successfully unpopulated (ID=0x%08x)" },"No need to unpopulate ZS Buffer (ID=0x%08x)" },"Send ZS-Buffer backing request to host (ID=0x%08x)" },"Send ZS-Buffer unbacking request to host (ID=0x%08x)" },"Don't send ZS-Buffer backing request. Previous request still pending (ID=0x%08x)" },"Don't send ZS-Buffer unbacking request. Previous request still pending (ID=0x%08x)" },"Partial Render waiting for ZBuffer to be backed (ID=0x%08x)" },"Partial Render waiting for SBuffer to be backed (ID=0x%08x)" },"SPM State = none" },"SPM State = PR blocked" },"SPM State = wait for grow" },"SPM State = wait for HW" },"SPM State = PR running" },"SPM State = PR avoided" },"SPM State = PR executed" },"3DMemFree matches freelist 0x%08x (FL type = %u)" },"Raise the 3DMemFreeDetected flag" },"Wait for pending grow on Freelist 0x%08x" },"ZS Buffer failed to be populated (ID=0x%08x)" },"Grow update inconsistency: FL addr: 0x%02x%08x, curr pages: %u, ready: %u, new: %u" },"OOM: Resumed TA with ready pages, FL addr: 0x%02x%08x, current pages: %u, SP : %u" },"Received grow update, FL addr: 0x%02x%08x, current pages: %u, ready pages: %u, threshold: %u" },"No deferred partial render FW (Type=%d) Buffer provided" },"No need to populate PR Buffer (ID=0x%08x)" },"No need to unpopulate PR Buffer (ID=0x%08x)" },"Send PR Buffer backing request to host (ID=0x%08x)" },"Send PR Buffer unbacking request to host (ID=0x%08x)" },"Don't send PR Buffer backing request. Previous request still pending (ID=0x%08x)" },"Don't send PR Buffer unbacking request. Previous request still pending (ID=0x%08x)" },"Partial Render waiting for Buffer %d type to be backed (ID=0x%08x)" },"Received grow update, FL addr: 0x%02x%08x, new pages: %u, ready pages: %u" },"OOM TA/3D PR Check: [0x%08.8x] is 0x%08.8x requires 0x%08.8x" },
Messung V0.5 C=94 H=90 G=91
¤ Dauer der Verarbeitung: 0.12 Sekunden
¤ *© Formatika GbR, Deutschland
