if (target == FALCON_MEMORY_IMEM)
cmd |= FALCON_DMATRFCMD_IMEM;
/* * Use second DMA context (i.e. the one for firmware). Strictly * speaking, at this point both DMA contexts point to the firmware * stream ID, but this register's value will be reused by the firmware * for later DMA transactions, so we need to use the correct value.
*/
cmd |= FALCON_DMATRFCMD_DMACTX(1);
err = falcon_dma_wait_not_full(falcon); if (err < 0) return err;
/* copy the whole thing taking into account endianness */ for (i = 0; i < firmware->size / sizeof(u32); i++)
virt[i] = le32_to_cpu(((__le32 *)firmware->data)[i]);
}
/* endian problems would show up right here */ if (bin->magic != PCI_VENDOR_ID_NVIDIA && bin->magic != 0x10fe) {
dev_err(falcon->dev, "incorrect firmware magic\n"); return -EINVAL;
}
/* currently only version 1 is supported */ if (bin->version != 1) {
dev_err(falcon->dev, "unsupported firmware version\n"); return -EINVAL;
}
/* check that the firmware size is consistent */ if (bin->size > falcon->firmware.size) {
dev_err(falcon->dev, "firmware image size inconsistency\n"); return -EINVAL;
}
os = falcon->firmware.virt + bin->os_header_offset;
/* setup the address of the binary data so Falcon can access it later */
falcon_writel(falcon, (falcon->firmware.iova +
falcon->firmware.bin_data.offset) >> 8,
FALCON_DMATRFBASE);
/* copy the data segment into Falcon internal memory */ for (offset = 0; offset < falcon->firmware.data.size; offset += 256)
falcon_copy_chunk(falcon,
falcon->firmware.data.offset + offset,
offset, FALCON_MEMORY_DATA);
/* copy the code segment into Falcon internal memory */ for (offset = 0; offset < falcon->firmware.code.size; offset += 256)
falcon_copy_chunk(falcon, falcon->firmware.code.offset + offset,
offset, FALCON_MEMORY_IMEM);
/* wait for DMA to complete */
err = falcon_dma_wait_idle(falcon); if (err < 0) return err;
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