#define dprintk(level, fmt, arg...) do { \ if (debug >= level) \
printk(KERN_DEBUG KBUILD_MODNAME ": %s " fmt, __func__, ##arg); \
} while (0)
staticinline u32 Frac28a(u32 a, u32 c)
{ int i = 0;
u32 Q1 = 0;
u32 R0 = 0;
R0 = (a % c) << 4; /* 32-28 == 4 shifts possible at max */
Q1 = a / c; /* * integer part, only the 4 least significant * bits will be visible in the result
*/
/* division using radix 16, 7 nibbles in the result */ for (i = 0; i < 7; i++) {
Q1 = (Q1 << 4) | (R0 / c);
R0 = (R0 % c) << 4;
} /* rounding */ if ((R0 >> 3) >= c)
Q1++;
staticint power_up_device(struct drxk_state *state)
{ int status;
u8 data = 0;
u16 retry_count = 0;
dprintk(1, "\n");
status = i2c_read1(state, state->demod_address, &data); if (status < 0) { do {
data = 0;
status = i2c_write(state, state->demod_address,
&data, 1);
usleep_range(10000, 11000);
retry_count++; if (status < 0) continue;
status = i2c_read1(state, state->demod_address,
&data);
} while (status < 0 &&
(retry_count < DRXK_MAX_RETRIES_POWERUP)); if (status < 0 && retry_count >= DRXK_MAX_RETRIES_POWERUP) goto error;
}
/* Make sure all clk domains are active */
status = write16(state, SIO_CC_PWD_MODE__A, SIO_CC_PWD_MODE_LEVEL_NONE); if (status < 0) goto error;
status = write16(state, SIO_CC_UPDATE__A, SIO_CC_UPDATE_KEY); if (status < 0) goto error; /* Enable pll lock tests */
status = write16(state, SIO_CC_PLL_LOCK__A, 1); if (status < 0) goto error;
state->m_current_power_mode = DRX_POWER_UP;
error: if (status < 0)
pr_err("Error %d on %s\n", status, __func__);
return status;
}
staticint init_state(struct drxk_state *state)
{ /* * FIXME: most (all?) of the values below should be moved into * struct drxk_config, as they are probably board-specific
*/
u32 ul_vsb_if_agc_mode = DRXK_AGC_CTRL_AUTO;
u32 ul_vsb_if_agc_output_level = 0;
u32 ul_vsb_if_agc_min_level = 0;
u32 ul_vsb_if_agc_max_level = 0x7FFF;
u32 ul_vsb_if_agc_speed = 3;
if (!enable) {
desired_ctrl = SIO_OFDM_SH_OFDM_RING_ENABLE_OFF;
desired_status = SIO_OFDM_SH_OFDM_RING_STATUS_DOWN;
}
status = read16(state, SIO_OFDM_SH_OFDM_RING_STATUS__A, &data); if (status >= 0 && data == desired_status) { /* tokenring already has correct status */ return status;
} /* Disable/enable dvbt tokenring bridge */
status = write16(state, SIO_OFDM_SH_OFDM_RING_ENABLE__A, desired_ctrl);
end = jiffies + msecs_to_jiffies(DRXK_OFDM_TR_SHUTDOWN_TIMEOUT); do {
status = read16(state, SIO_OFDM_SH_OFDM_RING_STATUS__A, &data); if ((status >= 0 && data == desired_status)
|| time_is_after_jiffies(end)) break;
usleep_range(1000, 2000);
} while (1); if (data != desired_status) {
pr_err("SIO not ready\n"); return -EINVAL;
} return status;
}
staticint mpegts_stop(struct drxk_state *state)
{ int status = 0;
u16 fec_oc_snc_mode = 0;
u16 fec_oc_ipr_mode = 0;
dprintk(1, "\n");
/* Graceful shutdown (byte boundaries) */
status = read16(state, FEC_OC_SNC_MODE__A, &fec_oc_snc_mode); if (status < 0) goto error;
fec_oc_snc_mode |= FEC_OC_SNC_MODE_SHUTDOWN__M;
status = write16(state, FEC_OC_SNC_MODE__A, fec_oc_snc_mode); if (status < 0) goto error;
/* Suppress MCLK during absence of data */
status = read16(state, FEC_OC_IPR_MODE__A, &fec_oc_ipr_mode); if (status < 0) goto error;
fec_oc_ipr_mode |= FEC_OC_IPR_MODE_MCLK_DIS_DAT_ABS__M;
status = write16(state, FEC_OC_IPR_MODE__A, fec_oc_ipr_mode);
error: if (status < 0)
pr_err("Error %d on %s\n", status, __func__);
return status;
}
staticint scu_command(struct drxk_state *state,
u16 cmd, u8 parameter_len,
u16 *parameter, u8 result_len, u16 *result)
{ #if (SCU_RAM_PARAM_0__A - SCU_RAM_PARAM_15__A) != 15 #error DRXK register mapping no longer compatible with this routine! #endif
u16 cur_cmd = 0; int status = -EINVAL; unsignedlong end;
u8 buffer[34]; int cnt = 0, ii; constchar *p; char errname[30];
/* assume that the command register is ready
since it is checked afterwards */ if (parameter) { for (ii = parameter_len - 1; ii >= 0; ii -= 1) {
buffer[cnt++] = (parameter[ii] & 0xFF);
buffer[cnt++] = ((parameter[ii] >> 8) & 0xFF);
}
}
buffer[cnt++] = (cmd & 0xFF);
buffer[cnt++] = ((cmd >> 8) & 0xFF);
write_block(state, SCU_RAM_PARAM_0__A -
(parameter_len - 1), cnt, buffer); /* Wait until SCU has processed command */
end = jiffies + msecs_to_jiffies(DRXK_MAX_WAITTIME); do {
usleep_range(1000, 2000);
status = read16(state, SCU_RAM_COMMAND__A, &cur_cmd); if (status < 0) goto error;
} while (!(cur_cmd == DRX_SCU_READY) && (time_is_after_jiffies(end))); if (cur_cmd != DRX_SCU_READY) {
pr_err("SCU not ready\n");
status = -EIO; goto error2;
} /* read results */ if ((result_len > 0) && (result != NULL)) {
s16 err; int ii;
for (ii = result_len - 1; ii >= 0; ii -= 1) {
status = read16(state, SCU_RAM_PARAM_0__A - ii,
&result[ii]); if (status < 0) goto error;
}
/* Check if an error was reported by SCU */
err = (s16)result[0]; if (err >= 0) goto error;
/* check for the known error codes */ switch (err) { case SCU_RESULT_UNKCMD:
p = "SCU_RESULT_UNKCMD"; break; case SCU_RESULT_UNKSTD:
p = "SCU_RESULT_UNKSTD"; break; case SCU_RESULT_SIZE:
p = "SCU_RESULT_SIZE"; break; case SCU_RESULT_INVPAR:
p = "SCU_RESULT_INVPAR"; break; default: /* Other negative values are errors */
sprintf(errname, "ERROR: %d\n", err);
p = errname;
}
pr_err("%s while sending cmd 0x%04x with params:", p, cmd);
print_hex_dump_bytes("drxk: ", DUMP_PREFIX_NONE, buffer, cnt);
status = -EINVAL; goto error2;
}
error: if (status < 0)
pr_err("Error %d on %s\n", status, __func__);
error2:
mutex_unlock(&state->mutex); return status;
}
staticint set_iqm_af(struct drxk_state *state, bool active)
{
u16 data = 0; int status;
dprintk(1, "\n");
/* Configure IQM */
status = read16(state, IQM_AF_STDBY__A, &data); if (status < 0) goto error;
if (!active) {
data |= (IQM_AF_STDBY_STDBY_ADC_STANDBY
| IQM_AF_STDBY_STDBY_AMP_STANDBY
| IQM_AF_STDBY_STDBY_PD_STANDBY
| IQM_AF_STDBY_STDBY_TAGC_IF_STANDBY
| IQM_AF_STDBY_STDBY_TAGC_RF_STANDBY);
} else {
data &= ((~IQM_AF_STDBY_STDBY_ADC_STANDBY)
& (~IQM_AF_STDBY_STDBY_AMP_STANDBY)
& (~IQM_AF_STDBY_STDBY_PD_STANDBY)
& (~IQM_AF_STDBY_STDBY_TAGC_IF_STANDBY)
& (~IQM_AF_STDBY_STDBY_TAGC_RF_STANDBY)
);
}
status = write16(state, IQM_AF_STDBY__A, data);
error: if (status < 0)
pr_err("Error %d on %s\n", status, __func__); return status;
}
staticint ctrl_power_mode(struct drxk_state *state, enum drx_power_mode *mode)
{ int status = 0;
u16 sio_cc_pwd_mode = 0;
dprintk(1, "\n");
/* Check arguments */ if (mode == NULL) return -EINVAL;
switch (*mode) { case DRX_POWER_UP:
sio_cc_pwd_mode = SIO_CC_PWD_MODE_LEVEL_NONE; break; case DRXK_POWER_DOWN_OFDM:
sio_cc_pwd_mode = SIO_CC_PWD_MODE_LEVEL_OFDM; break; case DRXK_POWER_DOWN_CORE:
sio_cc_pwd_mode = SIO_CC_PWD_MODE_LEVEL_CLOCK; break; case DRXK_POWER_DOWN_PLL:
sio_cc_pwd_mode = SIO_CC_PWD_MODE_LEVEL_PLL; break; case DRX_POWER_DOWN:
sio_cc_pwd_mode = SIO_CC_PWD_MODE_LEVEL_OSC; break; default: /* Unknown sleep mode */ return -EINVAL;
}
/* If already in requested power mode, do nothing */ if (state->m_current_power_mode == *mode) return 0;
/* For next steps make sure to start from DRX_POWER_UP mode */ if (state->m_current_power_mode != DRX_POWER_UP) {
status = power_up_device(state); if (status < 0) goto error;
status = dvbt_enable_ofdm_token_ring(state, true); if (status < 0) goto error;
}
if (*mode == DRX_POWER_UP) { /* Restore analog & pin configuration */
} else { /* Power down to requested mode */ /* Backup some register settings */ /* Set pins with possible pull-ups connected
to them in input mode */ /* Analog power down */ /* ADC power down */ /* Power down device */ /* stop all comm_exec */ /* Stop and power down previous standard */ switch (state->m_operation_mode) { case OM_DVBT:
status = mpegts_stop(state); if (status < 0) goto error;
status = power_down_dvbt(state, false); if (status < 0) goto error; break; case OM_QAM_ITU_A: case OM_QAM_ITU_C:
status = mpegts_stop(state); if (status < 0) goto error;
status = power_down_qam(state); if (status < 0) goto error; break; default: break;
}
status = dvbt_enable_ofdm_token_ring(state, false); if (status < 0) goto error;
status = write16(state, SIO_CC_PWD_MODE__A, sio_cc_pwd_mode); if (status < 0) goto error;
status = write16(state, SIO_CC_UPDATE__A, SIO_CC_UPDATE_KEY); if (status < 0) goto error;
if (*mode != DRXK_POWER_DOWN_OFDM) {
state->m_hi_cfg_ctrl |=
SIO_HI_RA_RAM_PAR_5_CFG_SLEEP_ZZZ;
status = hi_cfg_command(state); if (status < 0) goto error;
}
}
state->m_current_power_mode = *mode;
error: if (status < 0)
pr_err("Error %d on %s\n", status, __func__);
status = read16(state, SCU_COMM_EXEC__A, &data); if (status < 0) goto error; if (data == SCU_COMM_EXEC_ACTIVE) { /* Send OFDM stop command */
status = scu_command(state,
SCU_RAM_COMMAND_STANDARD_OFDM
| SCU_RAM_COMMAND_CMD_DEMOD_STOP,
0, NULL, 1, &cmd_result); if (status < 0) goto error; /* Send OFDM reset command */
status = scu_command(state,
SCU_RAM_COMMAND_STANDARD_OFDM
| SCU_RAM_COMMAND_CMD_DEMOD_RESET,
0, NULL, 1, &cmd_result); if (status < 0) goto error;
}
/* Reset datapath for OFDM, processors first */
status = write16(state, OFDM_SC_COMM_EXEC__A, OFDM_SC_COMM_EXEC_STOP); if (status < 0) goto error;
status = write16(state, OFDM_LC_COMM_EXEC__A, OFDM_LC_COMM_EXEC_STOP); if (status < 0) goto error;
status = write16(state, IQM_COMM_EXEC__A, IQM_COMM_EXEC_B_STOP); if (status < 0) goto error;
/* powerdown AFE */
status = set_iqm_af(state, false); if (status < 0) goto error;
/* powerdown to OFDM mode */ if (set_power_mode) {
status = ctrl_power_mode(state, &power_mode); if (status < 0) goto error;
}
error: if (status < 0)
pr_err("Error %d on %s\n", status, __func__); return status;
}
staticint setoperation_mode(struct drxk_state *state, enum operation_mode o_mode)
{ int status = 0;
dprintk(1, "\n"); /* Stop and power down previous standard TODO investigate total power down instead of partial power down depending on "previous" standard.
*/
/* disable HW lock indicator */
status = write16(state, SCU_RAM_GPIO__A,
SCU_RAM_GPIO_HW_LOCK_IND_DISABLE); if (status < 0) goto error;
/* Device is already at the required mode */ if (state->m_operation_mode == o_mode) return 0;
switch (state->m_operation_mode) { /* OM_NONE was added for start up */ case OM_NONE: break; case OM_DVBT:
status = mpegts_stop(state); if (status < 0) goto error;
status = power_down_dvbt(state, true); if (status < 0) goto error;
state->m_operation_mode = OM_NONE; break; case OM_QAM_ITU_A: case OM_QAM_ITU_C:
status = mpegts_stop(state); if (status < 0) goto error;
status = power_down_qam(state); if (status < 0) goto error;
state->m_operation_mode = OM_NONE; break; case OM_QAM_ITU_B: default:
status = -EINVAL; goto error;
}
/* Power up new standard
*/ switch (o_mode) { case OM_DVBT:
dprintk(1, ": DVB-T\n");
state->m_operation_mode = o_mode;
status = set_dvbt_standard(state, o_mode); if (status < 0) goto error; break; case OM_QAM_ITU_A: case OM_QAM_ITU_C:
dprintk(1, ": DVB-C Annex %c\n",
(state->m_operation_mode == OM_QAM_ITU_A) ? 'A' : 'C');
state->m_operation_mode = o_mode;
status = set_qam_standard(state, o_mode); if (status < 0) goto error; break; case OM_QAM_ITU_B: default:
status = -EINVAL;
}
error: if (status < 0)
pr_err("Error %d on %s\n", status, __func__); return status;
}
staticint start(struct drxk_state *state, s32 offset_freq,
s32 intermediate_frequency)
{ int status = -EINVAL;
/* Check insertion of the Reed-Solomon parity bytes */
status = read16(state, FEC_OC_MODE__A, &fec_oc_reg_mode); if (status < 0) goto error;
status = read16(state, FEC_OC_IPR_MODE__A, &fec_oc_reg_ipr_mode); if (status < 0) goto error;
fec_oc_reg_mode &= (~FEC_OC_MODE_PARITY__M);
fec_oc_reg_ipr_mode &= (~FEC_OC_IPR_MODE_MVAL_DIS_PAR__M); if (state->m_insert_rs_byte) { /* enable parity symbol forward */
fec_oc_reg_mode |= FEC_OC_MODE_PARITY__M; /* MVAL disable during parity bytes */
fec_oc_reg_ipr_mode |= FEC_OC_IPR_MODE_MVAL_DIS_PAR__M; /* TS burst length to 204 */
fec_oc_dto_burst_len = 204;
}
/* Check serial or parallel output */
fec_oc_reg_ipr_mode &= (~(FEC_OC_IPR_MODE_SERIAL__M)); if (!state->m_enable_parallel) { /* MPEG data output is serial -> set ipr_mode[0] */
fec_oc_reg_ipr_mode |= FEC_OC_IPR_MODE_SERIAL__M;
}
switch (o_mode) { case OM_DVBT:
max_bit_rate = state->m_dvbt_bitrate;
fec_oc_tmd_mode = 3;
fec_oc_rcn_ctl_rate = 0xC00000;
static_clk = state->m_dvbt_static_clk; break; case OM_QAM_ITU_A: case OM_QAM_ITU_C:
fec_oc_tmd_mode = 0x0004;
fec_oc_rcn_ctl_rate = 0xD2B4EE; /* good for >63 Mb/s */
max_bit_rate = state->m_dvbc_bitrate;
static_clk = state->m_dvbc_static_clk; break; default:
status = -EINVAL;
} /* switch (standard) */ if (status < 0) goto error;
staticint set_agc_rf(struct drxk_state *state, struct s_cfg_agc *p_agc_cfg, bool is_dtv)
{ int status = -EINVAL;
u16 data = 0; struct s_cfg_agc *p_if_agc_settings;
dprintk(1, "\n");
if (p_agc_cfg == NULL) goto error;
switch (p_agc_cfg->ctrl_mode) { case DRXK_AGC_CTRL_AUTO: /* Enable RF AGC DAC */
status = read16(state, IQM_AF_STDBY__A, &data); if (status < 0) goto error;
data &= ~IQM_AF_STDBY_STDBY_TAGC_RF_STANDBY;
status = write16(state, IQM_AF_STDBY__A, data); if (status < 0) goto error;
status = read16(state, SCU_RAM_AGC_CONFIG__A, &data); if (status < 0) goto error;
/* Enable SCU RF AGC loop */
data &= ~SCU_RAM_AGC_CONFIG_DISABLE_RF_AGC__M;
/* Polarity */ if (state->m_rf_agc_pol)
data |= SCU_RAM_AGC_CONFIG_INV_RF_POL__M; else
data &= ~SCU_RAM_AGC_CONFIG_INV_RF_POL__M;
status = write16(state, SCU_RAM_AGC_CONFIG__A, data); if (status < 0) goto error;
/* Set speed (using complementary reduction value) */
status = read16(state, SCU_RAM_AGC_KI_RED__A, &data); if (status < 0) goto error;
data &= ~SCU_RAM_AGC_KI_RED_RAGC_RED__M;
data |= (~(p_agc_cfg->speed <<
SCU_RAM_AGC_KI_RED_RAGC_RED__B)
& SCU_RAM_AGC_KI_RED_RAGC_RED__M);
status = write16(state, SCU_RAM_AGC_KI_RED__A, data); if (status < 0) goto error;
if (is_dvbt(state))
p_if_agc_settings = &state->m_dvbt_if_agc_cfg; elseif (is_qam(state))
p_if_agc_settings = &state->m_qam_if_agc_cfg; else
p_if_agc_settings = &state->m_atv_if_agc_cfg; if (p_if_agc_settings == NULL) {
status = -EINVAL; goto error;
}
/* Set TOP, only if IF-AGC is in AUTO mode */ if (p_if_agc_settings->ctrl_mode == DRXK_AGC_CTRL_AUTO) {
status = write16(state,
SCU_RAM_AGC_IF_IACCU_HI_TGT_MAX__A,
p_agc_cfg->top); if (status < 0) goto error;
}
/* Cut-Off current */
status = write16(state, SCU_RAM_AGC_RF_IACCU_HI_CO__A,
p_agc_cfg->cut_off_current); if (status < 0) goto error;
/* Max. output level */
status = write16(state, SCU_RAM_AGC_RF_MAX__A,
p_agc_cfg->max_output_level); if (status < 0) goto error;
break;
case DRXK_AGC_CTRL_USER: /* Enable RF AGC DAC */
status = read16(state, IQM_AF_STDBY__A, &data); if (status < 0) goto error;
data &= ~IQM_AF_STDBY_STDBY_TAGC_RF_STANDBY;
status = write16(state, IQM_AF_STDBY__A, data); if (status < 0) goto error;
/* Disable SCU RF AGC loop */
status = read16(state, SCU_RAM_AGC_CONFIG__A, &data); if (status < 0) goto error;
data |= SCU_RAM_AGC_CONFIG_DISABLE_RF_AGC__M; if (state->m_rf_agc_pol)
data |= SCU_RAM_AGC_CONFIG_INV_RF_POL__M; else
data &= ~SCU_RAM_AGC_CONFIG_INV_RF_POL__M;
status = write16(state, SCU_RAM_AGC_CONFIG__A, data); if (status < 0) goto error;
/* SCU c.o.c. to 0, enabling full control range */
status = write16(state, SCU_RAM_AGC_RF_IACCU_HI_CO__A, 0); if (status < 0) goto error;
/* Write value to output pin */
status = write16(state, SCU_RAM_AGC_RF_IACCU_HI__A,
p_agc_cfg->output_level); if (status < 0) goto error; break;
case DRXK_AGC_CTRL_OFF: /* Disable RF AGC DAC */
status = read16(state, IQM_AF_STDBY__A, &data); if (status < 0) goto error;
data |= IQM_AF_STDBY_STDBY_TAGC_RF_STANDBY;
status = write16(state, IQM_AF_STDBY__A, data); if (status < 0) goto error;
/* Disable SCU RF AGC loop */
status = read16(state, SCU_RAM_AGC_CONFIG__A, &data); if (status < 0) goto error;
data |= SCU_RAM_AGC_CONFIG_DISABLE_RF_AGC__M;
status = write16(state, SCU_RAM_AGC_CONFIG__A, data); if (status < 0) goto error; break;
default:
status = -EINVAL;
}
error: if (status < 0)
pr_err("Error %d on %s\n", status, __func__); return status;
}
#define SCU_RAM_AGC_KI_INV_IF_POL__M 0x2000
staticint set_agc_if(struct drxk_state *state, struct s_cfg_agc *p_agc_cfg, bool is_dtv)
{
u16 data = 0; int status = 0; struct s_cfg_agc *p_rf_agc_settings;
dprintk(1, "\n");
switch (p_agc_cfg->ctrl_mode) { case DRXK_AGC_CTRL_AUTO:
/* Enable IF AGC DAC */
status = read16(state, IQM_AF_STDBY__A, &data); if (status < 0) goto error;
data &= ~IQM_AF_STDBY_STDBY_TAGC_IF_STANDBY;
status = write16(state, IQM_AF_STDBY__A, data); if (status < 0) goto error;
status = read16(state, SCU_RAM_AGC_CONFIG__A, &data); if (status < 0) goto error;
/* Enable SCU IF AGC loop */
data &= ~SCU_RAM_AGC_CONFIG_DISABLE_IF_AGC__M;
/* Polarity */ if (state->m_if_agc_pol)
data |= SCU_RAM_AGC_CONFIG_INV_IF_POL__M; else
data &= ~SCU_RAM_AGC_CONFIG_INV_IF_POL__M;
status = write16(state, SCU_RAM_AGC_CONFIG__A, data); if (status < 0) goto error;
/* Set speed (using complementary reduction value) */
status = read16(state, SCU_RAM_AGC_KI_RED__A, &data); if (status < 0) goto error;
data &= ~SCU_RAM_AGC_KI_RED_IAGC_RED__M;
data |= (~(p_agc_cfg->speed <<
SCU_RAM_AGC_KI_RED_IAGC_RED__B)
& SCU_RAM_AGC_KI_RED_IAGC_RED__M);
status = write16(state, SCU_RAM_AGC_KI_RED__A, data); if (status < 0) goto error;
if (is_qam(state))
p_rf_agc_settings = &state->m_qam_rf_agc_cfg; else
p_rf_agc_settings = &state->m_atv_rf_agc_cfg; if (p_rf_agc_settings == NULL) return -1; /* Restore TOP */
status = write16(state, SCU_RAM_AGC_IF_IACCU_HI_TGT_MAX__A,
p_rf_agc_settings->top); if (status < 0) goto error; break;
case DRXK_AGC_CTRL_USER:
/* Enable IF AGC DAC */
status = read16(state, IQM_AF_STDBY__A, &data); if (status < 0) goto error;
data &= ~IQM_AF_STDBY_STDBY_TAGC_IF_STANDBY;
status = write16(state, IQM_AF_STDBY__A, data); if (status < 0) goto error;
status = read16(state, SCU_RAM_AGC_CONFIG__A, &data); if (status < 0) goto error;
/* Disable SCU IF AGC loop */
data |= SCU_RAM_AGC_CONFIG_DISABLE_IF_AGC__M;
/* Polarity */ if (state->m_if_agc_pol)
data |= SCU_RAM_AGC_CONFIG_INV_IF_POL__M; else
data &= ~SCU_RAM_AGC_CONFIG_INV_IF_POL__M;
status = write16(state, SCU_RAM_AGC_CONFIG__A, data); if (status < 0) goto error;
/* Write value to output pin */
status = write16(state, SCU_RAM_AGC_IF_IACCU_HI_TGT_MAX__A,
p_agc_cfg->output_level); if (status < 0) goto error; break;
case DRXK_AGC_CTRL_OFF:
/* Disable If AGC DAC */
status = read16(state, IQM_AF_STDBY__A, &data); if (status < 0) goto error;
data |= IQM_AF_STDBY_STDBY_TAGC_IF_STANDBY;
status = write16(state, IQM_AF_STDBY__A, data); if (status < 0) goto error;
/* Disable SCU IF AGC loop */
status = read16(state, SCU_RAM_AGC_CONFIG__A, &data); if (status < 0) goto error;
data |= SCU_RAM_AGC_CONFIG_DISABLE_IF_AGC__M;
status = write16(state, SCU_RAM_AGC_CONFIG__A, data); if (status < 0) goto error; break;
} /* switch (agcSettingsIf->ctrl_mode) */
/* always set the top to support
configurations without if-loop */
status = write16(state, SCU_RAM_AGC_INGAIN_TGT_MIN__A, p_agc_cfg->top);
error: if (status < 0)
pr_err("Error %d on %s\n", status, __func__); return status;
}
staticint get_qam_signal_to_noise(struct drxk_state *state,
s32 *p_signal_to_noise)
{ int status = 0;
u16 qam_sl_err_power = 0; /* accum. error between
raw and sliced symbols */
u32 qam_sl_sig_power = 0; /* used for MER, depends of
QAM modulation */
u32 qam_sl_mer = 0; /* QAM MER */
dprintk(1, "\n");
/* MER calculation */
/* get the register value needed for MER */
status = read16(state, QAM_SL_ERR_POWER__A, &qam_sl_err_power); if (status < 0) {
pr_err("Error %d on %s\n", status, __func__); return -EINVAL;
}
switch (state->props.modulation) { case QAM_16:
qam_sl_sig_power = DRXK_QAM_SL_SIG_POWER_QAM16 << 2; break; case QAM_32:
qam_sl_sig_power = DRXK_QAM_SL_SIG_POWER_QAM32 << 2; break; case QAM_64:
qam_sl_sig_power = DRXK_QAM_SL_SIG_POWER_QAM64 << 2; break; case QAM_128:
qam_sl_sig_power = DRXK_QAM_SL_SIG_POWER_QAM128 << 2; break; default: case QAM_256:
qam_sl_sig_power = DRXK_QAM_SL_SIG_POWER_QAM256 << 2; break;
}
Die Informationen auf dieser Webseite wurden
nach bestem Wissen sorgfältig zusammengestellt. Es wird jedoch weder Vollständigkeit, noch Richtigkeit,
noch Qualität der bereit gestellten Informationen zugesichert.
Bemerkung:
Die farbliche Syntaxdarstellung und die Messung sind noch experimentell.
