// SPDX-License-Identifier: GPL-2.0-or-later /* * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright (C) 2014-2017 Mentor Graphics Inc. #include <linux/clk.h>#include <linux/clk-provider.h>#include <linux/clkdev.h>#include <linux/ctype.h>#include <linux/delay.h>#include <linux/device.h>#include <linux/gpio/consumer.h>#include <linux/i2c.h>#include <linux/init.h>#include <linux/mod_devicetable.h>#include <linux/module.h>#include <linux/pm_runtime.h>#include <linux/regulator/consumer.h>#include <linux/slab.h>#include <linux/types.h>#include <media/v4l2-async.h>#include <media/v4l2-ctrls.h>#include <media/v4l2-device.h>#include <media/v4l2-event.h>#include <media/v4l2-fwnode.h>#include <media/v4l2-subdev.h>/* min/typical/max system clock (xclk) frequencies */ #define OV5640_XCLK_MIN 6000000#define OV5640_XCLK_MAX 54000000#define OV5640_NATIVE_WIDTH 2624#define OV5640_NATIVE_HEIGHT 1964#define OV5640_PIXEL_ARRAY_TOP 14#define OV5640_PIXEL_ARRAY_LEFT 16#define OV5640_PIXEL_ARRAY_WIDTH 2592#define OV5640_PIXEL_ARRAY_HEIGHT 1944/* FIXME: not documented. */ #define OV5640_MIN_VBLANK 24#define OV5640_MAX_VTS 3375#define OV5640_DEFAULT_SLAVE_ID 0x3c#define OV5640_LINK_RATE_MAX 490000000U#define OV5640_REG_SYS_RESET02 0x3002#define OV5640_REG_SYS_CLOCK_ENABLE02 0x3006#define OV5640_REG_SYS_CTRL0 0x3008#define OV5640_REG_SYS_CTRL0_SW_PWDN 0x42#define OV5640_REG_SYS_CTRL0_SW_PWUP 0x02#define OV5640_REG_SYS_CTRL0_SW_RST 0x82#define OV5640_REG_CHIP_ID 0x300a#define OV5640_REG_IO_MIPI_CTRL00 0x300e#define OV5640_REG_PAD_OUTPUT_ENABLE01 0x3017#define OV5640_REG_PAD_OUTPUT_ENABLE02 0x3018#define OV5640_REG_PAD_OUTPUT00 0x3019#define OV5640_REG_SYSTEM_CONTROL1 0x302e#define OV5640_REG_SC_PLL_CTRL0 0x3034#define OV5640_REG_SC_PLL_CTRL1 0x3035#define OV5640_REG_SC_PLL_CTRL2 0x3036#define OV5640_REG_SC_PLL_CTRL3 0x3037#define OV5640_REG_SLAVE_ID 0x3100#define OV5640_REG_SCCB_SYS_CTRL1 0x3103#define OV5640_REG_SYS_ROOT_DIVIDER 0x3108#define OV5640_REG_AWB_R_GAIN 0x3400#define OV5640_REG_AWB_G_GAIN 0x3402#define OV5640_REG_AWB_B_GAIN 0x3404#define OV5640_REG_AWB_MANUAL_CTRL 0x3406#define OV5640_REG_AEC_PK_EXPOSURE_HI 0x3500#define OV5640_REG_AEC_PK_EXPOSURE_MED 0x3501#define OV5640_REG_AEC_PK_EXPOSURE_LO 0x3502#define OV5640_REG_AEC_PK_MANUAL 0x3503#define OV5640_REG_AEC_PK_REAL_GAIN 0x350a#define OV5640_REG_AEC_PK_VTS 0x350c#define OV5640_REG_TIMING_HS 0x3800#define OV5640_REG_TIMING_VS 0x3802#define OV5640_REG_TIMING_HW 0x3804#define OV5640_REG_TIMING_VH 0x3806#define OV5640_REG_TIMING_DVPHO 0x3808#define OV5640_REG_TIMING_DVPVO 0x380a#define OV5640_REG_TIMING_HTS 0x380c#define OV5640_REG_TIMING_VTS 0x380e#define OV5640_REG_TIMING_HOFFS 0x3810#define OV5640_REG_TIMING_VOFFS 0x3812#define OV5640_REG_TIMING_TC_REG20 0x3820#define OV5640_REG_TIMING_TC_REG21 0x3821#define OV5640_REG_AEC_CTRL00 0x3a00#define OV5640_REG_AEC_B50_STEP 0x3a08#define OV5640_REG_AEC_B60_STEP 0x3a0a#define OV5640_REG_AEC_CTRL0D 0x3a0d#define OV5640_REG_AEC_CTRL0E 0x3a0e#define OV5640_REG_AEC_CTRL0F 0x3a0f#define OV5640_REG_AEC_CTRL10 0x3a10#define OV5640_REG_AEC_CTRL11 0x3a11#define OV5640_REG_AEC_CTRL1B 0x3a1b#define OV5640_REG_AEC_CTRL1E 0x3a1e#define OV5640_REG_AEC_CTRL1F 0x3a1f#define OV5640_REG_HZ5060_CTRL00 0x3c00#define OV5640_REG_HZ5060_CTRL01 0x3c01#define OV5640_REG_SIGMADELTA_CTRL0C 0x3c0c#define OV5640_REG_FRAME_CTRL01 0x4202#define OV5640_REG_FORMAT_CONTROL00 0x4300#define OV5640_REG_VFIFO_HSIZE 0x4602#define OV5640_REG_VFIFO_VSIZE 0x4604#define OV5640_REG_JPG_MODE_SELECT 0x4713#define OV5640_REG_CCIR656_CTRL00 0x4730#define OV5640_REG_POLARITY_CTRL00 0x4740#define OV5640_REG_MIPI_CTRL00 0x4800#define OV5640_REG_DEBUG_MODE 0x4814#define OV5640_REG_PCLK_PERIOD 0x4837#define OV5640_REG_ISP_FORMAT_MUX_CTRL 0x501f#define OV5640_REG_PRE_ISP_TEST_SET1 0x503d#define OV5640_REG_SDE_CTRL0 0x5580#define OV5640_REG_SDE_CTRL1 0x5581#define OV5640_REG_SDE_CTRL3 0x5583#define OV5640_REG_SDE_CTRL4 0x5584#define OV5640_REG_SDE_CTRL5 0x5585#define OV5640_REG_AVG_READOUT 0x56a1enum ov5640_mode_id {enum ov5640_frame_rate {enum ov5640_pixel_rate_id {/* * The chip manual suggests 24/48/96/192 MHz pixel clocks. * * 192MHz exceeds the sysclk limits; use 168MHz as maximum pixel rate for * full resolution mode @15 FPS. static const u32 ov5640_pixel_rates[] = {/* * MIPI CSI-2 link frequencies. * * Derived from the above defined pixel rate for bpp = (8, 16, 24) and * data_lanes = (1, 2) * * link_freq = (pixel_rate * bpp) / (2 * data_lanes) static const s64 ov5640_csi2_link_freqs[] = {/* Link freq for default mode: UYVY 16 bpp, 2 data lanes. */ #define OV5640_DEFAULT_LINK_FREQ 13enum ov5640_format_mux {struct ov5640_pixfmt {enum ov5640_format_mux mux;static const struct ov5640_pixfmt ov5640_dvp_formats[] = {/* YUV422, YUYV */ /* YUV422, UYVY */ /* YUV422, YUYV */ /* RGB565 {g[2:0],b[4:0]},{r[4:0],g[5:3]} */ /* RGB565 {r[4:0],g[5:3]},{g[2:0],b[4:0]} */ /* Raw, BGBG... / GRGR... */ /* Raw bayer, GBGB... / RGRG... */ /* Raw bayer, GRGR... / BGBG... */ /* Raw bayer, RGRG... / GBGB... */ /* sentinel */ } static const struct ov5640_pixfmt ov5640_csi2_formats[] = {/* YUV422, YUYV */ /* YUV422, UYVY */ /* YUV422, YUYV */ /* RGB565 {g[2:0],b[4:0]},{r[4:0],g[5:3]} */ /* BGR888: RGB */ /* Raw, BGBG... / GRGR... */ /* Raw bayer, GBGB... / RGRG... */ /* Raw bayer, GRGR... / BGBG... */ /* Raw bayer, RGRG... / GBGB... */ /* sentinel */ } /* * FIXME: remove this when a subdev API becomes available * to set the MIPI CSI-2 virtual channel. static unsigned int virtual_channel;"MIPI CSI-2 virtual channel (0..3), default 0" );static const int ov5640_framerates[] = {/* regulator supplies */ static const char * const ov5640_supply_name[] = {"DOVDD" , /* Digital I/O (1.8V) supply */ "AVDD" , /* Analog (2.8V) supply */ "DVDD" , /* Digital Core (1.5V) supply */ #define OV5640_NUM_SUPPLIES ARRAY_SIZE(ov5640_supply_name)/* * Image size under 1280 * 960 are SUBSAMPLING * Image size upper 1280 * 960 are SCALING enum ov5640_downsize_mode {struct reg_value {struct ov5640_timings {/* Analog crop rectangle. */ struct v4l2_rect analog_crop;/* Visible crop: from analog crop top-left corner. */ struct v4l2_rect crop;/* Total pixels per line: width + fixed hblank. */ /* Default vertical blanking: frame height = height + vblank. */ struct ov5640_mode_info {enum ov5640_mode_id id;enum ov5640_downsize_mode dn_mode;enum ov5640_pixel_rate_id pixel_rate;unsigned int width;unsigned int height;struct ov5640_timings dvp_timings;struct ov5640_timings csi2_timings;const struct reg_value *reg_data;/* Used by set_frame_interval only. */ struct ov5640_ctrls {struct v4l2_ctrl_handler handler;struct v4l2_ctrl *pixel_rate;struct v4l2_ctrl *link_freq;struct v4l2_ctrl *hblank;struct v4l2_ctrl *vblank;struct {struct v4l2_ctrl *auto_exp;struct v4l2_ctrl *exposure;struct {struct v4l2_ctrl *auto_wb;struct v4l2_ctrl *blue_balance;struct v4l2_ctrl *red_balance;struct {struct v4l2_ctrl *auto_gain;struct v4l2_ctrl *gain;struct v4l2_ctrl *brightness;struct v4l2_ctrl *light_freq;struct v4l2_ctrl *saturation;struct v4l2_ctrl *contrast;struct v4l2_ctrl *hue;struct v4l2_ctrl *test_pattern;struct v4l2_ctrl *hflip;struct v4l2_ctrl *vflip;struct ov5640_dev {struct i2c_client *i2c_client;struct v4l2_subdev sd;struct media_pad pad;struct v4l2_fwnode_endpoint ep; /* the parsed DT endpoint info */ struct clk *xclk; /* system clock to OV5640 */ struct regulator_bulk_data supplies[OV5640_NUM_SUPPLIES];struct gpio_desc *reset_gpio;struct gpio_desc *pwdn_gpio;bool upside_down;/* lock to protect all members below */ struct mutex lock;struct v4l2_mbus_framefmt fmt;bool pending_fmt_change;const struct ov5640_mode_info *current_mode;const struct ov5640_mode_info *last_mode;enum ov5640_frame_rate current_fr;struct v4l2_fract frame_interval;struct ov5640_ctrls ctrls;bool pending_mode_change;bool streaming;static inline struct ov5640_dev *to_ov5640_dev(struct v4l2_subdev *sd)return container_of(sd, struct ov5640_dev, sd);static inline struct v4l2_subdev *ctrl_to_sd(struct v4l2_ctrl *ctrl)return &container_of(ctrl->handler, struct ov5640_dev,static inline bool ov5640_is_csi2(const struct ov5640_dev *sensor)return sensor->ep.bus_type == V4L2_MBUS_CSI2_DPHY;static inline const struct ov5640_pixfmt *struct ov5640_dev *sensor)return ov5640_is_csi2(sensor) ? ov5640_csi2_formatsstatic const struct ov5640_pixfmt *struct ov5640_dev *sensor, u32 code)const struct ov5640_pixfmt *formats = ov5640_formats(sensor);unsigned int i;for (i = 0; formats[i].code; ++i) {if (formats[i].code == code)return &formats[i];return &formats[0];static u32 ov5640_code_to_bpp(struct ov5640_dev *sensor, u32 code)const struct ov5640_pixfmt *format = ov5640_code_to_pixfmt(sensor,return format->bpp;/* * FIXME: all of these register tables are likely filled with * entries that set the register to their power-on default values, * and which are otherwise not touched by this driver. Those entries * should be identified and removed to speed register load time * over i2c. /* YUV422 UYVY VGA@30fps */ static const struct v4l2_mbus_framefmt ov5640_csi2_default_fmt = {static const struct v4l2_mbus_framefmt ov5640_dvp_default_fmt = {static const struct reg_value ov5640_init_setting[] = {static const struct reg_value ov5640_setting_low_res[] = {static const struct reg_value ov5640_setting_720P_1280_720[] = {static const struct reg_value ov5640_setting_1080P_1920_1080[] = {static const struct reg_value ov5640_setting_QSXGA_2592_1944[] = {static const struct ov5640_mode_info ov5640_mode_data[OV5640_NUM_MODES] = {/* 160x120 */ /* Feed the full valid pixel array to the ISP. */ /* Maintain a minimum processing margin. */ /* 176x144 */ /* Feed the full valid pixel array to the ISP. */ /* Maintain a minimum processing margin. */ /* 320x240 */ /* Feed the full valid pixel array to the ISP. */ /* Maintain a minimum processing margin. */ /* 640x480 */ /* Feed the full valid pixel array to the ISP. */ /* Maintain a minimum processing margin. */ /* 720x480 */ /* Feed the full valid pixel array to the ISP. */ /* 720x576 */ /* Feed the full valid pixel array to the ISP. */ /* 1024x768 */ /* 1280x720 */ /* 1920x1080 */ /* Crop the full valid pixel array in the center. */ /* Maintain a larger processing margins. */ /* 2592x1944 */ /* Give more processing margin to full resolution. */ static const struct ov5640_timings *const struct ov5640_dev *sensor,const struct ov5640_mode_info *mode)if (ov5640_is_csi2(sensor))return &mode->csi2_timings;return &mode->dvp_timings;static int ov5640_init_slave_id(struct ov5640_dev *sensor)struct i2c_client *client = sensor->i2c_client;struct i2c_msg msg;int ret;if (client->addr == OV5640_DEFAULT_SLAVE_ID)return 0;sizeof (buf);if (ret < 0) {"%s: failed with %d\n" , __func__, ret);return ret;return 0;static int ov5640_write_reg(struct ov5640_dev *sensor, u16 reg, u8 val)struct i2c_client *client = sensor->i2c_client;struct i2c_msg msg;int ret;sizeof (buf);if (ret < 0) {"%s: error: reg=%x, val=%x\n" ,return ret;return 0;static int ov5640_read_reg(struct ov5640_dev *sensor, u16 reg, u8 *val)struct i2c_client *client = sensor->i2c_client;struct i2c_msg msg[2];int ret;sizeof (buf);if (ret < 0) {"%s: error: reg=%x\n" ,return ret;return 0;static int ov5640_read_reg16(struct ov5640_dev *sensor, u16 reg, u16 *val)int ret;if (ret)return ret;if (ret)return ret;return 0;static int ov5640_write_reg16(struct ov5640_dev *sensor, u16 reg, u16 val)int ret;if (ret)return ret;return ov5640_write_reg(sensor, reg + 1, val & 0xff);static int ov5640_mod_reg(struct ov5640_dev *sensor, u16 reg,int ret;if (ret)return ret;return ov5640_write_reg(sensor, reg, val);/* * After trying the various combinations, reading various * documentations spread around the net, and from the various * feedback, the clock tree is probably as follows: * * +--------------+ * | Ext. Clock | * +-+------------+ * | +----------+ * +->| PLL1 | - reg 0x3036, for the multiplier * +-+--------+ - reg 0x3037, bits 0-3 for the pre-divider * | +--------------+ * +->| System Clock | - reg 0x3035, bits 4-7 * +-+------------+ * | +--------------+ * +->| MIPI Divider | - reg 0x3035, bits 0-3 * | +-+------------+ * | +----------------> MIPI SCLK * | + +-----+ * | +->| / 2 |-------> MIPI BIT CLK * | +-----+ * | +--------------+ * +->| PLL Root Div | - reg 0x3037, bit 4 * +-+------------+ * | +---------+ * +->| Bit Div | - reg 0x3034, bits 0-3 * +-+-------+ * | +-------------+ * +->| SCLK Div | - reg 0x3108, bits 0-1 * | +-+-----------+ * | +---------------> SCLK * | +-------------+ * +->| SCLK 2X Div | - reg 0x3108, bits 2-3 * | +-+-----------+ * | +---------------> SCLK 2X * | +-------------+ * +->| PCLK Div | - reg 0x3108, bits 4-5 * ++------------+ * + +-----------+ * +->| P_DIV | - reg 0x3035, bits 0-3 * +-----+-----+ * +------------> PCLK * * There seems to be also constraints: * - the PLL pre-divider output rate should be in the 4-27MHz range * - the PLL multiplier output rate should be in the 500-1000MHz range * - PCLK >= SCLK * 2 in YUV, >= SCLK in Raw or JPEG /* * This is supposed to be ranging from 1 to 8, but the value is always * set to 3 in the vendor kernels. #define OV5640_PLL_PREDIV 3#define OV5640_PLL_MULT_MIN 4#define OV5640_PLL_MULT_MAX 252/* * This is supposed to be ranging from 1 to 16, but the value is * always set to either 1 or 2 in the vendor kernels. #define OV5640_SYSDIV_MIN 1#define OV5640_SYSDIV_MAX 16/* * This is supposed to be ranging from 1 to 2, but the value is always * set to 2 in the vendor kernels. #define OV5640_PLL_ROOT_DIV 2#define OV5640_PLL_CTRL3_PLL_ROOT_DIV_2 BIT(4)/* * We only supports 8-bit formats at the moment #define OV5640_BIT_DIV 2#define OV5640_PLL_CTRL0_MIPI_MODE_8BIT 0x08/* * This is supposed to be ranging from 1 to 8, but the value is always * set to 2 in the vendor kernels. #define OV5640_SCLK_ROOT_DIV 2/* * This is hardcoded so that the consistency is maintained between SCLK and * SCLK 2x. #define OV5640_SCLK2X_ROOT_DIV (OV5640_SCLK_ROOT_DIV / 2)/* * This is supposed to be ranging from 1 to 8, but the value is always * set to 1 in the vendor kernels. #define OV5640_PCLK_ROOT_DIV 1#define OV5640_PLL_SYS_ROOT_DIVIDER_BYPASS 0x00static unsigned long ov5640_compute_sys_clk(struct ov5640_dev *sensor,unsigned long sysclk = sensor->xclk_freq / pll_prediv * pll_mult;/* PLL1 output cannot exceed 1GHz. */ if (sysclk / 1000000 > 1000)return 0;return sysclk / sysdiv;static unsigned long ov5640_calc_sys_clk(struct ov5640_dev *sensor,unsigned long rate,unsigned long best = ~0;for (_sysdiv = OV5640_SYSDIV_MIN;for (_pll_mult = OV5640_PLL_MULT_MIN;unsigned long _rate;/* * The PLL multiplier cannot be odd if above * 127. if (_pll_mult > 127 && (_pll_mult % 2))continue ;/* * We have reached the maximum allowed PLL1 output, * increase sysdiv. if (!_rate)break ;/* * Prefer rates above the expected clock rate than * below, even if that means being less precise. if (_rate < rate)continue ;if (abs(rate - _rate) < abs(rate - best)) {if (_rate == rate)goto out;return best;/* * ov5640_set_mipi_pclk() - Calculate the clock tree configuration values * for the MIPI CSI-2 output. static int ov5640_set_mipi_pclk(struct ov5640_dev *sensor)unsigned long link_freq;unsigned long sysclk;int ret;/* Use the link freq computed at ov5640_update_pixel_rate() time. */ /* * - mipi_div - Additional divider for the MIPI lane clock. * * Higher link frequencies would make sysclk > 1GHz. * Keep the sysclk low and do not divide in the MIPI domain. if (link_freq > OV5640_LINK_RATE_MAX)else /* * Adjust PLL parameters to maintain the MIPI_SCLK-to-PCLK ratio. * * - root_div = 2 (fixed) * - bit_div : MIPI 8-bit = 2; MIPI 10-bit = 2.5 * - pclk_div = 1 (fixed) * - p_div = (2 lanes ? mipi_div : 2 * mipi_div) * * This results in the following MIPI_SCLK depending on the number * of lanes: * * - 2 lanes: MIPI_SCLK = (4 or 5) * PCLK * - 1 lanes: MIPI_SCLK = (8 or 10) * PCLK /* * Scaler clock: * - YUV: PCLK >= 2 * SCLK * - RAW or JPEG: PCLK >= SCLK * - sclk2x_div = sclk_div / 2 /* * Set the pixel clock period expressed in ns with 1-bit decimal * (0x01=0.5ns). * * The register is very briefly documented. In the OV5645 datasheet it * is described as (2 * pclk period), and from testing it seems the * actual definition is 2 * 8-bit sample period. * * 2 * sample_period = (mipi_clk * 2 * num_lanes / bpp) * (bpp / 8) / 2 /* Program the clock tree registers. */ if (ret)return ret;if (ret)return ret;if (ret)return ret;if (ret)return ret;if (ret)return ret;return ov5640_write_reg(sensor, OV5640_REG_PCLK_PERIOD, pclk_period);static u32 ov5640_calc_pixel_rate(struct ov5640_dev *sensor)const struct ov5640_mode_info *mode = sensor->current_mode;const struct ov5640_timings *timings = &mode->dvp_timings;return rate;static unsigned long ov5640_calc_pclk(struct ov5640_dev *sensor,unsigned long rate,unsigned long _rate = rate * OV5640_PLL_ROOT_DIV * OV5640_BIT_DIV *return _rate / *pll_rdiv / *bit_div / *pclk_div;static int ov5640_set_dvp_pclk(struct ov5640_dev *sensor)int ret;if (bit_div == 2)if (ret)return ret;/* * We need to set sysdiv according to the clock, and to clear * the MIPI divider. if (ret)return ret;if (ret)return ret;if (ret)return ret;return ov5640_mod_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER, 0x30,/* set JPEG framing sizes */ static int ov5640_set_jpeg_timings(struct ov5640_dev *sensor,const struct ov5640_mode_info *mode)int ret;/* * compression mode 3 timing * * Data is transmitted with programmable width (VFIFO_HSIZE). * No padding done. Last line may have less data. Varying * number of lines per frame, depending on amount of data. if (ret < 0)return ret;if (ret < 0)return ret;return ov5640_write_reg16(sensor, OV5640_REG_VFIFO_VSIZE, mode->height);/* download ov5640 settings to sensor through i2c */ static int ov5640_set_timings(struct ov5640_dev *sensor,const struct ov5640_mode_info *mode)const struct ov5640_timings *timings;const struct v4l2_rect *analog_crop;const struct v4l2_rect *crop;int ret;if (sensor->fmt.code == MEDIA_BUS_FMT_JPEG_1X8) {if (ret < 0)return ret;if (ret < 0)return ret;if (ret < 0)return ret;if (ret < 0)return ret;if (ret < 0)return ret;if (ret < 0)return ret;if (ret < 0)return ret;if (ret < 0)return ret;if (ret < 0)return ret;if (ret < 0)return ret;if (ret < 0)return ret;return 0;static void ov5640_load_regs(struct ov5640_dev *sensor,const struct reg_value *regs, unsigned int regnum)unsigned int i;int ret = 0;for (i = 0; i < regnum; ++i, ++regs) {/* remain in power down mode for DVP */ if (regs->reg_addr == OV5640_REG_SYS_CTRL0 &&continue ;if (mask)else if (ret)break ;if (delay_ms)static int ov5640_set_autoexposure(struct ov5640_dev *sensor, bool on)return ov5640_mod_reg(sensor, OV5640_REG_AEC_PK_MANUAL,/* read exposure, in number of line periods */ static int ov5640_get_exposure(struct ov5640_dev *sensor)int exp, ret;if (ret)return ret;int )temp & 0x0f) << 16;if (ret)return ret;int )temp << 8);if (ret)return ret;int )temp;return exp >> 4;/* write exposure, given number of line periods */ static int ov5640_set_exposure(struct ov5640_dev *sensor, u32 exposure)int ret;if (ret)return ret;if (ret)return ret;return ov5640_write_reg(sensor,static int ov5640_get_gain(struct ov5640_dev *sensor)int ret;if (ret)return ret;return gain & 0x3ff;static int ov5640_set_gain(struct ov5640_dev *sensor, int gain)return ov5640_write_reg16(sensor, OV5640_REG_AEC_PK_REAL_GAIN,static int ov5640_set_autogain(struct ov5640_dev *sensor, bool on)return ov5640_mod_reg(sensor, OV5640_REG_AEC_PK_MANUAL,static int ov5640_set_stream_dvp(struct ov5640_dev *sensor, bool on)return ov5640_write_reg(sensor, OV5640_REG_SYS_CTRL0, on ?static int ov5640_set_stream_mipi(struct ov5640_dev *sensor, bool on)int ret;/* * Enable/disable the MIPI interface * * 0x300e = on ? 0x45 : 0x40 * * FIXME: the sensor manual (version 2.03) reports * [7:5] = 000 : 1 data lane mode * [7:5] = 001 : 2 data lanes mode * But this settings do not work, while the following ones * have been validated for 2 data lanes mode. * * [7:5] = 010 : 2 data lanes mode * [4] = 0 : Power up MIPI HS Tx * [3] = 0 : Power up MIPI LS Rx * [2] = 1/0 : MIPI interface enable/disable * [1:0] = 01/00: FIXME: 'debug' if (ret)return ret;return ov5640_write_reg(sensor, OV5640_REG_FRAME_CTRL01,static int ov5640_get_sysclk(struct ov5640_dev *sensor)/* calculate sysclk */ int ret;if (ret)return ret;if (temp2 == 8 || temp2 == 10)if (ret)return ret;if (sysdiv == 0)if (ret)return ret;if (ret)return ret;if (ret)return ret;if (!prediv || !sysdiv || !pll_rdiv || !bit_div2x)return -EINVAL;return sysclk;static int ov5640_set_night_mode(struct ov5640_dev *sensor)/* read HTS from register settings */ int ret;if (ret)return ret;return ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL00, mode);static int ov5640_get_hts(struct ov5640_dev *sensor)/* read HTS from register settings */ int ret;if (ret)return ret;return hts;static int ov5640_get_vts(struct ov5640_dev *sensor)int ret;if (ret)return ret;return vts;static int ov5640_set_vts(struct ov5640_dev *sensor, int vts)return ov5640_write_reg16(sensor, OV5640_REG_TIMING_VTS, vts);static int ov5640_get_light_freq(struct ov5640_dev *sensor)/* get banding filter value */ int ret, light_freq = 0;if (ret)return ret;if (temp & 0x80) {/* manual */ if (ret)return ret;if (temp1 & 0x04) {/* 50Hz */ else {/* 60Hz */ else {/* auto */ if (ret)return ret;if (temp1 & 0x01) {/* 50Hz */ else {/* 60Hz */ return light_freq;static int ov5640_set_bandingfilter(struct ov5640_dev *sensor)int ret;/* read preview PCLK */ if (ret < 0)return ret;if (ret == 0)return -EINVAL;/* read preview HTS */ if (ret < 0)return ret;if (ret == 0)return -EINVAL;/* read preview VTS */ if (ret < 0)return ret;/* calculate banding filter */ /* 60Hz */ if (ret)return ret;if (!band_step60)return -EINVAL;int )((prev_vts - 4) / band_step60);if (ret)return ret;/* 50Hz */ if (ret)return ret;if (!band_step50)return -EINVAL;int )((prev_vts - 4) / band_step50);return ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL0E, max_band50);static int ov5640_set_ae_target(struct ov5640_dev *sensor, int target)/* stable in high */ int ret;/* 0.92 */ /* 1.08 */ if (fast_high > 255)if (ret)return ret;if (ret)return ret;if (ret)return ret;if (ret)return ret;if (ret)return ret;return ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL1F, fast_low);static int ov5640_get_binning(struct ov5640_dev *sensor)int ret;if (ret)return ret;return temp & BIT(0);static int ov5640_set_binning(struct ov5640_dev *sensor, bool enable)int ret;/* * TIMING TC REG21: * - [0]: Horizontal binning enable if (ret)return ret;/* * TIMING TC REG20: * - [0]: Undocumented, but hardcoded init sequences * are always setting REG21/REG20 bit 0 to same value... return ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG20,static int ov5640_set_virtual_channel(struct ov5640_dev *sensor)struct i2c_client *client = sensor->i2c_client;int ret;if (channel > 3) {"%s: wrong virtual_channel parameter, expected (0..3), got %d\n" ,return -EINVAL;if (ret)return ret;return ov5640_write_reg(sensor, OV5640_REG_DEBUG_MODE, temp);static const struct ov5640_mode_info *struct ov5640_dev *sensor, int width, int height, bool nearest)const struct ov5640_mode_info *mode;if (!mode ||return NULL;return mode;/* * sensor changes between scaling and subsampling, go through * exposure calculation static int ov5640_set_mode_exposure_calc(struct ov5640_dev *sensor,const struct ov5640_mode_info *mode)int ret;if (!mode->reg_data)return -EINVAL;/* read preview shutter */ if (ret < 0)return ret;if (ret < 0)return ret;if (ret && mode->id != OV5640_MODE_720P_1280_720 &&/* read preview gain */ if (ret < 0)return ret;/* get average */ if (ret)return ret;/* turn off night mode for capture */ if (ret < 0)return ret;/* Write capture setting */ if (ret < 0)return ret;/* read capture VTS */ if (ret < 0)return ret;if (ret < 0)return ret;if (ret == 0)return -EINVAL;if (ret < 0)return ret;if (ret == 0)return -EINVAL;/* calculate capture banding filter */ if (ret < 0)return ret;if (light_freq == 60) {/* 60Hz */ else {/* 50Hz */ if (!sensor->prev_sysclk) {if (ret < 0)return ret;if (ret == 0)return -EINVAL;if (!cap_bandfilt)return -EINVAL;int )((cap_vts - 4) / cap_bandfilt);/* calculate capture shutter/gain16 */ if (average > sensor->ae_low && average < sensor->ae_high) {/* in stable range */ else {/* gain to shutter */ if (cap_gain16_shutter < (cap_bandfilt * 16)) {/* shutter < 1/100 */ if (cap_shutter < 1)if (cap_gain16 < 16)else {if (cap_gain16_shutter > (cap_bandfilt * cap_maxband * 16)) {/* exposure reach max */ if (!cap_shutter)return -EINVAL;else {/* 1/100 < (cap_shutter = n/100) =< max */ int )(cap_gain16_shutter / 16 / cap_bandfilt))if (!cap_shutter)return -EINVAL;/* set capture gain */ if (ret)return ret;/* write capture shutter */ if (cap_shutter > (cap_vts - 4)) {if (ret < 0)return ret;/* set exposure */ return ov5640_set_exposure(sensor, cap_shutter);/* * if sensor changes inside scaling or subsampling * change mode directly static int ov5640_set_mode_direct(struct ov5640_dev *sensor,const struct ov5640_mode_info *mode)if (!mode->reg_data)return -EINVAL;/* Write capture setting */ return ov5640_set_timings(sensor, mode);static int ov5640_set_mode(struct ov5640_dev *sensor)const struct ov5640_mode_info *mode = sensor->current_mode;const struct ov5640_mode_info *orig_mode = sensor->last_mode;enum ov5640_downsize_mode dn_mode, orig_dn_mode;bool auto_gain = sensor->ctrls.auto_gain->val == 1;bool auto_exp = sensor->ctrls.auto_exp->val == V4L2_EXPOSURE_AUTO;int ret;/* auto gain and exposure must be turned off when changing modes */ if (auto_gain) {false );if (ret)return ret;if (auto_exp) {false );if (ret)goto restore_auto_gain;if (ov5640_is_csi2(sensor))else if (ret < 0)return 0;if ((dn_mode == SUBSAMPLING && orig_dn_mode == SCALING) ||/* * change between subsampling and scaling * go through exposure calculation else {/* * change inside subsampling or scaling * download firmware directly if (ret < 0)goto restore_auto_exp_gain;/* restore auto gain and exposure */ if (auto_gain)true );if (auto_exp)true );if (ret < 0)return ret;if (ret < 0)return ret;if (ret < 0)return ret;if (ret < 0)return ret;if (ret < 0)return ret;false ;return 0;if (auto_exp)true );if (auto_gain)true );return ret;static int ov5640_set_framefmt(struct ov5640_dev *sensor,struct v4l2_mbus_framefmt *format);/* restore the last set video mode after chip power-on */ static int ov5640_restore_mode(struct ov5640_dev *sensor)int ret;/* first load the initial register values */ if (ret)return ret;/* now restore the last capture mode */ if (ret < 0)return ret;return ov5640_set_framefmt(sensor, &sensor->fmt);static void ov5640_power(struct ov5640_dev *sensor, bool enable)/* * From section 2.7 power up sequence: * t0 + t1 + t2 >= 5ms Delay from DOVDD stable to PWDN pull down * t3 >= 1ms Delay from PWDN pull down to RESETB pull up * t4 >= 20ms Delay from RESETB pull up to SCCB (i2c) stable * * Some modules don't expose RESETB/PWDN pins directly, instead providing a * "PWUP" GPIO which is wired through appropriate delays and inverters to the * pins. * * In such cases, this gpio should be mapped to pwdn_gpio in the driver, and we * should still toggle the pwdn_gpio below with the appropriate delays, while * the calls to reset_gpio will be ignored. static void ov5640_powerup_sequence(struct ov5640_dev *sensor)if (sensor->pwdn_gpio) {/* camera power cycle */ false );/* t2 */ true );/* t3 */ else {/* software reset */ /* t4 */ /* * software standby: allows registers programming; * exit at restore_mode() for CSI, s_stream(1) for DVP static int ov5640_set_power_on(struct ov5640_dev *sensor)struct i2c_client *client = sensor->i2c_client;int ret;if (ret) {"%s: failed to enable clock\n" ,return ret;if (ret) {"%s: failed to enable regulators\n" ,goto xclk_off;if (ret)
Messung V0.5 C=95 H=98 G=96
¤ Dauer der Verarbeitung: 0.30 Sekunden
¤ *© Formatika GbR, Deutschland
