// SPDX-License-Identifier: GPL-2.0+ // saa711x - Philips SAA711x video decoder driver // This driver can work with saa7111, saa7111a, saa7113, saa7114, // saa7115 and saa7118. // // Based on saa7114 driver by Maxim Yevtyushkin, which is based on // the saa7111 driver by Dave Perks. // // Copyright (C) 1998 Dave Perks <dperks@ibm.net> // Copyright (C) 2002 Maxim Yevtyushkin <max@linuxmedialabs.com> // // Slight changes for video timing and attachment output by // Wolfgang Scherr <scherr@net4you.net> // // Moved over to the linux >= 2.4.x i2c protocol (1/1/2003) // by Ronald Bultje <rbultje@ronald.bitfreak.net> // // Added saa7115 support by Kevin Thayer <nufan_wfk at yahoo.com> // (2/17/2003) // // VBI support (2004) and cleanups (2005) by Hans Verkuil <hverkuil@xs4all.nl> // // Copyright (c) 2005-2006 Mauro Carvalho Chehab <mchehab@kernel.org> // SAA7111, SAA7113 and SAA7118 support
struct { /* chroma gain control cluster */ struct v4l2_ctrl *agc; struct v4l2_ctrl *gain;
};
v4l2_std_id std; int input; int output; int enable; int radio; int width; int height; enum saa711x_model ident;
u32 audclk_freq;
u32 crystal_freq; bool ucgc;
u8 cgcdiv; bool apll; bool double_asclk;
};
while (*regs != 0x00) {
reg = *(regs++);
data = *(regs++);
/* According with datasheets, reserved regs should be
filled with 0 - seems better not to touch on they */ if (saa711x_has_reg(state->ident, reg)) { if (saa711x_write(sd, reg, data) < 0) return -1;
} else {
v4l2_dbg(1, debug, sd, "tried to access reserved reg 0x%02x\n", reg);
}
} return 0;
}
/* decoder */
R_06_H_SYNC_START, 0xf3, /* HSB at 13(50Hz) / 17(60Hz)
* pixels after end of last line */
R_07_H_SYNC_STOP, 0xe8, /* HSS seems to be needed to
* work with NTSC, too */
R_08_SYNC_CNTL, 0xc8, /* AUFD=1, FSEL=1, EXFIL=0,
* VTRC=1, HPLL=0, VNOI=0 */
R_09_LUMA_CNTL, 0x01, /* BYPS=0, PREF=0, BPSS=0,
* VBLB=0, UPTCV=0, APER=1 */
R_0A_LUMA_BRIGHT_CNTL, 0x80,
R_0B_LUMA_CONTRAST_CNTL, 0x47, /* 0b - CONT=1.109 */
R_0C_CHROMA_SAT_CNTL, 0x40,
R_0D_CHROMA_HUE_CNTL, 0x00,
R_0E_CHROMA_CNTL_1, 0x01, /* 0e - CDTO=0, CSTD=0, DCCF=0,
* FCTC=0, CHBW=1 */
R_0F_CHROMA_GAIN_CNTL, 0x00, /* reserved */
R_10_CHROMA_CNTL_2, 0x48, /* 10 - OFTS=1, HDEL=0, VRLN=1, YDEL=0 */
R_11_MODE_DELAY_CNTL, 0x1c, /* 11 - GPSW=0, CM99=0, FECO=0, COMPO=1,
* OEYC=1, OEHV=1, VIPB=0, COLO=0 */
R_12_RT_SIGNAL_CNTL, 0x00, /* 12 - output control 2 */
R_13_RT_X_PORT_OUT_CNTL, 0x00, /* 13 - output control 3 */
R_14_ANAL_ADC_COMPAT_CNTL, 0x00,
R_15_VGATE_START_FID_CHG, 0x00,
R_16_VGATE_STOP, 0x00,
R_17_MISC_VGATE_CONF_AND_MSB, 0x00,
0x00, 0x00
};
/* * This table has one illegal value, and some values that are not * correct according to the datasheet initialization table. * * If you need a table with legal/default values tell the driver in * i2c_board_info.platform_data, and you will get the gm7113c_init * table instead.
*/
/* SAA7113 Init codes */ staticconstunsignedchar saa7113_init[] = {
R_01_INC_DELAY, 0x08,
R_02_INPUT_CNTL_1, 0xc2,
R_03_INPUT_CNTL_2, 0x30,
R_04_INPUT_CNTL_3, 0x00,
R_05_INPUT_CNTL_4, 0x00,
R_06_H_SYNC_START, 0x89, /* Illegal value -119,
* min. value = -108 (0x94) */
R_07_H_SYNC_STOP, 0x0d,
R_08_SYNC_CNTL, 0x88, /* Not datasheet default.
* HTC = VTR mode, should be 0x98 */
R_09_LUMA_CNTL, 0x01,
R_0A_LUMA_BRIGHT_CNTL, 0x80,
R_0B_LUMA_CONTRAST_CNTL, 0x47,
R_0C_CHROMA_SAT_CNTL, 0x40,
R_0D_CHROMA_HUE_CNTL, 0x00,
R_0E_CHROMA_CNTL_1, 0x01,
R_0F_CHROMA_GAIN_CNTL, 0x2a,
R_10_CHROMA_CNTL_2, 0x08, /* Not datsheet default.
* VRLN enabled, should be 0x00 */
R_11_MODE_DELAY_CNTL, 0x0c,
R_12_RT_SIGNAL_CNTL, 0x07, /* Not datasheet default,
* should be 0x01 */
R_13_RT_X_PORT_OUT_CNTL, 0x00,
R_14_ANAL_ADC_COMPAT_CNTL, 0x00,
R_15_VGATE_START_FID_CHG, 0x00,
R_16_VGATE_STOP, 0x00,
R_17_MISC_VGATE_CONF_AND_MSB, 0x00,
0x00, 0x00
};
/* * GM7113C is a clone of the SAA7113 chip * This init table is copied out of the saa7113 datasheet. * In R_08 we enable "Automatic Field Detection" [AUFD], * this is disabled when saa711x_set_v4lstd is called.
*/ staticconstunsignedchar gm7113c_init[] = {
R_01_INC_DELAY, 0x08,
R_02_INPUT_CNTL_1, 0xc0,
R_03_INPUT_CNTL_2, 0x33,
R_04_INPUT_CNTL_3, 0x00,
R_05_INPUT_CNTL_4, 0x00,
R_06_H_SYNC_START, 0xe9,
R_07_H_SYNC_STOP, 0x0d,
R_08_SYNC_CNTL, 0x98,
R_09_LUMA_CNTL, 0x01,
R_0A_LUMA_BRIGHT_CNTL, 0x80,
R_0B_LUMA_CONTRAST_CNTL, 0x47,
R_0C_CHROMA_SAT_CNTL, 0x40,
R_0D_CHROMA_HUE_CNTL, 0x00,
R_0E_CHROMA_CNTL_1, 0x01,
R_0F_CHROMA_GAIN_CNTL, 0x2a,
R_10_CHROMA_CNTL_2, 0x00,
R_11_MODE_DELAY_CNTL, 0x0c,
R_12_RT_SIGNAL_CNTL, 0x01,
R_13_RT_X_PORT_OUT_CNTL, 0x00,
R_14_ANAL_ADC_COMPAT_CNTL, 0x00,
R_15_VGATE_START_FID_CHG, 0x00,
R_16_VGATE_STOP, 0x00,
R_17_MISC_VGATE_CONF_AND_MSB, 0x00,
0x00, 0x00
};
/* If a value differs from the Hauppauge driver values, then the comment starts with 'was 0xXX' to denote the Hauppauge value. Otherwise the value is identical to what the
Hauppauge driver sets. */
/* SAA7114 and SAA7115 initialization table */ staticconstunsignedchar saa7115_init_auto_input[] = { /* Front-End Part */
R_01_INC_DELAY, 0x48, /* white peak control disabled */
R_03_INPUT_CNTL_2, 0x20, /* was 0x30. 0x20: long vertical blanking */
R_04_INPUT_CNTL_3, 0x90, /* analog gain set to 0 */
R_05_INPUT_CNTL_4, 0x90, /* analog gain set to 0 */ /* Decoder Part */
R_06_H_SYNC_START, 0xeb, /* horiz sync begin = -21 */
R_07_H_SYNC_STOP, 0xe0, /* horiz sync stop = -17 */
R_09_LUMA_CNTL, 0x53, /* 0x53, was 0x56 for 60hz. luminance control */
R_0A_LUMA_BRIGHT_CNTL, 0x80, /* was 0x88. decoder brightness, 0x80 is itu standard */
R_0B_LUMA_CONTRAST_CNTL, 0x44, /* was 0x48. decoder contrast, 0x44 is itu standard */
R_0C_CHROMA_SAT_CNTL, 0x40, /* was 0x47. decoder saturation, 0x40 is itu standard */
R_0D_CHROMA_HUE_CNTL, 0x00,
R_0F_CHROMA_GAIN_CNTL, 0x00, /* use automatic gain */
R_10_CHROMA_CNTL_2, 0x06, /* chroma: active adaptive combfilter */
R_11_MODE_DELAY_CNTL, 0x00,
R_12_RT_SIGNAL_CNTL, 0x9d, /* RTS0 output control: VGATE */
R_13_RT_X_PORT_OUT_CNTL, 0x80, /* ITU656 standard mode, RTCO output enable RTCE */
R_14_ANAL_ADC_COMPAT_CNTL, 0x00,
R_18_RAW_DATA_GAIN_CNTL, 0x40, /* gain 0x00 = nominal */
R_19_RAW_DATA_OFF_CNTL, 0x80,
R_1A_COLOR_KILL_LVL_CNTL, 0x77, /* recommended value */
R_1B_MISC_TVVCRDET, 0x42, /* recommended value */
R_1C_ENHAN_COMB_CTRL1, 0xa9, /* recommended value */
R_1D_ENHAN_COMB_CTRL2, 0x01, /* recommended value */
R_80_GLOBAL_CNTL_1, 0x0, /* No tasks enabled at init */
/* Power Device Control */
R_88_POWER_SAVE_ADC_PORT_CNTL, 0xd0, /* reset device */
R_88_POWER_SAVE_ADC_PORT_CNTL, 0xf0, /* set device programmed, all in operational mode */
0x00, 0x00
};
/* This is weird: the datasheet says that you should use 2 as the minimum value, */ /* but Hauppauge uses 0, and changing that to 2 causes indeed problems (for 50hz) */ /* hoffset low (input), 0x0002 is minimum */
R_94_A_HORIZ_INPUT_WINDOW_START, 0x00,
R_95_A_HORIZ_INPUT_WINDOW_START_MSB, 0x00,
/* This is weird: the datasheet says that you should use 2 as the minimum value, */ /* but Hauppauge uses 0, and changing that to 2 causes indeed problems (for 50hz) */ /* hoffset low (input), 0x0002 is minimum. See comment above. */
R_C4_B_HORIZ_INPUT_WINDOW_START, 0x00,
R_C5_B_HORIZ_INPUT_WINDOW_START_MSB, 0x00,
/* note: 2 x zoom ensures that VBI lines have same length as video lines. */
R_A8_A_HORIZ_LUMA_SCALING_INC, 0x00,
R_A9_A_HORIZ_LUMA_SCALING_INC_MSB, 0x02,
R_AA_A_HORIZ_LUMA_PHASE_OFF, 0x00,
/* must be horiz lum scaling / 2 */
R_AC_A_HORIZ_CHROMA_SCALING_INC, 0x00,
R_AD_A_HORIZ_CHROMA_SCALING_INC_MSB, 0x01,
/* must be offset luma / 2 */
R_AE_A_HORIZ_CHROMA_PHASE_OFF, 0x00,
/* Checks for chips that don't have audio clock (saa7111, saa7113) */ if (!saa711x_has_reg(state->ident, R_30_AUD_MAST_CLK_CYCLES_PER_FIELD)) return 0;
switch (ctrl->id) { case V4L2_CID_BRIGHTNESS:
saa711x_write(sd, R_0A_LUMA_BRIGHT_CNTL, ctrl->val); break;
case V4L2_CID_CONTRAST:
saa711x_write(sd, R_0B_LUMA_CONTRAST_CNTL, ctrl->val); break;
case V4L2_CID_SATURATION:
saa711x_write(sd, R_0C_CHROMA_SAT_CNTL, ctrl->val); break;
case V4L2_CID_HUE:
saa711x_write(sd, R_0D_CHROMA_HUE_CNTL, ctrl->val); break;
case V4L2_CID_CHROMA_AGC: /* chroma gain cluster */ if (state->agc->val)
saa711x_write(sd, R_0F_CHROMA_GAIN_CNTL, state->gain->val); else
saa711x_write(sd, R_0F_CHROMA_GAIN_CNTL, state->gain->val | 0x80); break;
default: return -EINVAL;
}
return 0;
}
staticint saa711x_set_size(struct v4l2_subdev *sd, int width, int height)
{ struct saa711x_state *state = to_state(sd); int HPSC, HFSC; int VSCY; int res; int is_50hz = state->std & V4L2_STD_625_50; int Vsrc = is_50hz ? 576 : 480;
v4l2_dbg(1, debug, sd, "decoder set size to %ix%i\n", width, height);
/* FIXME need better bounds checking here */ if ((width < 1) || (width > 1440)) return -EINVAL; if ((height < 1) || (height > Vsrc)) return -EINVAL;
if (!saa711x_has_reg(state->ident, R_D0_B_HORIZ_PRESCALING)) { /* Decoder only supports 720 columns and 480 or 576 lines */ if (width != 720) return -EINVAL; if (height != Vsrc) return -EINVAL;
}
state->width = width;
state->height = height;
if (!saa711x_has_reg(state->ident, R_CC_B_HORIZ_OUTPUT_WINDOW_LENGTH)) return 0;
/* probably have a valid size, let's set it */ /* Set output width/height */ /* width */
/* Prevent unnecessary standard changes. During a standard change the I-Port is temporarily disabled. Any devices reading from that port can get confused. Note that s_std is also used to switch from radio to TV mode, so if a s_std is broadcast to all I2C devices then you do not want to have an unwanted
side-effect here. */ if (std == state->std) return;
state->std = std;
// This works for NTSC-M, SECAM-L and the 50Hz PAL variants. if (std & V4L2_STD_525_60) {
v4l2_dbg(1, debug, sd, "decoder set standard 60 Hz\n"); if (state->ident == GM7113C) {
u8 reg = saa711x_read(sd, R_08_SYNC_CNTL);
reg &= ~(SAA7113_R_08_FSEL | SAA7113_R_08_AUFD);
reg |= SAA7113_R_08_FSEL;
saa711x_write(sd, R_08_SYNC_CNTL, reg);
} else {
saa711x_writeregs(sd, saa7115_cfg_60hz_video);
}
saa711x_set_size(sd, 720, 480);
} else {
v4l2_dbg(1, debug, sd, "decoder set standard 50 Hz\n"); if (state->ident == GM7113C) {
u8 reg = saa711x_read(sd, R_08_SYNC_CNTL);
reg &= ~(SAA7113_R_08_FSEL | SAA7113_R_08_AUFD);
saa711x_write(sd, R_08_SYNC_CNTL, reg);
} else {
saa711x_writeregs(sd, saa7115_cfg_50hz_video);
}
saa711x_set_size(sd, 720, 576);
}
/* Register 0E - Bits D6-D4 on NO-AUTO mode (SAA7111 and SAA7113 doesn't have auto mode) 50 Hz / 625 lines 60 Hz / 525 lines 000 PAL BGDHI (4.43Mhz) NTSC M (3.58MHz) 001 NTSC 4.43 (50 Hz) PAL 4.43 (60 Hz) 010 Combination-PAL N (3.58MHz) NTSC 4.43 (60 Hz) 011 NTSC N (3.58MHz) PAL M (3.58MHz) 100 reserved NTSC-Japan (3.58MHz)
*/ if (state->ident <= SAA7113 ||
state->ident == GM7113C) {
u8 reg = saa711x_read(sd, R_0E_CHROMA_CNTL_1) & 0x8f;
/* setup the sliced VBI lcr registers according to the sliced VBI format */ staticvoid saa711x_set_lcr(struct v4l2_subdev *sd, struct v4l2_sliced_vbi_format *fmt)
{ struct saa711x_state *state = to_state(sd); int is_50hz = (state->std & V4L2_STD_625_50);
u8 lcr[24]; int i, x;
#if 1 /* saa7113/7114/7118 VBI support are experimental */ if (!saa711x_has_reg(state->ident, R_41_LCR_BASE)) return;
#else /* SAA7113 and SAA7118 also should support VBI - Need testing */ if (state->ident != SAA7115) return; #endif
for (i = 0; i <= 23; i++)
lcr[i] = 0xff;
if (fmt == NULL) { /* raw VBI */ if (is_50hz) for (i = 6; i <= 23; i++)
lcr[i] = 0xdd; else for (i = 10; i <= 21; i++)
lcr[i] = 0xdd;
} else { /* sliced VBI */ /* first clear lines that cannot be captured */ if (is_50hz) { for (i = 0; i <= 5; i++)
fmt->service_lines[0][i] =
fmt->service_lines[1][i] = 0;
} else { for (i = 0; i <= 9; i++)
fmt->service_lines[0][i] =
fmt->service_lines[1][i] = 0; for (i = 22; i <= 23; i++)
fmt->service_lines[0][i] =
fmt->service_lines[1][i] = 0;
}
/* Now set the lcr values according to the specified service */ for (i = 6; i <= 23; i++) {
lcr[i] = 0; for (x = 0; x <= 1; x++) { switch (fmt->service_lines[1-x][i]) { case 0:
lcr[i] |= 0xf << (4 * x); break; case V4L2_SLICED_TELETEXT_B:
lcr[i] |= 1 << (4 * x); break; case V4L2_SLICED_CAPTION_525:
lcr[i] |= 4 << (4 * x); break; case V4L2_SLICED_WSS_625:
lcr[i] |= 5 << (4 * x); break; case V4L2_SLICED_VPS:
lcr[i] |= 7 << (4 * x); break;
}
}
}
}
/* write the lcr registers */ for (i = 2; i <= 23; i++) {
saa711x_write(sd, i - 2 + R_41_LCR_BASE, lcr[i]);
}
memset(sliced->service_lines, 0, sizeof(sliced->service_lines));
sliced->service_set = 0; /* done if using raw VBI */ if (saa711x_read(sd, R_80_GLOBAL_CNTL_1) & 0x10) return 0; for (i = 2; i <= 23; i++) {
u8 v = saa711x_read(sd, i - 2 + R_41_LCR_BASE);
/* Decode the sliced VBI data stream as created by the saa7115. The format is described in the saa7115 datasheet in Tables 25 and 26 and in Figure 33. The current implementation uses SAV/EAV codes and not the ancillary data headers. The vbi->p pointer points to the R_5E_SDID byte right after the SAV
code. */ staticint saa711x_decode_vbi_line(struct v4l2_subdev *sd, struct v4l2_decode_vbi_line *vbi)
{ struct saa711x_state *state = to_state(sd); staticconstchar vbi_no_data_pattern[] = {
0xa0, 0xa0, 0xa0, 0xa0, 0xa0, 0xa0, 0xa0, 0xa0, 0xa0, 0xa0
};
u8 *p = vbi->p;
u32 wss; int id1, id2; /* the ID1 and ID2 bytes from the internal header */
vbi->type = 0; /* mark result as a failure */
id1 = p[2];
id2 = p[3]; /* Note: the field bit is inverted for 60 Hz video */ if (state->std & V4L2_STD_525_60)
id1 ^= 0x40;
/* Skip internal header, p now points to the start of the payload */
p += 4;
vbi->p = p;
/* calculate field and line number of the VBI packet (1-23) */
vbi->is_second_field = ((id1 & 0x40) != 0);
vbi->line = (id1 & 0x3f) << 3;
vbi->line |= (id2 & 0x70) >> 4;
/* Obtain data type */
id2 &= 0xf;
/* If the VBI slicer does not detect any signal it will fill up
the payload buffer with 0xa0 bytes. */ if (!memcmp(p, vbi_no_data_pattern, sizeof(vbi_no_data_pattern))) return 0;
/* decode payloads */ switch (id2) { case 1:
vbi->type = V4L2_SLICED_TELETEXT_B; break; case 4: if (!parity8(p[0]) || !parity8(p[1])) return 0;
vbi->type = V4L2_SLICED_CAPTION_525; break; case 5:
wss = saa711x_decode_wss(p); if (wss == -1) return 0;
p[0] = wss & 0xff;
p[1] = wss >> 8;
vbi->type = V4L2_SLICED_WSS_625; break; case 7: if (saa711x_decode_vps(p, p) != 0) return 0;
vbi->type = V4L2_SLICED_VPS; break; default: break;
} return 0;
}
/* * The V4L2 core already initializes std with all supported * Standards. All driver needs to do is to mask it, to remove * standards that don't apply from the mask
*/
switch (reg1e & 0x03) { case 1:
*std &= V4L2_STD_NTSC; break; case 2: /* * V4L2_STD_PAL just cover the european PAL standards. * This is wrong, as the device could also be using an * other PAL standard.
*/
*std &= V4L2_STD_PAL | V4L2_STD_PAL_N | V4L2_STD_PAL_Nc |
V4L2_STD_PAL_M | V4L2_STD_PAL_60; break; case 3:
*std &= V4L2_STD_SECAM; break; default:
*std = V4L2_STD_UNKNOWN; /* Can't detect anything */ break;
}
}
if (state->ident != GM7113C &&
state->ident != SAA7113) return;
if (data->saa7113_r08_htc) {
work = saa711x_read(sd, R_08_SYNC_CNTL);
work &= ~SAA7113_R_08_HTC_MASK;
work |= ((*data->saa7113_r08_htc) << SAA7113_R_08_HTC_OFFSET);
saa711x_write(sd, R_08_SYNC_CNTL, work);
}
if (data->saa7113_r10_vrln) {
work = saa711x_read(sd, R_10_CHROMA_CNTL_2);
work &= ~SAA7113_R_10_VRLN_MASK; if (*data->saa7113_r10_vrln)
work |= (1 << SAA7113_R_10_VRLN_OFFSET);
saa711x_write(sd, R_10_CHROMA_CNTL_2, work);
}
if (data->saa7113_r10_ofts) {
work = saa711x_read(sd, R_10_CHROMA_CNTL_2);
work &= ~SAA7113_R_10_OFTS_MASK;
work |= (*data->saa7113_r10_ofts << SAA7113_R_10_OFTS_OFFSET);
saa711x_write(sd, R_10_CHROMA_CNTL_2, work);
}
if (data->saa7113_r12_rts0) {
work = saa711x_read(sd, R_12_RT_SIGNAL_CNTL);
work &= ~SAA7113_R_12_RTS0_MASK;
work |= (*data->saa7113_r12_rts0 << SAA7113_R_12_RTS0_OFFSET);
/* According to the datasheet,
* SAA7113_RTS_DOT_IN should only be used on RTS1 */
WARN_ON(*data->saa7113_r12_rts0 == SAA7113_RTS_DOT_IN);
saa711x_write(sd, R_12_RT_SIGNAL_CNTL, work);
}
if (data->saa7113_r12_rts1) {
work = saa711x_read(sd, R_12_RT_SIGNAL_CNTL);
work &= ~SAA7113_R_12_RTS1_MASK;
work |= (*data->saa7113_r12_rts1 << SAA7113_R_12_RTS1_OFFSET);
saa711x_write(sd, R_12_RT_SIGNAL_CNTL, work);
}
if (data->saa7113_r13_adlsb) {
work = saa711x_read(sd, R_13_RT_X_PORT_OUT_CNTL);
work &= ~SAA7113_R_13_ADLSB_MASK; if (*data->saa7113_r13_adlsb)
work |= (1 << SAA7113_R_13_ADLSB_OFFSET);
saa711x_write(sd, R_13_RT_X_PORT_OUT_CNTL, work);
}
}
/** * saa711x_detect_chip - Detects the saa711x (or clone) variant * @client: I2C client structure. * @id: I2C device ID structure. * @name: Name of the device to be filled. * * Detects the Philips/NXP saa711x chip, or some clone of it. * if 'id' is NULL or id->driver_data is equal to 1, it auto-probes * the analog demod. * If the tuner is not found, it returns -ENODEV. * If auto-detection is disabled and the tuner doesn't match what it was * required, it returns -EINVAL and fills 'name'. * If the chip is found, it returns the chip ID and fills 'name'.
*/ staticint saa711x_detect_chip(struct i2c_client *client, conststruct i2c_device_id *id, char *name)
{ char chip_ver[CHIP_VER_SIZE]; char chip_id; int i; int autodetect;
autodetect = !id || id->driver_data == 1;
/* Read the chip version register */ for (i = 0; i < CHIP_VER_SIZE; i++) {
i2c_smbus_write_byte_data(client, 0, i);
chip_ver[i] = i2c_smbus_read_byte_data(client, 0);
name[i] = (chip_ver[i] & 0x0f) + '0'; if (name[i] > '9')
name[i] += 'a' - '9' - 1;
}
name[i] = '\0';
/* Check if it is a Philips/NXP chip */ if (!memcmp(name + 1, "f711", 4)) {
chip_id = name[5];
snprintf(name, CHIP_VER_SIZE, "saa711%c", chip_id);
if (!autodetect && strcmp(name, id->name)) return -EINVAL;
/* Check if it is a gm7113c */ if (!memcmp(name, "0000", 4)) {
chip_id = 0; for (i = 0; i < 4; i++) {
chip_id = chip_id << 1;
chip_id |= (chip_ver[i] & 0x80) ? 1 : 0;
}
/* * Note: From the datasheet, only versions 1 and 2 * exists. However, tests on a device labeled as: * "GM7113C 1145" returned "10" on all 16 chip * version (reg 0x00) reads. So, we need to also * accept at least version 0. For now, let's just * assume that a device that returns "0000" for * the lower nibble is a gm7113c.
*/
strscpy(name, "gm7113c", CHIP_VER_SIZE);
if (!autodetect && strcmp(name, id->name)) return -EINVAL;
v4l_dbg(1, debug, client, "It seems to be a %s chip (%*ph) @ 0x%x.\n",
name, 16, chip_ver, client->addr << 1);
return GM7113C;
}
/* Check if it is a CJC7113 */ if (!memcmp(name, "1111111111111111", CHIP_VER_SIZE)) {
strscpy(name, "cjc7113", CHIP_VER_SIZE);
if (!autodetect && strcmp(name, id->name)) return -EINVAL;
v4l_dbg(1, debug, client, "It seems to be a %s chip (%*ph) @ 0x%x.\n",
name, 16, chip_ver, client->addr << 1);
/* CJC7113 seems to be SAA7113-compatible */ return SAA7113;
}
/* Chip was not discovered. Return its ID and don't bind */
v4l_dbg(1, debug, client, "chip %*ph @ 0x%x is unknown.\n",
16, chip_ver, client->addr << 1); return -ENODEV;
}
