emif_data->sram_pool_code = of_gen_pool_get(np, "sram", 0); if (!emif_data->sram_pool_code) {
dev_err(dev, "Unable to get sram pool for ocmcram code\n"); return -ENODEV;
}
emif_data->ti_emif_sram_virt =
gen_pool_alloc(emif_data->sram_pool_code,
ti_emif_sram_sz); if (!emif_data->ti_emif_sram_virt) {
dev_err(dev, "Unable to allocate code memory from ocmcram\n"); return -ENOMEM;
}
/* Save physical address to calculate resume offset during pm init */
emif_data->ti_emif_sram_phys =
gen_pool_virt_to_phys(emif_data->sram_pool_code,
emif_data->ti_emif_sram_virt);
/* Get sram pool for data section and allocate space */
emif_data->sram_pool_data = of_gen_pool_get(np, "sram", 1); if (!emif_data->sram_pool_data) {
dev_err(dev, "Unable to get sram pool for ocmcram data\n");
ret = -ENODEV; goto err_free_sram_code;
}
emif_data->ti_emif_sram_data_virt =
gen_pool_alloc(emif_data->sram_pool_data, sizeof(struct emif_regs_amx3)); if (!emif_data->ti_emif_sram_data_virt) {
dev_err(dev, "Unable to allocate data memory from ocmcram\n");
ret = -ENOMEM; goto err_free_sram_code;
}
/* Save physical address to calculate resume offset during pm init */
emif_data->ti_emif_sram_data_phys =
gen_pool_virt_to_phys(emif_data->sram_pool_data,
emif_data->ti_emif_sram_data_virt); /* * These functions are called during suspend path while MMU is * still on so add virtual base to offset for absolute address
*/
emif_data->pm_functions.save_context =
sram_suspend_address(emif_data,
(unsignedlong)ti_emif_save_context);
emif_data->pm_functions.enter_sr =
sram_suspend_address(emif_data,
(unsignedlong)ti_emif_enter_sr);
emif_data->pm_functions.abort_sr =
sram_suspend_address(emif_data,
(unsignedlong)ti_emif_abort_sr);
/* * These are called during resume path when MMU is not enabled * so physical address is used instead
*/
emif_data->pm_functions.restore_context =
sram_resume_address(emif_data,
(unsignedlong)ti_emif_restore_context);
emif_data->pm_functions.exit_sr =
sram_resume_address(emif_data,
(unsignedlong)ti_emif_exit_sr);
emif_data->pm_functions.run_hw_leveling =
sram_resume_address(emif_data,
(unsignedlong)ti_emif_run_hw_leveling);
copy_addr = sram_exec_copy(emif_data->sram_pool_code,
(void *)emif_data->ti_emif_sram_virt,
&ti_emif_sram, ti_emif_sram_sz); if (!copy_addr) {
dev_err(dev, "Cannot copy emif code to sram\n"); return -ENODEV;
}
data_addr = sram_suspend_address(emif_data,
(unsignedlong)&ti_emif_pm_sram_data);
copy_addr = sram_exec_copy(emif_data->sram_pool_code,
(void *)data_addr,
&emif_data->pm_data, sizeof(emif_data->pm_data)); if (!copy_addr) {
dev_err(dev, "Cannot copy emif data to code sram\n"); return -ENODEV;
}
return 0;
}
/* * Due to Usage Note 3.1.2 "DDR3: JEDEC Compliance for Maximum * Self-Refresh Command Limit" found in AM335x Silicon Errata * (Document SPRZ360F Revised November 2013) we must configure * the self refresh delay timer to 0xA (8192 cycles) to avoid * generating too many refresh command from the EMIF.
*/ staticvoid ti_emif_configure_sr_delay(struct ti_emif_data *emif_data)
{
writel(EMIF_POWER_MGMT_WAIT_SELF_REFRESH_8192_CYCLES,
(emif_data->pm_data.ti_emif_base_addr_virt +
EMIF_POWER_MANAGEMENT_CONTROL));
/** * ti_emif_copy_pm_function_table - copy mapping of pm funcs in sram * @sram_pool: pointer to struct gen_pool where dst resides * @dst: void * to address that table should be copied * * Returns 0 if success other error code if table is not available
*/ int ti_emif_copy_pm_function_table(struct gen_pool *sram_pool, void *dst)
{ void *copy_addr;
if (!emif_instance) return -ENODEV;
copy_addr = sram_exec_copy(sram_pool, dst,
&emif_instance->pm_functions, sizeof(emif_instance->pm_functions)); if (!copy_addr) return -ENODEV;
/** * ti_emif_get_mem_type - return type for memory type in use * * Returns memory type value read from EMIF or error code if fails
*/ int ti_emif_get_mem_type(void)
{ unsignedlong temp;
/* * Check to see if what we are copying is already present in the * first byte at the destination, only copy if it is not which * indicates we have lost context and sram no longer contains * the PM code
*/ if (tmp != ti_emif_sram)
ti_emif_push_sram(dev, emif_instance);
return 0;
}
staticint ti_emif_suspend(struct device *dev)
{ /* * The contents will be present in DDR hence no need to * explicitly save
*/ return 0;
} #endif/* CONFIG_PM_SLEEP */
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