/* * 4-wire SPI is a shift register, so for every byte you send, * you get one back at the same time. Example read from 0xC024, * which has value of 0x2D * * MOSI: * 7C 00 C0 #Set page register * A4 00 #MSB is set, so this is read command * MISO: * XX 2D #XX is a dummy byte from sending A4 and we * need to throw it away
*/
ret = spi_sync(client, &msg); if (ret >= 0)
memcpy(buf, &rsp[1], xfer.len-1);
/* * 1-byte (1B) offset addressing: * 16-bit register address: the lower 7 bits of the register address come * from the offset addr byte and the upper 9 bits come from the page register.
*/ staticint rsmu_write_page_register(struct rsmu_ddata *rsmu, u32 reg)
{
u8 page_reg;
u8 buf[4];
u16 bytes;
u32 page; int err;
switch (rsmu->type) { case RSMU_CM: /* Do not modify page register for none-scsr registers */ if (reg < RSMU_CM_SCSR_BASE) return 0;
page_reg = RSMU_CM_PAGE_ADDR;
page = reg & RSMU_PAGE_MASK;
buf[0] = (u8)(page & 0xFF);
buf[1] = (u8)((page >> 8) & 0xFF);
buf[2] = (u8)((page >> 16) & 0xFF);
buf[3] = (u8)((page >> 24) & 0xFF);
bytes = 4; break; case RSMU_SABRE: /* Do not modify page register if reg is page register itself */ if ((reg & RSMU_ADDR_MASK) == RSMU_ADDR_MASK) return 0;
page_reg = RSMU_SABRE_PAGE_ADDR;
page = reg & RSMU_PAGE_MASK; /* The three page bits are located in the single Page Register */
buf[0] = (u8)((page >> 7) & 0x7);
bytes = 1; break; default:
dev_err(rsmu->dev, "Unsupported RSMU device type: %d\n", rsmu->type); return -ENODEV;
}
/* Simply return if we are on the same page */ if (rsmu->page == page) return 0;
err = rsmu_write_device(rsmu, page_reg, buf, bytes); if (err)
dev_err(rsmu->dev, "Failed to set page offset 0x%x\n", page); else /* Remember the last page */
rsmu->page = page;
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