/* SPDX-License-Identifier: GPL-2.0-or-later */ /* * SN Platform GRU Driver * * GRU DRIVER TABLES, MACROS, externs, etc * * Copyright (c) 2008 Silicon Graphics, Inc. All Rights Reserved.
*/
#ifndef __GRUTABLES_H__ #define __GRUTABLES_H__
/* * GRU Chiplet: * The GRU is a user addressible memory accelerator. It provides * several forms of load, store, memset, bcopy instructions. In addition, it * contains special instructions for AMOs, sending messages to message * queues, etc. * * The GRU is an integral part of the node controller. It connects * directly to the cpu socket. In its current implementation, there are 2 * GRU chiplets in the node controller on each blade (~node). * * The entire GRU memory space is fully coherent and cacheable by the cpus. * * Each GRU chiplet has a physical memory map that looks like the following: * * +-----------------+ * |/////////////////| * |/////////////////| * |/////////////////| * |/////////////////| * |/////////////////| * |/////////////////| * |/////////////////| * |/////////////////| * +-----------------+ * | system control | * +-----------------+ _______ +-------------+ * |/////////////////| / | | * |/////////////////| / | | * |/////////////////| / | instructions| * |/////////////////| / | | * |/////////////////| / | | * |/////////////////| / |-------------| * |/////////////////| / | | * +-----------------+ | | * | context 15 | | data | * +-----------------+ | | * | ...... | \ | | * +-----------------+ \____________ +-------------+ * | context 1 | * +-----------------+ * | context 0 | * +-----------------+ * * Each of the "contexts" is a chunk of memory that can be mmaped into user * space. The context consists of 2 parts: * * - an instruction space that can be directly accessed by the user * to issue GRU instructions and to check instruction status. * * - a data area that acts as normal RAM. * * User instructions contain virtual addresses of data to be accessed by the * GRU. The GRU contains a TLB that is used to convert these user virtual * addresses to physical addresses. * * The "system control" area of the GRU chiplet is used by the kernel driver * to manage user contexts and to perform functions such as TLB dropin and * purging. * * One context may be reserved for the kernel and used for cross-partition * communication. The GRU will also be used to asynchronously zero out * large blocks of memory (not currently implemented). * * * Tables: * * VDATA-VMA Data - Holds a few parameters. Head of linked list of * GTS tables for threads using the GSEG * GTS - Gru Thread State - contains info for managing a GSEG context. A * GTS is allocated for each thread accessing a * GSEG. * GTD - GRU Thread Data - contains shadow copy of GRU data when GSEG is * not loaded into a GRU * GMS - GRU Memory Struct - Used to manage TLB shootdowns. Tracks GRUs * where a GSEG has been loaded. Similar to * an mm_struct but for GRU. * * GS - GRU State - Used to manage the state of a GRU chiplet * BS - Blade State - Used to manage state of all GRU chiplets * on a blade * * * Normal task tables for task using GRU. * - 2 threads in process * - 2 GSEGs open in process * - GSEG1 is being used by both threads * - GSEG2 is used only by thread 2 * * task -->| * task ---+---> mm ->------ (notifier) -------+-> gms * | | * |--> vma -> vdata ---> gts--->| GSEG1 (thread1) * | | | * | +-> gts--->| GSEG1 (thread2) * | | * |--> vma -> vdata ---> gts--->| GSEG2 (thread2) * . * . * * GSEGs are marked DONTCOPY on fork * * At open * file.private_data -> NULL * * At mmap, * vma -> vdata * * After gseg reference * vma -> vdata ->gts * * After fork * parent * vma -> vdata -> gts * child * (vma is not copied) *
*/
#define IRQ_GRU 110 /* Starting IRQ number for interrupts */
/* Delay in jiffies between attempts to assign a GRU context */ #define GRU_ASSIGN_DELAY ((HZ * 20) / 1000)
/* * If a process has it's context stolen, min delay in jiffies before trying to * steal a context from another process.
*/ #define GRU_STEAL_DELAY ((HZ * 200) / 1000)
#define STAT(id) do { \ if (gru_options & OPT_STATS) \
atomic_long_inc(&gru_stats.id); \
} while (0)
#ifdef CONFIG_SGI_GRU_DEBUG #define gru_dbg(dev, fmt, x...) \ do { \ if (gru_options & OPT_DPRINT) \
printk(KERN_DEBUG "GRU:%d %s: " fmt, smp_processor_id(), __func__, x);\
} while (0) #else #define gru_dbg(x...) #endif
/*----------------------------------------------------------------------------- * ASID management
*/ #define MAX_ASID 0xfffff0 #define MIN_ASID 8 #define ASID_INC 8 /* number of regions */
/* Generate a GRU asid value from a GRU base asid & a virtual address. */ #define VADDR_HI_BIT 64 #define GRUREGION(addr) ((addr) >> (VADDR_HI_BIT - 3) & 3) #define GRUASID(asid, addr) ((asid) + GRUREGION(addr))
/* * This structure is pointed to from the mmstruct via the notifier pointer. * There is one of these per address space.
*/ struct gru_mm_tracker { /* pack to reduce size */ unsignedint mt_asid_gen:24; /* ASID wrap count */ unsignedint mt_asid:24; /* current base ASID for gru */ unsignedshort mt_ctxbitmap:16;/* bitmap of contexts using
asid */
} __attribute__ ((packed));
/* * One of these structures is allocated when a GSEG is mmaped. The * structure is pointed to by the vma->vm_private_data field in the vma struct.
*/ struct gru_vma_data {
spinlock_t vd_lock; /* Serialize access to vma */ struct list_head vd_head; /* head of linked list of gts */ long vd_user_options;/* misc user option flags */ int vd_cbr_au_count; int vd_dsr_au_count; unsignedchar vd_tlb_preload_count;
};
/* * One of these is allocated for each thread accessing a mmaped GRU. A linked * list of these structure is hung off the struct gru_vma_data in the mm_struct.
*/ struct gru_thread_state { struct list_head ts_next; /* list - head at vma-private */ struct mutex ts_ctxlock; /* load/unload CTX lock */ struct mm_struct *ts_mm; /* mm currently mapped to
context */ struct vm_area_struct *ts_vma; /* vma of GRU context */ struct gru_state *ts_gru; /* GRU where the context is
loaded */ struct gru_mm_struct *ts_gms; /* asid & ioproc struct */ unsignedchar ts_tlb_preload_count; /* TLB preload pages */ unsignedlong ts_cbr_map; /* map of allocated CBRs */ unsignedlong ts_dsr_map; /* map of allocated DATA
resources */ unsignedlong ts_steal_jiffies;/* jiffies when context last
stolen */ long ts_user_options;/* misc user option flags */
pid_t ts_tgid_owner; /* task that is using the
context - for migration */ short ts_user_blade_id;/* user selected blade */ signedchar ts_user_chiplet_id;/* user selected chiplet */ unsignedshort ts_sizeavail; /* Pagesizes in use */ int ts_tsid; /* thread that owns the
structure */ int ts_tlb_int_select;/* target cpu if interrupts
enabled */ int ts_ctxnum; /* context number where the
context is loaded */
refcount_t ts_refcnt; /* reference count GTS */ unsignedchar ts_dsr_au_count;/* Number of DSR resources
required for contest */ unsignedchar ts_cbr_au_count;/* Number of CBR resources
required for contest */ signedchar ts_cch_req_slice;/* CCH packet slice */ signedchar ts_blade; /* If >= 0, migrate context if
ref from different blade */ signedchar ts_force_cch_reload; signedchar ts_cbr_idx[GRU_CBR_AU];/* CBR numbers of each
allocated CB */ int ts_data_valid; /* Indicates if ts_gdata has
valid data */ struct gru_gseg_statistics ustats; /* User statistics */ unsignedlong ts_gdata[]; /* save area for GRU data (CB,
DS, CBE) */
};
/* * Threaded programs actually allocate an array of GSEGs when a context is * created. Each thread uses a separate GSEG. TSID is the index into the GSEG * array.
*/ #define TSID(a, v) (((a) - (v)->vm_start) / GRU_GSEG_PAGESIZE) #define UGRUADDR(gts) ((gts)->ts_vma->vm_start + \
(gts)->ts_tsid * GRU_GSEG_PAGESIZE)
#define NULLCTX (-1) /* if context not loaded into GRU */
/*----------------------------------------------------------------------------- * GRU State Tables
*/
/* * One of these exists for each GRU chiplet.
*/ struct gru_state { struct gru_blade_state *gs_blade; /* GRU state for entire
blade */ unsignedlong gs_gru_base_paddr; /* Physical address of
gru segments (64) */ void *gs_gru_base_vaddr; /* Virtual address of
gru segments (64) */ unsignedshort gs_gid; /* unique GRU number */ unsignedshort gs_blade_id; /* blade of GRU */ unsignedchar gs_chiplet_id; /* blade chiplet of GRU */ unsignedchar gs_tgh_local_shift; /* used to pick TGH for
local flush */ unsignedchar gs_tgh_first_remote; /* starting TGH# for
remote flush */
spinlock_t gs_asid_lock; /* lock used for
assigning asids */
spinlock_t gs_lock; /* lock used for
assigning contexts */
/* -- the following are protected by the gs_asid_lock spinlock ---- */ unsignedint gs_asid; /* Next availe ASID */ unsignedint gs_asid_limit; /* Limit of available
ASIDs */ unsignedint gs_asid_gen; /* asid generation.
Inc on wrap */
/* --- the following fields are protected by the gs_lock spinlock --- */ unsignedlong gs_context_map; /* bitmap to manage
contexts in use */ unsignedlong gs_cbr_map; /* bitmap to manage CB
resources */ unsignedlong gs_dsr_map; /* bitmap used to manage
DATA resources */ unsignedint gs_reserved_cbrs; /* Number of kernel-
reserved cbrs */ unsignedint gs_reserved_dsr_bytes; /* Bytes of kernel-
reserved dsrs */ unsignedshort gs_active_contexts; /* number of contexts
in use */ struct gru_thread_state *gs_gts[GRU_NUM_CCH]; /* GTS currently using
the context */ int gs_irq[GRU_NUM_TFM]; /* Interrupt irqs */
};
/* * This structure contains the GRU state for all the GRUs on a blade.
*/ struct gru_blade_state { void *kernel_cb; /* First kernel
reserved cb */ void *kernel_dsr; /* First kernel
reserved DSR */ struct rw_semaphore bs_kgts_sema; /* lock for kgts */ struct gru_thread_state *bs_kgts; /* GTS for kernel use */
/* ---- the following are used for managing kernel async GRU CBRs --- */ int bs_async_dsr_bytes; /* DSRs for async */ int bs_async_cbrs; /* CBRs AU for async */ struct completion *bs_async_wq;
/* ---- the following are protected by the bs_lock spinlock ---- */
spinlock_t bs_lock; /* lock used for
stealing contexts */ int bs_lru_ctxnum; /* STEAL - last context
stolen */ struct gru_state *bs_lru_gru; /* STEAL - last gru
stolen */
/* Given a blade# & chiplet#, get a pointer to the GRU */ #define get_gru(b, c) (&gru_base[b]->bs_grus[c])
/* Number of bytes to save/restore when unloading/loading GRU contexts */ #define DSR_BYTES(dsr) ((dsr) * GRU_DSR_AU_BYTES) #define CBR_BYTES(cbr) ((cbr) * GRU_HANDLE_BYTES * GRU_CBR_AU_SIZE * 2)
/* Convert a user CB number to the actual CBRNUM */ #define thread_cbr_number(gts, n) ((gts)->ts_cbr_idx[(n) / GRU_CBR_AU_SIZE] \
* GRU_CBR_AU_SIZE + (n) % GRU_CBR_AU_SIZE)
/* Convert a gid to a pointer to the GRU */ #define GID_TO_GRU(gid) \
(gru_base[(gid) / GRU_CHIPLETS_PER_BLADE] ? \
(&gru_base[(gid) / GRU_CHIPLETS_PER_BLADE]-> \
bs_grus[(gid) % GRU_CHIPLETS_PER_BLADE]) : \
NULL)
/* Scan all active GRUs in a GRU bitmap */ #define for_each_gru_in_bitmap(gid, map) \
for_each_set_bit((gid), (map), GRU_MAX_GRUS)
/* Scan all active GRUs on a specific blade */ #define for_each_gru_on_blade(gru, nid, i) \ for ((gru) = gru_base[nid]->bs_grus, (i) = 0; \
(i) < GRU_CHIPLETS_PER_BLADE; \
(i)++, (gru)++)
/* Scan all GRUs */ #define foreach_gid(gid) \ for ((gid) = 0; (gid) < gru_max_gids; (gid)++)
/* Scan all active GTSs on a gru. Note: must hold ss_lock to use this macro. */ #define for_each_gts_on_gru(gts, gru, ctxnum) \ for ((ctxnum) = 0; (ctxnum) < GRU_NUM_CCH; (ctxnum)++) \ if (((gts) = (gru)->gs_gts[ctxnum]))
/* Scan each CBR whose bit is set in a TFM (or copy of) */ #define for_each_cbr_in_tfm(i, map) \
for_each_set_bit((i), (map), GRU_NUM_CBE)
/* Scan each CBR in a CBR bitmap. Note: multiple CBRs in an allocation unit */ #define for_each_cbr_in_allocation_map(i, map, k) \
for_each_set_bit((k), (map), GRU_CBR_AU) \ for ((i) = (k)*GRU_CBR_AU_SIZE; \
(i) < ((k) + 1) * GRU_CBR_AU_SIZE; (i)++)
/*----------------------------------------------------------------------------- * Lock / Unlock GRU handles * Use the "delresp" bit in the handle as a "lock" bit.
*/
/* Lock hierarchy checking enabled only in emulator */
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