features = hellcreek_read(hellcreek, HR_FEABITS0);
/* Only detect the size of the FDB table. The size and current * utilization can be queried via devlink.
*/
hellcreek->fdb_entries = ((features & HR_FEABITS0_FDBBINS_MASK) >>
HR_FEABITS0_FDBBINS_SHIFT) * 32;
}
dev_dbg(hellcreek->dev, "Disable port %d\n", port);
mutex_lock(&hellcreek->reg_lock);
hellcreek_select_port(hellcreek, port);
val = hellcreek_port->ptcfg;
val &= ~HR_PTCFG_ADMIN_EN;
hellcreek_write(hellcreek, val, HR_PTCFG);
hellcreek_port->ptcfg = val;
mutex_unlock(&hellcreek->reg_lock);
}
staticvoid hellcreek_get_strings(struct dsa_switch *ds, int port,
u32 stringset, uint8_t *data)
{ int i;
for (i = 0; i < ARRAY_SIZE(hellcreek_counter); ++i)
ethtool_puts(&data, hellcreek_counter[i].name);
}
staticint hellcreek_get_sset_count(struct dsa_switch *ds, int port, int sset)
{ if (sset != ETH_SS_STATS) return 0;
return ARRAY_SIZE(hellcreek_counter);
}
staticvoid hellcreek_get_ethtool_stats(struct dsa_switch *ds, int port,
uint64_t *data)
{ struct hellcreek *hellcreek = ds->priv; struct hellcreek_port *hellcreek_port; int i;
hellcreek_port = &hellcreek->ports[port];
for (i = 0; i < ARRAY_SIZE(hellcreek_counter); ++i) { conststruct hellcreek_counter *counter = &hellcreek_counter[i];
u8 offset = counter->offset + port * 64;
u16 high, low;
u64 value;
mutex_lock(&hellcreek->reg_lock);
hellcreek_select_counter(hellcreek, offset);
/* The registers are locked internally by selecting the * counter. So low and high can be read without reading high * again.
*/
high = hellcreek_read(hellcreek, HR_CRDH);
low = hellcreek_read(hellcreek, HR_CRDL);
value = ((u64)high << 16) | low;
staticint hellcreek_vlan_prepare(struct dsa_switch *ds, int port, conststruct switchdev_obj_port_vlan *vlan, struct netlink_ext_ack *extack)
{ struct hellcreek *hellcreek = ds->priv; int i;
dev_dbg(hellcreek->dev, "VLAN prepare for port %d\n", port);
/* Restriction: Make sure that nobody uses the "private" VLANs. These * VLANs are internally used by the driver to ensure port * separation. Thus, they cannot be used by someone else.
*/ for (i = 0; i < hellcreek->pdata->num_ports; ++i) { const u16 restricted_vid = hellcreek_private_vid(i);
if (!dsa_is_user_port(ds, i)) continue;
if (vlan->vid == restricted_vid) {
NL_SET_ERR_MSG_MOD(extack, "VID restricted by driver"); return -EBUSY;
}
}
return 0;
}
staticvoid hellcreek_select_vlan_params(struct hellcreek *hellcreek, int port, int *shift, int *mask)
{ switch (port) { case 0:
*shift = HR_VIDMBRCFG_P0MBR_SHIFT;
*mask = HR_VIDMBRCFG_P0MBR_MASK; break; case 1:
*shift = HR_VIDMBRCFG_P1MBR_SHIFT;
*mask = HR_VIDMBRCFG_P1MBR_MASK; break; case 2:
*shift = HR_VIDMBRCFG_P2MBR_SHIFT;
*mask = HR_VIDMBRCFG_P2MBR_MASK; break; case 3:
*shift = HR_VIDMBRCFG_P3MBR_SHIFT;
*mask = HR_VIDMBRCFG_P3MBR_MASK; break; default:
*shift = *mask = 0;
dev_err(hellcreek->dev, "Unknown port %d selected!\n", port);
}
}
staticvoid hellcreek_apply_vlan(struct hellcreek *hellcreek, int port, u16 vid, bool pvid, bool untagged)
{ int shift, mask;
u16 val;
/* Setup port vlan membership */
hellcreek_select_vlan_params(hellcreek, port, &shift, &mask);
val = hellcreek->vidmbrcfg[vid];
val &= ~mask; if (untagged)
val |= HELLCREEK_VLAN_UNTAGGED_MEMBER << shift; else
val |= HELLCREEK_VLAN_TAGGED_MEMBER << shift;
hellcreek_port = &hellcreek->ports[port];
val = hellcreek_port->ptcfg;
switch (state) { case BR_STATE_DISABLED:
new_state = "DISABLED";
val |= HR_PTCFG_BLOCKED;
val &= ~HR_PTCFG_LEARNING_EN; break; case BR_STATE_BLOCKING:
new_state = "BLOCKING";
val |= HR_PTCFG_BLOCKED;
val &= ~HR_PTCFG_LEARNING_EN; break; case BR_STATE_LISTENING:
new_state = "LISTENING";
val |= HR_PTCFG_BLOCKED;
val &= ~HR_PTCFG_LEARNING_EN; break; case BR_STATE_LEARNING:
new_state = "LEARNING";
val |= HR_PTCFG_BLOCKED;
val |= HR_PTCFG_LEARNING_EN; break; case BR_STATE_FORWARDING:
new_state = "FORWARDING";
val &= ~HR_PTCFG_BLOCKED;
val |= HR_PTCFG_LEARNING_EN; break; default:
new_state = "UNKNOWN";
}
if (enable)
swcfg |= HR_SWCFG_VLAN_UNAWARE; else
swcfg &= ~HR_SWCFG_VLAN_UNAWARE;
hellcreek_write(hellcreek, swcfg, HR_SWCFG);
mutex_unlock(&hellcreek->reg_lock);
}
/* Default setup for DSA: VLAN <X>: CPU and Port <X> egress untagged. */ staticvoid hellcreek_setup_vlan_membership(struct dsa_switch *ds, int port, bool enabled)
{ const u16 vid = hellcreek_private_vid(port); int upstream = dsa_upstream_port(ds, port); struct hellcreek *hellcreek = ds->priv;
/* Apply vid to port as egress untagged and port vlan id */ if (enabled)
hellcreek_apply_vlan(hellcreek, port, vid, true, true); else
hellcreek_unapply_vlan(hellcreek, port, vid);
/* Apply vid to cpu port as well */ if (enabled)
hellcreek_apply_vlan(hellcreek, upstream, vid, false, true); else
hellcreek_unapply_vlan(hellcreek, upstream, vid);
}
dev_dbg(hellcreek->dev, "%s unicast flooding on port %d\n",
enable ? "Enable" : "Disable", port);
mutex_lock(&hellcreek->reg_lock);
hellcreek_select_port(hellcreek, port);
val = hellcreek_port->ptcfg; if (enable)
val &= ~HR_PTCFG_UUC_FLT; else
val |= HR_PTCFG_UUC_FLT;
hellcreek_write(hellcreek, val, HR_PTCFG);
hellcreek_port->ptcfg = val;
dev_dbg(hellcreek->dev, "%s multicast flooding on port %d\n",
enable ? "Enable" : "Disable", port);
mutex_lock(&hellcreek->reg_lock);
hellcreek_select_port(hellcreek, port);
val = hellcreek_port->ptcfg; if (enable)
val &= ~HR_PTCFG_UMC_FLT; else
val |= HR_PTCFG_UMC_FLT;
hellcreek_write(hellcreek, val, HR_PTCFG);
hellcreek_port->ptcfg = val;
/* Meta data */
meta |= entry->portmask << HR_FDBWRM0_PORTMASK_SHIFT; if (entry->is_obt)
meta |= HR_FDBWRM0_OBT; if (entry->pass_blocked)
meta |= HR_FDBWRM0_PASS_BLOCKED; if (entry->reprio_en) {
meta |= HR_FDBWRM0_REPRIO_EN;
meta |= entry->reprio_tc << HR_FDBWRM0_REPRIO_TC_SHIFT;
}
hellcreek_write(hellcreek, meta, HR_FDBWRM0);
/* Retrieve the index of a FDB entry by mac address. Currently we search through * the complete table in hardware. If that's too slow, we might have to cache * the complete FDB table in software.
*/ staticint hellcreek_fdb_get(struct hellcreek *hellcreek, constunsignedchar *dest, struct hellcreek_fdb_entry *entry)
{
size_t i;
/* Set read pointer to zero: The read of HR_FDBMAX (read-only register) * should reset the internal pointer. But, that doesn't work. The vendor * suggested a subsequent write as workaround. Same for HR_FDBRDH below.
*/
hellcreek_read(hellcreek, HR_FDBMAX);
hellcreek_write(hellcreek, 0x00, HR_FDBMAX);
/* We have to read the complete table, because the switch/driver might * enter new entries anywhere.
*/ for (i = 0; i < hellcreek->fdb_entries; ++i) { struct hellcreek_fdb_entry tmp = { 0 };
dev_dbg(hellcreek->dev, "Delete FDB entry for MAC=%pM\n", addr);
mutex_lock(&hellcreek->reg_lock);
ret = hellcreek_fdb_get(hellcreek, addr, &entry); if (ret) { /* Not found */
dev_err(hellcreek->dev, "FDB entry for deletion not found!\n");
} else { /* Found */
ret = __hellcreek_fdb_del(hellcreek, &entry); if (ret) {
dev_err(hellcreek->dev, "Failed to delete FDB entry!\n"); goto out;
}
entry.portmask &= ~BIT(port);
if (entry.portmask != 0x00) {
ret = __hellcreek_fdb_add(hellcreek, &entry); if (ret) {
dev_err(hellcreek->dev, "Failed to add FDB entry!\n"); goto out;
}
}
}
out:
mutex_unlock(&hellcreek->reg_lock);
return ret;
}
staticint hellcreek_fdb_dump(struct dsa_switch *ds, int port,
dsa_fdb_dump_cb_t *cb, void *data)
{ struct hellcreek *hellcreek = ds->priv;
u16 entries; int ret = 0;
size_t i;
mutex_lock(&hellcreek->reg_lock);
/* Set read pointer to zero: The read of HR_FDBMAX (read-only register) * should reset the internal pointer. But, that doesn't work. The vendor * suggested a subsequent write as workaround. Same for HR_FDBRDH below.
*/
entries = hellcreek_read(hellcreek, HR_FDBMAX);
hellcreek_write(hellcreek, 0x00, HR_FDBMAX);
dev_dbg(hellcreek->dev, "FDB dump for port %d, entries=%d!\n", port, entries);
/* Read table */ for (i = 0; i < hellcreek->fdb_entries; ++i) { struct hellcreek_fdb_entry entry = { 0 };
dev_dbg(hellcreek->dev, "%s VLAN filtering on port %d\n",
vlan_filtering ? "Enable" : "Disable", port);
/* Configure port to drop packages with not known vids */
hellcreek_setup_ingressflt(hellcreek, port, vlan_filtering);
/* Enable VLAN awareness on the switch. This save due to * ds->vlan_filtering_is_global.
*/
hellcreek_setup_vlan_awareness(hellcreek, vlan_filtering);
return 0;
}
staticint hellcreek_enable_ip_core(struct hellcreek *hellcreek)
{ int ret;
u16 val;
mutex_lock(&hellcreek->reg_lock);
val = hellcreek_read(hellcreek, HR_CTRL_C);
val |= HR_CTRL_C_ENABLE;
hellcreek_write(hellcreek, val, HR_CTRL_C);
ret = hellcreek_wait_until_transitioned(hellcreek);
staticvoid hellcreek_setup_tc_identity_mapping(struct hellcreek *hellcreek)
{ int i;
/* The switch has multiple egress queues per port. The queue is selected * via the PCP field in the VLAN header. The switch internally deals * with traffic classes instead of PCP values and this mapping is * configurable. * * The default mapping is (PCP - TC): * 7 - 7 * 6 - 6 * 5 - 5 * 4 - 4 * 3 - 3 * 2 - 1 * 1 - 0 * 0 - 2 * * The default should be an identity mapping.
*/
for (i = 0; i < 8; ++i) {
mutex_lock(&hellcreek->reg_lock);
hellcreek_select_prio(hellcreek, i);
hellcreek_write(hellcreek,
i << HR_PRTCCFG_PCP_TC_MAP_SHIFT,
HR_PRTCCFG);
mutex_lock(&hellcreek->reg_lock);
ret = __hellcreek_fdb_add(hellcreek, &l2_ptp); if (ret) goto out;
ret = __hellcreek_fdb_add(hellcreek, &udp4_ptp); if (ret) goto out;
ret = __hellcreek_fdb_add(hellcreek, &udp6_ptp); if (ret) goto out;
ret = __hellcreek_fdb_add(hellcreek, &l2_p2p); if (ret) goto out;
ret = __hellcreek_fdb_add(hellcreek, &udp4_p2p); if (ret) goto out;
ret = __hellcreek_fdb_add(hellcreek, &udp6_p2p); if (ret) goto out;
ret = __hellcreek_fdb_add(hellcreek, &stp);
out:
mutex_unlock(&hellcreek->reg_lock);
/* Reading this register has side effects. Synchronize against the other * FDB operations.
*/
mutex_lock(&hellcreek->reg_lock);
count = hellcreek_read(hellcreek, HR_FDBMAX);
mutex_unlock(&hellcreek->reg_lock);
/* Switch config: Keep defaults, enable FDB aging and learning and tag * each frame from/to cpu port for DSA tagging. Also enable the length * aware shaping mode. This eliminates the need for Qbv guard bands.
*/
swcfg |= HR_SWCFG_FDBAGE_EN |
HR_SWCFG_FDBLRN_EN |
HR_SWCFG_ALWAYS_OBT |
(HR_SWCFG_LAS_ON << HR_SWCFG_LAS_MODE_SHIFT);
hellcreek->swcfg = swcfg;
hellcreek_write(hellcreek, swcfg, HR_SWCFG);
/* Initial vlan membership to reflect port separation */ for (i = 0; i < ds->num_ports; ++i) { if (!dsa_is_user_port(ds, i)) continue;
/* The VLAN awareness is a global switch setting. Therefore, mixed vlan * filtering setups are not supported.
*/
ds->vlan_filtering_is_global = true;
ds->needs_standalone_vlan_filtering = true;
/* Intercept _all_ PTP multicast traffic */
ret = hellcreek_setup_fdb(hellcreek); if (ret) {
dev_err(hellcreek->dev, "Failed to insert static PTP FDB entries\n"); return ret;
}
/* Register devlink resources with DSA */
ret = hellcreek_setup_devlink_resources(ds); if (ret) {
dev_err(hellcreek->dev, "Failed to setup devlink resources!\n"); return ret;
}
ret = hellcreek_setup_devlink_regions(ds); if (ret) {
dev_err(hellcreek->dev, "Failed to setup devlink regions!\n"); goto err_regions;
}
/* Include GMII - the hardware does not support this interface * mode, but it's the default interface mode for phylib, so we * need it for compatibility with existing DT.
*/
__set_bit(PHY_INTERFACE_MODE_GMII, config->supported_interfaces);
/* The MAC settings are a hardware configuration option and cannot be * changed at run time or by strapping. Therefore the attached PHYs * should be programmed to only advertise settings which are supported * by the hardware.
*/ if (hellcreek->pdata->is_100_mbits)
config->mac_capabilities = MAC_100FD; else
config->mac_capabilities = MAC_1000FD;
}
staticint
hellcreek_port_prechangeupper(struct dsa_switch *ds, int port, struct netdev_notifier_changeupper_info *info)
{ struct hellcreek *hellcreek = ds->priv; bool used = true; int ret = -EBUSY;
u16 vid; int i;
dev_dbg(hellcreek->dev, "Pre change upper for port %d\n", port);
/* * Deny VLAN devices on top of lan ports with the same VLAN ids, because * it breaks the port separation due to the private VLANs. Example: * * lan0.100 *and* lan1.100 cannot be used in parallel. However, lan0.99 * and lan1.100 works.
*/
if (!is_vlan_dev(info->upper_dev)) return 0;
vid = vlan_dev_vlan_id(info->upper_dev);
/* For all ports, check bitmaps */
mutex_lock(&hellcreek->vlan_lock); for (i = 0; i < hellcreek->pdata->num_ports; ++i) { if (!dsa_is_user_port(ds, i)) continue;
if (port == i) continue;
used = used && test_bit(vid, hellcreek->ports[i].vlan_dev_bitmap);
}
/* Start schedule at this point of time */
hellcreek_write(hellcreek, ts.tv_nsec & 0x0000ffff, TR_ESTWRL);
hellcreek_write(hellcreek, (ts.tv_nsec & 0xffff0000) >> 16, TR_ESTWRH);
/* Arm timer, set seconds and switch schedule */
hellcreek_write(hellcreek, TR_ESTCMD_ESTARM | TR_ESTCMD_ESTSWCFG |
((ts.tv_sec & TR_ESTCMD_ESTSEC_MASK) <<
TR_ESTCMD_ESTSEC_SHIFT), TR_ESTCMD);
}
/* The switch allows a schedule to be started only eight seconds within * the future. Therefore, check the current PTP time if the schedule is * startable or not.
*/
/* Use the "cached" time. That should be alright, as it's updated quite * frequently in the PTP code.
*/
mutex_lock(&hellcreek->ptp_lock);
current_ns = hellcreek->seconds * NSEC_PER_SEC + hellcreek->last_ts;
mutex_unlock(&hellcreek->ptp_lock);
/* Calculate difference to admin base time */
base_time_ns = ktime_to_ns(hellcreek_port->current_schedule->base_time);
/* First select port */
hellcreek_select_tgd(hellcreek, port);
/* Forward base time into the future if needed */
mutex_lock(&hellcreek->ptp_lock);
current_ns = hellcreek->seconds * NSEC_PER_SEC + hellcreek->last_ts;
mutex_unlock(&hellcreek->ptp_lock);
/* Does this hellcreek version support Qbv in hardware? */ if (!hellcreek->pdata->qbv_support) returnfalse;
/* cycle time can only be 32bit */ if (schedule->cycle_time > (u32)-1) returnfalse;
/* cycle time extension is not supported */ if (schedule->cycle_time_extension) returnfalse;
/* Only set command is supported */ for (i = 0; i < schedule->num_entries; ++i) if (schedule->entries[i].command != TC_TAPRIO_CMD_SET_GATES) returnfalse;
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