/* On SYSTEMPORT Lite, any register after RDMA_STATUS has the exact * same layout, except it has been moved by 4 bytes up, *sigh*
*/ staticinline u32 rdma_readl(struct bcm_sysport_priv *priv, u32 off)
{ if (priv->is_lite && off >= RDMA_STATUS)
off += 4; return readl_relaxed(priv->base + SYS_PORT_RDMA_OFFSET + off);
}
staticinlinevoid rdma_writel(struct bcm_sysport_priv *priv, u32 val, u32 off)
{ if (priv->is_lite && off >= RDMA_STATUS)
off += 4;
writel_relaxed(val, priv->base + SYS_PORT_RDMA_OFFSET + off);
}
/* L2-interrupt masking/unmasking helpers, does automatic saving of the applied * mask in a software copy to avoid CPU_MASK_STATUS reads in hot-paths.
*/ #define BCM_SYSPORT_INTR_L2(which) \ staticinlinevoid intrl2_##which##_mask_clear(struct bcm_sysport_priv *priv, \
u32 mask) \
{ \
priv->irq##which##_mask &= ~(mask); \
intrl2_##which##_writel(priv, mask, INTRL2_CPU_MASK_CLEAR); \
} \ staticinlinevoid intrl2_##which##_mask_set(struct bcm_sysport_priv *priv, \
u32 mask) \
{ \
intrl2_## which##_writel(priv, mask, INTRL2_CPU_MASK_SET); \
priv->irq##which##_mask |= (mask); \
} \
BCM_SYSPORT_INTR_L2(0)
BCM_SYSPORT_INTR_L2(1)
/* Register accesses to GISB/RBUS registers are expensive (few hundred * nanoseconds), so keep the check for 64-bits explicit here to save * one register write per-packet on 32-bits platforms.
*/ staticinlinevoid dma_desc_set_addr(struct bcm_sysport_priv *priv, void __iomem *d,
dma_addr_t addr)
{ #ifdef CONFIG_PHYS_ADDR_T_64BIT
writel_relaxed(upper_32_bits(addr) & DESC_ADDR_HI_MASK,
d + DESC_ADDR_HI_STATUS_LEN); #endif
writel_relaxed(lower_32_bits(addr), d + DESC_ADDR_LO);
}
priv->rx_chk_en = !!(wanted & NETIF_F_RXCSUM);
reg = rxchk_readl(priv, RXCHK_CONTROL); /* Clear L2 header checks, which would prevent BPDUs * from being received.
*/
reg &= ~RXCHK_L2_HDR_DIS; if (priv->rx_chk_en)
reg |= RXCHK_EN; else
reg &= ~RXCHK_EN;
/* If UniMAC forwards CRC, we need to skip over it to get * a valid CHK bit to be set in the per-packet status word
*/ if (priv->rx_chk_en && priv->crc_fwd)
reg |= RXCHK_SKIP_FCS; else
reg &= ~RXCHK_SKIP_FCS;
/* If Broadcom tags are enabled (e.g: using a switch), make * sure we tell the RXCHK hardware to expect a 4-bytes Broadcom * tag after the Ethernet MAC Source Address.
*/ if (netdev_uses_dsa(dev))
reg |= RXCHK_BRCM_TAG_EN; else
reg &= ~RXCHK_BRCM_TAG_EN;
/* Hardware transmit checksum requires us to enable the Transmit status * block prepended to the packet contents
*/
priv->tsb_en = !!(wanted & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
NETIF_F_HW_VLAN_CTAG_TX));
reg = tdma_readl(priv, TDMA_CONTROL); if (priv->tsb_en)
reg |= tdma_control_bit(priv, TSB_EN); else
reg &= ~tdma_control_bit(priv, TSB_EN); /* Indicating that software inserts Broadcom tags is needed for the TX * checksum to be computed correctly when using VLAN HW acceleration, * else it has no effect, so it can always be turned on.
*/ if (netdev_uses_dsa(dev))
reg |= tdma_control_bit(priv, SW_BRCM_TAG); else
reg &= ~tdma_control_bit(priv, SW_BRCM_TAG);
tdma_writel(priv, reg, TDMA_CONTROL);
/* Default TPID is ETH_P_8021AD, change to ETH_P_8021Q */ if (wanted & NETIF_F_HW_VLAN_CTAG_TX)
tdma_writel(priv, ETH_P_8021Q, TDMA_TPID);
}
staticinlinebool bcm_sysport_lite_stat_valid(enum bcm_sysport_stat_type type)
{ switch (type) { case BCM_SYSPORT_STAT_NETDEV: case BCM_SYSPORT_STAT_NETDEV64: case BCM_SYSPORT_STAT_RXCHK: case BCM_SYSPORT_STAT_RBUF: case BCM_SYSPORT_STAT_RDMA: case BCM_SYSPORT_STAT_SOFT: returntrue; default: returnfalse;
}
}
staticint bcm_sysport_get_sset_count(struct net_device *dev, int string_set)
{ struct bcm_sysport_priv *priv = netdev_priv(dev); conststruct bcm_sysport_stats *s; unsignedint i, j;
switch (string_set) { case ETH_SS_STATS: for (i = 0, j = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
s = &bcm_sysport_gstrings_stats[i]; if (priv->is_lite &&
!bcm_sysport_lite_stat_valid(s->type)) continue;
j++;
} /* Include per-queue statistics */ return j + dev->num_tx_queues * NUM_SYSPORT_TXQ_STAT; default: return -EOPNOTSUPP;
}
}
switch (stringset) { case ETH_SS_STATS: for (i = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
s = &bcm_sysport_gstrings_stats[i]; if (priv->is_lite &&
!bcm_sysport_lite_stat_valid(s->type)) continue;
ethtool_puts(&data, s->stat_string);
}
for (i = 0; i < dev->num_tx_queues; i++) {
ethtool_sprintf(&data, "txq%d_packets", i);
ethtool_sprintf(&data, "txq%d_bytes", i);
} break; default: break;
}
}
staticvoid bcm_sysport_update_mib_counters(struct bcm_sysport_priv *priv)
{ int i, j = 0;
for (i = 0; i < BCM_SYSPORT_STATS_LEN; i++) { conststruct bcm_sysport_stats *s;
u8 offset = 0;
u32 val = 0; char *p;
s = &bcm_sysport_gstrings_stats[i]; switch (s->type) { case BCM_SYSPORT_STAT_NETDEV: case BCM_SYSPORT_STAT_NETDEV64: case BCM_SYSPORT_STAT_SOFT: continue; case BCM_SYSPORT_STAT_MIB_RX: case BCM_SYSPORT_STAT_MIB_TX: case BCM_SYSPORT_STAT_RUNT: if (priv->is_lite) continue;
if (s->type != BCM_SYSPORT_STAT_MIB_RX)
offset = UMAC_MIB_STAT_OFFSET;
val = umac_readl(priv, UMAC_MIB_START + j + offset); break; case BCM_SYSPORT_STAT_RXCHK:
val = rxchk_readl(priv, s->reg_offset); if (val == ~0)
rxchk_writel(priv, 0, s->reg_offset); break; case BCM_SYSPORT_STAT_RBUF:
val = rbuf_readl(priv, s->reg_offset); if (val == ~0)
rbuf_writel(priv, 0, s->reg_offset); break; case BCM_SYSPORT_STAT_RDMA: if (!priv->is_lite) continue;
val = rdma_readl(priv, s->reg_offset); if (val == ~0)
rdma_writel(priv, 0, s->reg_offset); break;
}
for (i = 0, j = 0; i < BCM_SYSPORT_STATS_LEN; i++) { conststruct bcm_sysport_stats *s; char *p;
s = &bcm_sysport_gstrings_stats[i]; if (s->type == BCM_SYSPORT_STAT_NETDEV)
p = (char *)&dev->stats; elseif (s->type == BCM_SYSPORT_STAT_NETDEV64)
p = (char *)stats64; else
p = (char *)priv;
if (priv->is_lite && !bcm_sysport_lite_stat_valid(s->type)) continue;
p += s->stat_offset;
if (s->stat_sizeof == sizeof(u64) &&
s->type == BCM_SYSPORT_STAT_NETDEV64) { do {
start = u64_stats_fetch_begin(syncp);
data[i] = *(u64 *)p;
} while (u64_stats_fetch_retry(syncp, start));
} else
data[i] = *(u32 *)p;
j++;
}
/* For SYSTEMPORT Lite since we have holes in our statistics, j would * be equal to BCM_SYSPORT_STATS_LEN at the end of the loop, but it * needs to point to how many total statistics we have minus the * number of per TX queue statistics
*/
j = bcm_sysport_get_sset_count(dev, ETH_SS_STATS) -
dev->num_tx_queues * NUM_SYSPORT_TXQ_STAT;
for (i = 0; i < dev->num_tx_queues; i++) {
ring = &priv->tx_rings[i];
data[j] = ring->packets;
j++;
data[j] = ring->bytes;
j++;
}
}
/* Base system clock is 125Mhz, DMA timeout is this reference clock * divided by 1024, which yield roughly 8.192 us, our maximum value has * to fit in the RING_TIMEOUT_MASK (16 bits).
*/ if (ec->tx_max_coalesced_frames > RING_INTR_THRESH_MASK ||
ec->tx_coalesce_usecs > (RING_TIMEOUT_MASK * 8) + 1 ||
ec->rx_max_coalesced_frames > RDMA_INTR_THRESH_MASK ||
ec->rx_coalesce_usecs > (RDMA_TIMEOUT_MASK * 8) + 1) return -EINVAL;
/* Allocate a new SKB for a new packet */
skb = __netdev_alloc_skb(priv->netdev, RX_BUF_LENGTH,
GFP_ATOMIC | __GFP_NOWARN); if (!skb) {
priv->mib.alloc_rx_buff_failed++;
netif_err(priv, rx_err, ndev, "SKB alloc failed\n"); return NULL;
}
/* Grab the current SKB on the ring */
rx_skb = cb->skb; if (likely(rx_skb))
dma_unmap_single(kdev, dma_unmap_addr(cb, dma_addr),
RX_BUF_LENGTH, DMA_FROM_DEVICE);
/* Put the new SKB on the ring */
cb->skb = skb;
dma_unmap_addr_set(cb, dma_addr, mapping);
dma_desc_set_addr(priv, cb->bd_addr, mapping);
netif_dbg(priv, rx_status, ndev, "RX refill\n");
/* Return the current SKB to the caller */ return rx_skb;
}
for (i = 0; i < priv->num_rx_bds; i++) {
cb = &priv->rx_cbs[i];
skb = bcm_sysport_rx_refill(priv, cb);
dev_kfree_skb(skb); if (!cb->skb) return -ENOMEM;
}
return 0;
}
/* Poll the hardware for up to budget packets to process */ staticunsignedint bcm_sysport_desc_rx(struct bcm_sysport_priv *priv, unsignedint budget)
{ struct bcm_sysport_stats64 *stats64 = &priv->stats64; struct net_device *ndev = priv->netdev; unsignedint processed = 0, to_process; unsignedint processed_bytes = 0; struct bcm_sysport_cb *cb; struct sk_buff *skb; unsignedint p_index;
u16 len, status; struct bcm_rsb *rsb;
/* Clear status before servicing to reduce spurious interrupts */
intrl2_0_writel(priv, INTRL2_0_RDMA_MBDONE, INTRL2_CPU_CLEAR);
/* Determine how much we should process since last call, SYSTEMPORT Lite * groups the producer and consumer indexes into the same 32-bit * which we access using RDMA_CONS_INDEX
*/ if (!priv->is_lite)
p_index = rdma_readl(priv, RDMA_PROD_INDEX); else
p_index = rdma_readl(priv, RDMA_CONS_INDEX);
p_index &= RDMA_PROD_INDEX_MASK;
/* We do not have a backing SKB, so we do not a corresponding * DMA mapping for this incoming packet since * bcm_sysport_rx_refill always either has both skb and mapping * or none.
*/ if (unlikely(!skb)) {
netif_err(priv, rx_err, ndev, "out of memory!\n");
ndev->stats.rx_dropped++;
ndev->stats.rx_errors++; goto next;
}
/* Extract the Receive Status Block prepended */
rsb = (struct bcm_rsb *)skb->data;
len = (rsb->rx_status_len >> DESC_LEN_SHIFT) & DESC_LEN_MASK;
status = (rsb->rx_status_len >> DESC_STATUS_SHIFT) &
DESC_STATUS_MASK;
/* Hardware pre-pends packets with 2bytes before Ethernet * header plus we have the Receive Status Block, strip off all * of this from the SKB.
*/
skb_pull(skb, sizeof(*rsb) + 2);
len -= (sizeof(*rsb) + 2);
processed_bytes += len;
/* UniMAC may forward CRC */ if (priv->crc_fwd) {
skb_trim(skb, len - ETH_FCS_LEN);
len -= ETH_FCS_LEN;
}
/* Clear status before servicing to reduce spurious interrupts */ if (!ring->priv->is_lite)
intrl2_1_writel(ring->priv, BIT(ring->index), INTRL2_CPU_CLEAR); else
intrl2_0_writel(ring->priv, BIT(ring->index +
INTRL2_0_TDMA_MBDONE_SHIFT), INTRL2_CPU_CLEAR);
/* Compute how many descriptors have been processed since last call */
hw_ind = tdma_readl(priv, TDMA_DESC_RING_PROD_CONS_INDEX(ring->index));
c_index = (hw_ind >> RING_CONS_INDEX_SHIFT) & RING_CONS_INDEX_MASK;
txbds_ready = (c_index - ring->c_index) & RING_CONS_INDEX_MASK;
spin_lock_irqsave(&ring->lock, flags);
released = __bcm_sysport_tx_reclaim(priv, ring); if (released)
netif_tx_wake_queue(txq);
spin_unlock_irqrestore(&ring->lock, flags);
return released;
}
/* Locked version of the per-ring TX reclaim, but does not wake the queue */ staticvoid bcm_sysport_tx_clean(struct bcm_sysport_priv *priv, struct bcm_sysport_tx_ring *ring)
{ unsignedlong flags;
/* SYSTEMPORT Lite groups the producer/consumer index, producer is * maintained by HW, but writes to it will be ignore while RDMA * is active
*/ if (!priv->is_lite)
rdma_writel(priv, priv->rx_c_index, RDMA_CONS_INDEX); else
rdma_writel(priv, priv->rx_c_index << 16, RDMA_CONS_INDEX);
/* Disable RXCHK, active filters and Broadcom tag matching */
reg = rxchk_readl(priv, RXCHK_CONTROL);
reg &= ~(RXCHK_BRCM_TAG_MATCH_MASK <<
RXCHK_BRCM_TAG_MATCH_SHIFT | RXCHK_EN | RXCHK_BRCM_TAG_EN);
rxchk_writel(priv, reg, RXCHK_CONTROL);
/* Make sure we restore correct CID index in case HW lost * its context during deep idle state
*/
for_each_set_bit(index, priv->filters, RXCHK_BRCM_TAG_MAX) {
rxchk_writel(priv, priv->filters_loc[index] <<
RXCHK_BRCM_TAG_CID_SHIFT, RXCHK_BRCM_TAG(index));
rxchk_writel(priv, 0xff00ffff, RXCHK_BRCM_TAG_MASK(index));
}
/* Clear the MagicPacket detection logic */
mpd_enable_set(priv, false);
if (priv->irq0_stat & INTRL2_0_RDMA_MBDONE) {
priv->dim.event_ctr++; if (likely(napi_schedule_prep(&priv->napi))) { /* disable RX interrupts */
intrl2_0_mask_set(priv, INTRL2_0_RDMA_MBDONE);
__napi_schedule_irqoff(&priv->napi);
}
}
/* TX ring is full, perform a full reclaim since we do not know * which one would trigger this interrupt
*/ if (priv->irq0_stat & INTRL2_0_TX_RING_FULL)
bcm_sysport_tx_reclaim_all(priv);
if (!priv->is_lite) goto out;
for (ring = 0; ring < dev->num_tx_queues; ring++) {
ring_bit = BIT(ring + INTRL2_0_TDMA_MBDONE_SHIFT); if (!(priv->irq0_stat & ring_bit)) continue;
queue = skb_get_queue_mapping(skb);
txq = netdev_get_tx_queue(dev, queue);
ring = &priv->tx_rings[queue];
/* lock against tx reclaim in BH context and TX ring full interrupt */
spin_lock_irqsave(&ring->lock, flags); if (unlikely(ring->desc_count == 0)) {
netif_tx_stop_queue(txq);
netdev_err(dev, "queue %d awake and ring full!\n", queue);
ret = NETDEV_TX_BUSY; goto out;
}
/* Insert TSB and checksum infos */ if (priv->tsb_en) {
skb = bcm_sysport_insert_tsb(skb, dev); if (!skb) {
ret = NETDEV_TX_OK; goto out;
}
}
skb_len = skb->len;
mapping = dma_map_single(kdev, skb->data, skb_len, DMA_TO_DEVICE); if (dma_mapping_error(kdev, mapping)) {
priv->mib.tx_dma_failed++;
netif_err(priv, tx_err, dev, "DMA map failed at %p (len=%d)\n",
skb->data, skb_len);
ret = NETDEV_TX_OK;
dev_kfree_skb_any(skb); goto out;
}
/* Remember the SKB for future freeing */
cb = &ring->cbs[ring->curr_desc];
cb->skb = skb;
dma_unmap_addr_set(cb, dma_addr, mapping);
dma_unmap_len_set(cb, dma_len, skb_len);
/* Do not use tdma_control_bit() here because TSB_SWAP1 collides * with the original definition of ACB_ALGO
*/
reg = tdma_readl(priv, TDMA_CONTROL); if (priv->is_lite)
reg &= ~BIT(TSB_SWAP1); /* Set a correct TSB format based on host endian */ if (!IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
reg |= tdma_control_bit(priv, TSB_SWAP0); else
reg &= ~tdma_control_bit(priv, TSB_SWAP0);
tdma_writel(priv, reg, TDMA_CONTROL);
/* Program the number of descriptors as MAX_THRESHOLD and half of * its size for the hysteresis trigger
*/
tdma_writel(priv, ring->size |
1 << RING_HYST_THRESH_SHIFT,
TDMA_DESC_RING_MAX_HYST(index));
/* Enable the ring queue in the arbiter */
reg = tdma_readl(priv, TDMA_TIER1_ARB_0_QUEUE_EN);
reg |= (1 << index);
tdma_writel(priv, reg, TDMA_TIER1_ARB_0_QUEUE_EN);
/* Caller should stop the TDMA engine */
reg = tdma_readl(priv, TDMA_STATUS); if (!(reg & TDMA_DISABLED))
netdev_warn(priv->netdev, "TDMA not stopped!\n");
/* ring->cbs is the last part in bcm_sysport_init_tx_ring which could * fail, so by checking this pointer we know whether the TX ring was * fully initialized or not.
*/ if (!ring->cbs) return;
/* Caller should ensure RDMA is disabled */
reg = rdma_readl(priv, RDMA_STATUS); if (!(reg & RDMA_DISABLED))
netdev_warn(priv->netdev, "RDMA not stopped!\n");
for (i = 0; i < priv->num_rx_bds; i++) {
cb = &priv->rx_cbs[i]; if (dma_unmap_addr(cb, dma_addr))
dma_unmap_single(&priv->pdev->dev,
dma_unmap_addr(cb, dma_addr),
RX_BUF_LENGTH, DMA_FROM_DEVICE);
bcm_sysport_free_cb(cb);
}
kfree(priv->rx_cbs);
priv->rx_cbs = NULL;
netif_dbg(priv, hw, priv->netdev, "RDMA fini done\n");
}
reg = rbuf_readl(priv, RBUF_CONTROL);
reg |= RBUF_4B_ALGN | RBUF_RSB_EN; /* Set a correct RSB format on SYSTEMPORT Lite */ if (priv->is_lite)
reg &= ~RBUF_RSB_SWAP1;
/* Set a correct RSB format based on host endian */ if (!IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
reg |= RBUF_RSB_SWAP0; else
reg &= ~RBUF_RSB_SWAP0;
rbuf_writel(priv, reg, RBUF_CONTROL);
}
/* Enable RBUF 2bytes alignment and Receive Status Block */
rbuf_init(priv);
/* Set maximum frame length */ if (!priv->is_lite)
umac_writel(priv, UMAC_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN); else
gib_set_pad_extension(priv);
/* Apply features again in case we changed them while interface was * down
*/
bcm_sysport_set_features(dev, dev->features);
/* Set MAC address */
umac_set_hw_addr(priv, dev->dev_addr);
phydev = of_phy_connect(dev, priv->phy_dn, bcm_sysport_adj_link,
0, priv->phy_interface); if (!phydev) {
netdev_err(dev, "could not attach to PHY\n");
ret = -ENODEV; goto out_clk_disable;
}
/* Indicate that the MAC is responsible for PHY PM */
phydev->mac_managed_pm = true;
/* Reset house keeping link status */
priv->old_duplex = -1;
priv->old_link = -1;
priv->old_pause = -1;
/* mask all interrupts and request them */
bcm_sysport_mask_all_intrs(priv);
ret = request_irq(priv->irq0, bcm_sysport_rx_isr, 0, dev->name, dev); if (ret) {
netdev_err(dev, "failed to request RX interrupt\n"); goto out_phy_disconnect;
}
if (!priv->is_lite) {
ret = request_irq(priv->irq1, bcm_sysport_tx_isr, 0,
dev->name, dev); if (ret) {
netdev_err(dev, "failed to request TX interrupt\n"); goto out_free_irq0;
}
}
/* Initialize both hardware and software ring */
spin_lock_init(&priv->desc_lock); for (i = 0; i < dev->num_tx_queues; i++) {
ret = bcm_sysport_init_tx_ring(priv, i); if (ret) {
netdev_err(dev, "failed to initialize TX ring %d\n",
i); goto out_free_tx_ring;
}
}
/* We cannot match locations greater than what the classification ID * permits (256 entries)
*/ if (nfc->fs.location > RXCHK_BRCM_TAG_CID_MASK) return -E2BIG;
/* We cannot support flows that are not destined for a wake-up */ if (nfc->fs.ring_cookie != RX_CLS_FLOW_WAKE) return -EOPNOTSUPP;
index = find_first_zero_bit(priv->filters, RXCHK_BRCM_TAG_MAX); if (index >= RXCHK_BRCM_TAG_MAX) /* All filters are already in use, we cannot match more rules */ return -ENOSPC;
/* Location is the classification ID, and index is the position * within one of our 8 possible filters to be programmed
*/
reg = rxchk_readl(priv, RXCHK_BRCM_TAG(index));
reg &= ~(RXCHK_BRCM_TAG_CID_MASK << RXCHK_BRCM_TAG_CID_SHIFT);
reg |= nfc->fs.location << RXCHK_BRCM_TAG_CID_SHIFT;
rxchk_writel(priv, reg, RXCHK_BRCM_TAG(index));
rxchk_writel(priv, 0xff00ffff, RXCHK_BRCM_TAG_MASK(index));
staticint bcm_sysport_rule_del(struct bcm_sysport_priv *priv,
u64 location)
{ int index;
/* This is not a rule that we know about */
index = bcm_sysport_rule_find(priv, location); if (index < 0) return -EOPNOTSUPP;
/* No need to disable this filter if it was enabled, this will * be taken care of during suspend time by bcm_sysport_suspend_to_wol
*/
clear_bit(index, priv->filters);
priv->filters_loc[index] = 0;
return 0;
}
staticint bcm_sysport_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *nfc, u32 *rule_locs)
{ struct bcm_sysport_priv *priv = netdev_priv(dev); int ret = -EOPNOTSUPP;
switch (nfc->cmd) { case ETHTOOL_GRXCLSRULE:
ret = bcm_sysport_rule_get(priv, nfc); break; default: break;
}
return ret;
}
staticint bcm_sysport_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *nfc)
{ struct bcm_sysport_priv *priv = netdev_priv(dev); int ret = -EOPNOTSUPP;
switch (nfc->cmd) { case ETHTOOL_SRXCLSRLINS:
ret = bcm_sysport_rule_set(priv, nfc); break; case ETHTOOL_SRXCLSRLDEL:
ret = bcm_sysport_rule_del(priv, nfc->fs.location); break; default: break;
}
if (!netdev_uses_dsa(dev)) return netdev_pick_tx(dev, skb, NULL);
/* DSA tagging layer will have configured the correct queue */
q = BRCM_TAG_GET_QUEUE(queue);
port = BRCM_TAG_GET_PORT(queue);
tx_ring = priv->ring_map[q + port * priv->per_port_num_tx_queues];
if (unlikely(!tx_ring)) return netdev_pick_tx(dev, skb, NULL);
/* We can't be setting up queue inspection for non directly attached * switches
*/ if (dp->ds->index) return 0;
port = dp->index;
/* On SYSTEMPORT Lite we have twice as less queues, so we cannot do a * 1:1 mapping, we can only do a 2:1 mapping. By reducing the number of * per-port (slave_dev) network devices queue, we achieve just that. * This need to happen now before any slave network device is used such * it accurately reflects the number of real TX queues.
*/ if (priv->is_lite)
netif_set_real_num_tx_queues(slave_dev,
slave_dev->num_tx_queues / 2);
num_tx_queues = slave_dev->real_num_tx_queues;
if (priv->per_port_num_tx_queues &&
priv->per_port_num_tx_queues != num_tx_queues)
netdev_warn(slave_dev, "asymmetric number of per-port queues\n");
priv->per_port_num_tx_queues = num_tx_queues;
for (q = 0, qp = 0; q < dev->num_tx_queues && qp < num_tx_queues;
q++) {
ring = &priv->tx_rings[q];
if (ring->inspect) continue;
/* Just remember the mapping actual programming done * during bcm_sysport_init_tx_ring
*/
ring->switch_queue = qp;
ring->switch_port = port;
ring->inspect = true;
priv->ring_map[qp + port * num_tx_queues] = ring;
qp++;
}
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