for (index = 0; index < pa->size; index++) {
u32 action = le32_to_cpu(pa->code[index]);
u32 val = action & 0x0000ffff;
u32 regno = (action & 0x0fff0000) >> 16;
switch (action >> 28) { case PHY_READ: case PHY_DATA_OR: case PHY_DATA_AND: case PHY_CLEAR_READCOUNT: case PHY_WRITE: case PHY_WRITE_PREVIOUS: case PHY_DELAY_MS: break;
case PHY_MDIO_CHG: if (val > 1) goto out; break;
case PHY_BJMPN: if (regno > index) goto out; break; case PHY_READCOUNT_EQ_SKIP: if (index + 2 >= pa->size) goto out; break; case PHY_COMP_EQ_SKIPN: case PHY_COMP_NEQ_SKIPN: case PHY_SKIPN: if (index + 1 + regno >= pa->size) goto out; break;
for (index = 0; index < pa->size; index++) {
u32 action = le32_to_cpu(pa->code[index]);
u32 data = action & 0x0000ffff;
u32 regno = (action & 0x0fff0000) >> 16; enum rtl_fw_opcode opcode = action >> 28;
switch (opcode) { case PHY_READ:
predata = fw_read(tp, regno);
count++; break; case PHY_DATA_OR:
predata |= data; break; case PHY_DATA_AND:
predata &= data; break; case PHY_BJMPN:
index -= (regno + 1); break; case PHY_MDIO_CHG: if (data) {
fw_write = rtl_fw->mac_mcu_write;
fw_read = rtl_fw->mac_mcu_read;
} else {
fw_write = rtl_fw->phy_write;
fw_read = rtl_fw->phy_read;
}
break; case PHY_CLEAR_READCOUNT:
count = 0; break; case PHY_WRITE:
fw_write(tp, regno, data); break; case PHY_READCOUNT_EQ_SKIP: if (count == data)
index++; break; case PHY_COMP_EQ_SKIPN: if (predata == data)
index += regno; break; case PHY_COMP_NEQ_SKIPN: if (predata != data)
index += regno; break; case PHY_WRITE_PREVIOUS:
fw_write(tp, regno, predata); break; case PHY_SKIPN:
index += regno; break; case PHY_DELAY_MS:
msleep(data); break;
}
}
}
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