/* sis900.c: A SiS 900/7016 PCI Fast Ethernet driver for Linux. Copyright 1999 Silicon Integrated System Corporation Revision: 1.08.10 Apr. 2 2006
Modified from the driver which is originally written by Donald Becker.
This software may be used and distributed according to the terms of the GNU General Public License (GPL), incorporated herein by reference. Drivers based on this skeleton fall under the GPL and must retain the authorship (implicit copyright) notice.
References: SiS 7016 Fast Ethernet PCI Bus 10/100 Mbps LAN Controller with OnNow Support, preliminary Rev. 1.0 Jan. 14, 1998 SiS 900 Fast Ethernet PCI Bus 10/100 Mbps LAN Single Chip with OnNow Support, preliminary Rev. 1.0 Nov. 10, 1998 SiS 7014 Single Chip 100BASE-TX/10BASE-T Physical Layer Solution, preliminary Rev. 1.0 Jan. 18, 1998
Rev 1.08.10 Apr. 2 2006 Daniele Venzano add vlan (jumbo packets) support Rev 1.08.09 Sep. 19 2005 Daniele Venzano add Wake on LAN support Rev 1.08.08 Jan. 22 2005 Daniele Venzano use netif_msg for debugging messages Rev 1.08.07 Nov. 2 2003 Daniele Venzano <venza@brownhat.org> add suspend/resume support Rev 1.08.06 Sep. 24 2002 Mufasa Yang bug fix for Tx timeout & add SiS963 support Rev 1.08.05 Jun. 6 2002 Mufasa Yang bug fix for read_eeprom & Tx descriptor over-boundary Rev 1.08.04 Apr. 25 2002 Mufasa Yang <mufasa@sis.com.tw> added SiS962 support Rev 1.08.03 Feb. 1 2002 Matt Domsch <Matt_Domsch@dell.com> update to use library crc32 function Rev 1.08.02 Nov. 30 2001 Hui-Fen Hsu workaround for EDB & bug fix for dhcp problem Rev 1.08.01 Aug. 25 2001 Hui-Fen Hsu update for 630ET & workaround for ICS1893 PHY Rev 1.08.00 Jun. 11 2001 Hui-Fen Hsu workaround for RTL8201 PHY and some bug fix Rev 1.07.11 Apr. 2 2001 Hui-Fen Hsu updates PCI drivers to use the new pci_set_dma_mask for kernel 2.4.3 Rev 1.07.10 Mar. 1 2001 Hui-Fen Hsu <hfhsu@sis.com.tw> some bug fix & 635M/B support Rev 1.07.09 Feb. 9 2001 Dave Jones <davej@suse.de> PCI enable cleanup Rev 1.07.08 Jan. 8 2001 Lei-Chun Chang added RTL8201 PHY support Rev 1.07.07 Nov. 29 2000 Lei-Chun Chang added kernel-doc extractable documentation and 630 workaround fix Rev 1.07.06 Nov. 7 2000 Jeff Garzik <jgarzik@pobox.com> some bug fix and cleaning Rev 1.07.05 Nov. 6 2000 metapirat<metapirat@gmx.de> contribute media type select by ifconfig Rev 1.07.04 Sep. 6 2000 Lei-Chun Chang added ICS1893 PHY support Rev 1.07.03 Aug. 24 2000 Lei-Chun Chang (lcchang@sis.com.tw) modified 630E equalizer workaround rule Rev 1.07.01 Aug. 08 2000 Ollie Lho minor update for SiS 630E and SiS 630E A1 Rev 1.07 Mar. 07 2000 Ollie Lho bug fix in Rx buffer ring Rev 1.06.04 Feb. 11 2000 Jeff Garzik <jgarzik@pobox.com> softnet and init for kernel 2.4 Rev 1.06.03 Dec. 23 1999 Ollie Lho Third release Rev 1.06.02 Nov. 23 1999 Ollie Lho bug in mac probing fixed Rev 1.06.01 Nov. 16 1999 Ollie Lho CRC calculation provide by Joseph Zbiciak (im14u2c@primenet.com) Rev 1.06 Nov. 4 1999 Ollie Lho (ollie@sis.com.tw) Second release Rev 1.05.05 Oct. 29 1999 Ollie Lho (ollie@sis.com.tw) Single buffer Tx/Rx Chin-Shan Li (lcs@sis.com.tw) Added AMD Am79c901 HomePNA PHY support Rev 1.05 Aug. 7 1999 Jim Huang (cmhuang@sis.com.tw) Initial release
*/
/** * sis900_get_mac_addr - Get MAC address for stand alone SiS900 model * @pci_dev: the sis900 pci device * @net_dev: the net device to get address for * * Older SiS900 and friends, use EEPROM to store MAC address. * MAC address is read from read_eeprom() into @net_dev->dev_addr.
*/
/* check to see if we have sane EEPROM */
signature = (u16) read_eeprom(ioaddr, EEPROMSignature); if (signature == 0xffff || signature == 0x0000) {
printk (KERN_WARNING "%s: Error EEPROM read %x\n",
pci_name(pci_dev), signature); return 0;
}
/* get MAC address from EEPROM */ for (i = 0; i < 3; i++)
addr[i] = read_eeprom(ioaddr, i+EEPROMMACAddr);
eth_hw_addr_set(net_dev, (u8 *)addr);
return 1;
}
/** * sis630e_get_mac_addr - Get MAC address for SiS630E model * @pci_dev: the sis900 pci device * @net_dev: the net device to get address for * * SiS630E model, use APC CMOS RAM to store MAC address. * APC CMOS RAM is accessed through ISA bridge. * MAC address is read into @net_dev->dev_addr.
*/
/** * sis635_get_mac_addr - Get MAC address for SIS635 model * @pci_dev: the sis900 pci device * @net_dev: the net device to get address for * * SiS635 model, set MAC Reload Bit to load Mac address from APC * to rfdr. rfdr is accessed through rfcr. MAC address is read into * @net_dev->dev_addr.
*/
/* load MAC addr to filter data register */ for (i = 0 ; i < 3 ; i++) {
sw32(rfcr, (i << RFADDR_shift));
addr[i] = sr16(rfdr);
}
eth_hw_addr_set(net_dev, (u8 *)addr);
/** * sis96x_get_mac_addr - Get MAC address for SiS962 or SiS963 model * @pci_dev: the sis900 pci device * @net_dev: the net device to get address for * * SiS962 or SiS963 model, use EEPROM to store MAC address. And EEPROM * is shared by * LAN and 1394. When accessing EEPROM, send EEREQ signal to hardware first * and wait for EEGNT. If EEGNT is ON, EEPROM is permitted to be accessed * by LAN, otherwise it is not. After MAC address is read from EEPROM, send * EEDONE signal to refuse EEPROM access by LAN. * The EEPROM map of SiS962 or SiS963 is different to SiS900. * The signature field in SiS962 or SiS963 spec is meaningless. * MAC address is read into @net_dev->dev_addr.
*/
/** * sis900_probe - Probe for sis900 device * @pci_dev: the sis900 pci device * @pci_id: the pci device ID * * Check and probe sis900 net device for @pci_dev. * Get mac address according to the chip revision, * and assign SiS900-specific entries in the device structure. * ie: sis900_open(), sis900_start_xmit(), sis900_close(), etc.
*/
/* when built into the kernel, we only print version if device is found */ #ifndef MODULE staticint printed_version; if (!printed_version++)
printk(version); #endif
/* setup various bits in PCI command register */
ret = pcim_enable_device(pci_dev); if(ret) return ret;
i = dma_set_mask(&pci_dev->dev, DMA_BIT_MASK(32)); if(i){
printk(KERN_ERR "sis900.c: architecture does not support " "32bit PCI busmaster DMA\n"); return i;
}
pci_set_master(pci_dev);
net_dev = alloc_etherdev(sizeof(struct sis900_private)); if (!net_dev) return -ENOMEM;
SET_NETDEV_DEV(net_dev, &pci_dev->dev);
/* We do a request_region() to register /proc/ioports info. */
ret = pcim_request_all_regions(pci_dev, "sis900"); if (ret) goto err_out;
/* IO region. */
ioaddr = pci_iomap(pci_dev, 0, 0); if (!ioaddr) {
ret = -ENOMEM; goto err_out;
}
/* Get Mac address according to the chip revision */
sis_priv->chipset_rev = pci_dev->revision; if(netif_msg_probe(sis_priv))
printk(KERN_DEBUG "%s: detected revision %2.2x, " "trying to get MAC address...\n",
dev_name, sis_priv->chipset_rev);
ret = 0; if (sis_priv->chipset_rev == SIS630E_900_REV)
ret = sis630e_get_mac_addr(pci_dev, net_dev); elseif ((sis_priv->chipset_rev > 0x81) && (sis_priv->chipset_rev <= 0x90) )
ret = sis635_get_mac_addr(pci_dev, net_dev); elseif (sis_priv->chipset_rev == SIS96x_900_REV)
ret = sis96x_get_mac_addr(pci_dev, net_dev); else
ret = sis900_get_mac_addr(pci_dev, net_dev);
if (!ret || !is_valid_ether_addr(net_dev->dev_addr)) {
eth_hw_addr_random(net_dev);
printk(KERN_WARNING "%s: Unreadable or invalid MAC address," "using random generated one\n", dev_name);
}
/* 630ET : set the mii access mode as software-mode */ if (sis_priv->chipset_rev == SIS630ET_900_REV)
sw32(cr, ACCESSMODE | sr32(cr));
/* probe for mii transceiver */ if (sis900_mii_probe(net_dev) == 0) {
printk(KERN_WARNING "%s: Error probing MII device.\n",
dev_name);
ret = -ENODEV; goto err_unmap_rx;
}
/* save our host bridge revision */
dev = pci_get_device(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_630, NULL); if (dev) {
sis_priv->host_bridge_rev = dev->revision;
pci_dev_put(dev);
}
ret = register_netdev(net_dev); if (ret) goto err_unmap_rx;
/* print some information about our NIC */
printk(KERN_INFO "%s: %s at 0x%p, IRQ %d, %pM\n",
net_dev->name, card_name, ioaddr, pci_dev->irq,
net_dev->dev_addr);
/* Detect Wake on Lan support */
ret = (sr32(CFGPMC) & PMESP) >> 27; if (netif_msg_probe(sis_priv) && (ret & PME_D3C) == 0)
printk(KERN_INFO "%s: Wake on LAN only available from suspend to RAM.", net_dev->name);
/** * sis900_mii_probe - Probe MII PHY for sis900 * @net_dev: the net device to probe for * * Search for total of 32 possible mii phy addresses. * Identify and set current phy if found one, * return error if it failed to found.
*/
/* search for total of 32 possible mii phy addresses */ for (phy_addr = 0; phy_addr < 32; phy_addr++) { struct mii_phy * mii_phy = NULL;
u16 mii_status; int i;
if (mii_status == 0xffff || mii_status == 0x0000) { if (netif_msg_probe(sis_priv))
printk(KERN_DEBUG "%s: MII at address %d" " not accessible\n",
dev_name, phy_addr); continue;
}
for (i = 0; mii_chip_table[i].phy_id1; i++) if ((mii_phy->phy_id0 == mii_chip_table[i].phy_id0 ) &&
((mii_phy->phy_id1 & 0xFFF0) == mii_chip_table[i].phy_id1)){
mii_phy->phy_types = mii_chip_table[i].phy_types; if (mii_chip_table[i].phy_types == MIX)
mii_phy->phy_types =
(mii_status & (MII_STAT_CAN_TX_FDX | MII_STAT_CAN_TX)) ? LAN : HOME;
printk(KERN_INFO "%s: %s transceiver found " "at address %d.\n",
dev_name,
mii_chip_table[i].name,
phy_addr); break;
}
if( !mii_chip_table[i].phy_id1 ) {
printk(KERN_INFO "%s: Unknown PHY transceiver found at address %d.\n",
dev_name, phy_addr);
mii_phy->phy_types = UNKNOWN;
}
}
if (sis_priv->mii == NULL) {
printk(KERN_INFO "%s: No MII transceivers found!\n", dev_name); return 0;
}
/* select default PHY for mac */
sis_priv->mii = NULL;
sis900_default_phy( net_dev );
/* Reset phy if default phy is internal sis900 */ if ((sis_priv->mii->phy_id0 == 0x001D) &&
((sis_priv->mii->phy_id1&0xFFF0) == 0x8000))
status = sis900_reset_phy(net_dev, sis_priv->cur_phy);
/* workaround for ICS1893 PHY */ if ((sis_priv->mii->phy_id0 == 0x0015) &&
((sis_priv->mii->phy_id1&0xFFF0) == 0xF440))
mdio_write(net_dev, sis_priv->cur_phy, 0x0018, 0xD200);
if(status & MII_STAT_LINK){ while (poll_bit) {
yield();
poll_bit ^= (mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS) & poll_bit); if (time_after_eq(jiffies, timeout)) {
printk(KERN_WARNING "%s: reset phy and link down now\n",
dev_name); return -ETIME;
}
}
}
if (sis_priv->chipset_rev == SIS630E_900_REV) { /* SiS 630E has some bugs on default value of PHY registers */
mdio_write(net_dev, sis_priv->cur_phy, MII_ANADV, 0x05e1);
mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG1, 0x22);
mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG2, 0xff00);
mdio_write(net_dev, sis_priv->cur_phy, MII_MASK, 0xffc0); //mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, 0x1000);
}
if (sis_priv->mii->status & MII_STAT_LINK)
netif_carrier_on(net_dev); else
netif_carrier_off(net_dev);
return 1;
}
/** * sis900_default_phy - Select default PHY for sis900 mac. * @net_dev: the net device to probe for * * Select first detected PHY with link as default. * If no one is link on, select PHY whose types is HOME as default. * If HOME doesn't exist, select LAN.
*/
for (phy=sis_priv->first_mii; phy; phy=phy->next) {
status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
/* Link ON & Not select default PHY & not ghost PHY */ if ((status & MII_STAT_LINK) && !default_phy &&
(phy->phy_types != UNKNOWN)) {
default_phy = phy;
} else {
status = mdio_read(net_dev, phy->phy_addr, MII_CONTROL);
mdio_write(net_dev, phy->phy_addr, MII_CONTROL,
status | MII_CNTL_AUTO | MII_CNTL_ISOLATE); if (phy->phy_types == HOME)
phy_home = phy; elseif(phy->phy_types == LAN)
phy_lan = phy;
}
}
if (sis_priv->mii != default_phy) {
sis_priv->mii = default_phy;
sis_priv->cur_phy = default_phy->phy_addr;
printk(KERN_INFO "%s: Using transceiver found at address %d as default\n",
pci_name(sis_priv->pci_dev), sis_priv->cur_phy);
}
sis_priv->mii_info.phy_id = sis_priv->cur_phy;
status = mdio_read(net_dev, sis_priv->cur_phy, MII_CONTROL);
status &= (~MII_CNTL_ISOLATE);
mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, status);
status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
return status;
}
/** * sis900_set_capability - set the media capability of network adapter. * @net_dev : the net device to probe for * @phy : default PHY * * Set the media capability of network adapter according to * mii status register. It's necessary before auto-negotiate.
*/
/* Delay between EEPROM clock transitions. */ #define eeprom_delay() sr32(mear)
/** * read_eeprom - Read Serial EEPROM * @ioaddr: base i/o address * @location: the EEPROM location to read * * Read Serial EEPROM through EEPROM Access Register. * Note that location is in word (16 bits) unit
*/
static u16 read_eeprom(void __iomem *ioaddr, int location)
{
u32 read_cmd = location | EEread; int i;
u16 retval = 0;
/* read the 16-bits data in */ for (i = 16; i > 0; i--) {
sw32(mear, EECS);
eeprom_delay();
sw32(mear, EECS | EECLK);
eeprom_delay();
retval = (retval << 1) | ((sr32(mear) & EEDO) ? 1 : 0);
eeprom_delay();
}
/* Terminate the EEPROM access. */
sw32(mear, 0);
eeprom_delay();
return retval;
}
/* Read and write the MII management registers using software-generated serial MDIO protocol. Note that the command bits and data bits are
send out separately */ #define mdio_delay() sr32(mear)
/* Synchronize the MII management interface by shifting 32 one bits out. */ staticvoid mdio_reset(struct sis900_private *sp)
{ void __iomem *ioaddr = sp->ioaddr; int i;
for (i = 31; i >= 0; i--) {
sw32(mear, MDDIR | MDIO);
mdio_delay();
sw32(mear, MDDIR | MDIO | MDC);
mdio_delay();
}
}
/** * mdio_read - read MII PHY register * @net_dev: the net device to read * @phy_id: the phy address to read * @location: the phy register id to read * * Read MII registers through MDIO and MDC * using MDIO management frame structure and protocol(defined by ISO/IEC). * Please see SiS7014 or ICS spec
*/
staticint mdio_read(struct net_device *net_dev, int phy_id, int location)
{ int mii_cmd = MIIread|(phy_id<<MIIpmdShift)|(location<<MIIregShift); struct sis900_private *sp = netdev_priv(net_dev); void __iomem *ioaddr = sp->ioaddr;
u16 retval = 0; int i;
mdio_reset(sp);
mdio_idle(sp);
for (i = 15; i >= 0; i--) { int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
/* Read the 16 data bits. */ for (i = 16; i > 0; i--) {
sw32(mear, 0);
mdio_delay();
retval = (retval << 1) | ((sr32(mear) & MDIO) ? 1 : 0);
sw32(mear, MDC);
mdio_delay();
}
sw32(mear, 0x00);
return retval;
}
/** * mdio_write - write MII PHY register * @net_dev: the net device to write * @phy_id: the phy address to write * @location: the phy register id to write * @value: the register value to write with * * Write MII registers with @value through MDIO and MDC * using MDIO management frame structure and protocol(defined by ISO/IEC) * please see SiS7014 or ICS spec
*/
staticvoid mdio_write(struct net_device *net_dev, int phy_id, int location, int value)
{ int mii_cmd = MIIwrite|(phy_id<<MIIpmdShift)|(location<<MIIregShift); struct sis900_private *sp = netdev_priv(net_dev); void __iomem *ioaddr = sp->ioaddr; int i;
mdio_reset(sp);
mdio_idle(sp);
/* Shift the command bits out. */ for (i = 15; i >= 0; i--) { int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
/* Clear out extra bits. */ for (i = 2; i > 0; i--) {
sw8(mear, 0);
mdio_delay();
sw8(mear, MDC);
mdio_delay();
}
sw32(mear, 0x00);
}
/** * sis900_reset_phy - reset sis900 mii phy. * @net_dev: the net device to write * @phy_addr: default phy address * * Some specific phy can't work properly without reset. * This function will be called during initialization and * link status change from ON to DOWN.
*/
static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr)
{ int i;
u16 status;
for (i = 0; i < 2; i++)
status = mdio_read(net_dev, phy_addr, MII_STATUS);
#ifdef CONFIG_NET_POLL_CONTROLLER /* * Polling 'interrupt' - used by things like netconsole to send skbs * without having to re-enable interrupts. It's not called while * the interrupt routine is executing.
*/ staticvoid sis900_poll(struct net_device *dev)
{ struct sis900_private *sp = netdev_priv(dev); constint irq = sp->pci_dev->irq;
/** * sis900_open - open sis900 device * @net_dev: the net device to open * * Do some initialization and start net interface. * enable interrupts and set sis900 timer.
*/
/* Workaround for EDB */
sis900_set_mode(sis_priv, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
/* Enable all known interrupts by setting the interrupt mask. */
sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxDESC);
sw32(cr, RxENA | sr32(cr));
sw32(ier, IE);
sis900_check_mode(net_dev, sis_priv->mii);
/* Set the timer to switch to check for link beat and perhaps switch
to an alternate media type. */
timer_setup(&sis_priv->timer, sis900_timer, 0);
sis_priv->timer.expires = jiffies + HZ;
add_timer(&sis_priv->timer);
return 0;
}
/** * sis900_init_rxfilter - Initialize the Rx filter * @net_dev: the net device to initialize for * * Set receive filter address to our MAC address * and enable packet filtering.
*/
/** * sis900_init_rx_ring - Initialize the Rx descriptor ring * @net_dev: the net device to initialize for * * Initialize the Rx descriptor ring, * and pre-allocate receive buffers (socket buffer)
*/
/* allocate sock buffers */ for (i = 0; i < NUM_RX_DESC; i++) { struct sk_buff *skb;
if ((skb = netdev_alloc_skb(net_dev, RX_BUF_SIZE)) == NULL) { /* not enough memory for skbuff, this makes a "hole" on the buffer ring, it is not clear how the hardware will react to this kind of degenerated
buffer */ break;
}
sis_priv->rx_skbuff[i] = skb;
sis_priv->rx_ring[i].cmdsts = RX_BUF_SIZE;
sis_priv->rx_ring[i].bufptr = dma_map_single(&sis_priv->pci_dev->dev,
skb->data,
RX_BUF_SIZE,
DMA_FROM_DEVICE); if (unlikely(dma_mapping_error(&sis_priv->pci_dev->dev,
sis_priv->rx_ring[i].bufptr))) {
dev_kfree_skb(skb);
sis_priv->rx_skbuff[i] = NULL; break;
}
}
sis_priv->dirty_rx = (unsignedint) (i - NUM_RX_DESC);
/** * sis630_set_eq - set phy equalizer value for 630 LAN * @net_dev: the net device to set equalizer value * @revision: 630 LAN revision number * * 630E equalizer workaround rule(Cyrus Huang 08/15) * PHY register 14h(Test) * Bit 14: 0 -- Automatically detect (default) * 1 -- Manually set Equalizer filter * Bit 13: 0 -- (Default) * 1 -- Speed up convergence of equalizer setting * Bit 9 : 0 -- (Default) * 1 -- Disable Baseline Wander * Bit 3~7 -- Equalizer filter setting * Link ON: Set Bit 9, 13 to 1, Bit 14 to 0 * Then calculate equalizer value * Then set equalizer value, and set Bit 14 to 1, Bit 9 to 0 * Link Off:Set Bit 13 to 1, Bit 14 to 0 * Calculate Equalizer value: * When Link is ON and Bit 14 is 0, SIS900PHY will auto-detect proper equalizer value. * When the equalizer is stable, this value is not a fixed value. It will be within * a small range(eg. 7~9). Then we get a minimum and a maximum value(eg. min=7, max=9) * 0 <= max <= 4 --> set equalizer to max * 5 <= max <= 14 --> set equalizer to max+1 or set equalizer to max+2 if max == min * max >= 15 --> set equalizer to max+5 or set equalizer to max+6 if max == min
*/
staticvoid sis630_set_eq(struct net_device *net_dev, u8 revision)
{ struct sis900_private *sis_priv = netdev_priv(net_dev);
u16 reg14h, eq_value=0, max_value=0, min_value=0; int i, maxcount=10;
/** * sis900_timer - sis900 timer routine * @t: timer list containing a pointer to sis900 net device * * On each timer ticks we check two things, * link status (ON/OFF) and link mode (10/100/Full/Half)
*/
status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
/* Link OFF -> ON */ if (!netif_carrier_ok(net_dev)) {
LookForLink: /* Search for new PHY */
status = sis900_default_phy(net_dev);
mii_phy = sis_priv->mii;
if (status & MII_STAT_LINK) {
WARN_ON(!(status & MII_STAT_AUTO_DONE));
sis900_read_mode(net_dev, &speed, &duplex); if (duplex) {
sis900_set_mode(sis_priv, speed, duplex);
sis630_set_eq(net_dev, sis_priv->chipset_rev);
netif_carrier_on(net_dev);
}
}
} else { /* Link ON -> OFF */ if (!(status & MII_STAT_LINK)){
netif_carrier_off(net_dev); if(netif_msg_link(sis_priv))
printk(KERN_INFO "%s: Media Link Off\n", net_dev->name);
/** * sis900_check_mode - check the media mode for sis900 * @net_dev: the net device to be checked * @mii_phy: the mii phy * * Older driver gets the media mode from mii status output * register. Now we set our media capability and auto-negotiate * to get the upper bound of speed and duplex between two ends. * If the types of mii phy is HOME, it doesn't need to auto-negotiate * and autong_complete should be set to 1.
*/
/** * sis900_set_mode - Set the media mode of mac register. * @sp: the device private data * @speed : the transmit speed to be determined * @duplex: the duplex mode to be determined * * Set the media mode of mac register txcfg/rxcfg according to * speed and duplex of phy. Bit EDB_MASTER_EN indicates the EDB * bus is used instead of PCI bus. When this bit is set 1, the * Max DMA Burst Size for TX/RX DMA should be no larger than 16 * double words.
*/
/** * sis900_auto_negotiate - Set the Auto-Negotiation Enable/Reset bit. * @net_dev: the net device to read mode for * @phy_addr: mii phy address * * If the adapter is link-on, set the auto-negotiate enable/reset bit. * autong_complete should be set to 0 when starting auto-negotiation. * autong_complete should be set to 1 if we didn't start auto-negotiation. * sis900_timer will wait for link on again if autong_complete = 0.
*/
staticvoid sis900_auto_negotiate(struct net_device *net_dev, int phy_addr)
{ struct sis900_private *sis_priv = netdev_priv(net_dev); int i = 0;
u32 status;
for (i = 0; i < 2; i++)
status = mdio_read(net_dev, phy_addr, MII_STATUS);
if (!(status & MII_STAT_LINK)){ if(netif_msg_link(sis_priv))
printk(KERN_INFO "%s: Media Link Off\n", net_dev->name);
sis_priv->autong_complete = 1;
netif_carrier_off(net_dev); return;
}
/** * sis900_read_mode - read media mode for sis900 internal phy * @net_dev: the net device to read mode for * @speed : the transmit speed to be determined * @duplex : the duplex mode to be determined * * The capability of remote end will be put in mii register autorec * after auto-negotiation. Use AND operation to get the upper bound * of speed and duplex between two ends.
*/
staticvoid sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex)
{ struct sis900_private *sis_priv = netdev_priv(net_dev); struct mii_phy *phy = sis_priv->mii; int phy_addr = sis_priv->cur_phy;
u32 status;
u16 autoadv, autorec; int i;
for (i = 0; i < 2; i++)
status = mdio_read(net_dev, phy_addr, MII_STATUS);
if (status & (MII_NWAY_TX | MII_NWAY_TX_FDX))
*speed = HW_SPEED_100_MBPS; if (status & ( MII_NWAY_TX_FDX | MII_NWAY_T_FDX))
*duplex = FDX_CAPABLE_FULL_SELECTED;
sis_priv->autong_complete = 1;
/* Workaround for Realtek RTL8201 PHY issue */ if ((phy->phy_id0 == 0x0000) && ((phy->phy_id1 & 0xFFF0) == 0x8200)) { if (mdio_read(net_dev, phy_addr, MII_CONTROL) & MII_CNTL_FDX)
*duplex = FDX_CAPABLE_FULL_SELECTED; if (mdio_read(net_dev, phy_addr, 0x0019) & 0x01)
*speed = HW_SPEED_100_MBPS;
}
if(netif_msg_link(sis_priv))
printk(KERN_INFO "%s: Media Link On %s %s-duplex\n",
net_dev->name,
*speed == HW_SPEED_100_MBPS ? "100mbps" : "10mbps",
*duplex == FDX_CAPABLE_FULL_SELECTED ? "full" : "half");
}
/** * sis900_tx_timeout - sis900 transmit timeout routine * @net_dev: the net device to transmit * @txqueue: index of hanging queue * * print transmit timeout status * disable interrupts and do some tasks
*/
/* Enable all known interrupts by setting the interrupt mask. */
sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxDESC);
}
/** * sis900_start_xmit - sis900 start transmit routine * @skb: socket buffer pointer to put the data being transmitted * @net_dev: the net device to transmit with * * Set the transmit buffer descriptor, * and write TxENA to enable transmit state machine. * tell upper layer if the buffer is full
*/
for (count_dirty_tx = 0; index_cur_tx != index_dirty_tx; index_dirty_tx++)
count_dirty_tx ++;
if (index_cur_tx == index_dirty_tx) { /* dirty_tx is met in the cycle of cur_tx, buffer full */
sis_priv->tx_full = 1;
netif_stop_queue(net_dev);
} elseif (count_dirty_tx < NUM_TX_DESC) { /* Typical path, tell upper layer that more transmission is possible */
netif_start_queue(net_dev);
} else { /* buffer full, tell upper layer no more transmission */
sis_priv->tx_full = 1;
netif_stop_queue(net_dev);
}
spin_unlock_irqrestore(&sis_priv->lock, flags);
if (netif_msg_tx_queued(sis_priv))
printk(KERN_DEBUG "%s: Queued Tx packet at %p size %d " "to slot %d.\n",
net_dev->name, skb->data, (int)skb->len, entry);
return NETDEV_TX_OK;
}
/** * sis900_interrupt - sis900 interrupt handler * @irq: the irq number * @dev_instance: the client data object * * The interrupt handler does all of the Rx thread work, * and cleans up after the Tx thread
*/
/** * sis900_rx - sis900 receive routine * @net_dev: the net device which receives data * * Process receive interrupt events, * put buffer to higher layer and refill buffer pool * Note: This function is called by interrupt handler, * don't do "too much" work here
*/
/* refill the Rx buffer, what if there is not enough
* memory for new socket buffer ?? */ if ((skb = netdev_alloc_skb(net_dev, RX_BUF_SIZE)) == NULL) { /* * Not enough memory to refill the buffer * so we need to recycle the old one so * as to avoid creating a memory hole * in the rx ring
*/
skb = sis_priv->rx_skbuff[entry];
net_dev->stats.rx_dropped++; goto refill_rx_ring;
}
/* This situation should never happen, but due to some unknown bugs, it is possible that
we are working on NULL sk_buff :-( */ if (sis_priv->rx_skbuff[entry] == NULL) { if (netif_msg_rx_err(sis_priv))
printk(KERN_WARNING "%s: NULL pointer " "encountered in Rx ring\n" "cur_rx:%4.4d, dirty_rx:%4.4d\n",
net_dev->name, sis_priv->cur_rx,
sis_priv->dirty_rx);
dev_kfree_skb(skb); break;
}
/* give the socket buffer to upper layers */
rx_skb = sis_priv->rx_skbuff[entry];
skb_put(rx_skb, rx_size);
rx_skb->protocol = eth_type_trans(rx_skb, net_dev);
netif_rx(rx_skb);
/* refill the Rx buffer, what if the rate of refilling is slower
* than consuming ?? */ for (; sis_priv->cur_rx != sis_priv->dirty_rx; sis_priv->dirty_rx++) { struct sk_buff *skb;
entry = sis_priv->dirty_rx % NUM_RX_DESC;
if (sis_priv->rx_skbuff[entry] == NULL) {
skb = netdev_alloc_skb(net_dev, RX_BUF_SIZE); if (skb == NULL) { /* not enough memory for skbuff, this makes a * "hole" on the buffer ring, it is not clear * how the hardware will react to this kind
* of degenerated buffer */
net_dev->stats.rx_dropped++; break;
}
sis_priv->rx_skbuff[entry] = skb;
sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
sis_priv->rx_ring[entry].bufptr =
dma_map_single(&sis_priv->pci_dev->dev,
skb->data, RX_BUF_SIZE,
DMA_FROM_DEVICE); if (unlikely(dma_mapping_error(&sis_priv->pci_dev->dev,
sis_priv->rx_ring[entry].bufptr))) {
dev_kfree_skb_irq(skb);
sis_priv->rx_skbuff[entry] = NULL; break;
}
}
} /* re-enable the potentially idle receive state matchine */
sw32(cr , RxENA | sr32(cr));
return 0;
}
/** * sis900_finish_xmit - finish up transmission of packets * @net_dev: the net device to be transmitted on * * Check for error condition and free socket buffer etc * schedule for more transmission as needed * Note: This function is called by interrupt handler, * don't do "too much" work here
*/
if (tx_status & OWN) { /* The packet is not transmitted yet (owned by hardware) ! * Note: this is an almost impossible condition
* on TxDESC interrupt ('descriptor interrupt') */ break;
}
if (sis_priv->tx_full && netif_queue_stopped(net_dev) &&
sis_priv->cur_tx - sis_priv->dirty_tx < NUM_TX_DESC - 4) { /* The ring is no longer full, clear tx_full and schedule
* more transmission by netif_wake_queue(net_dev) */
sis_priv->tx_full = 0;
netif_wake_queue (net_dev);
}
}
/** * sis900_close - close sis900 device * @net_dev: the net device to be closed * * Disable interrupts, stop the Tx and Rx Status Machine * free Tx and RX socket buffer
*/
/* Disable interrupts by clearing the interrupt mask. */
sw32(imr, 0x0000);
sw32(ier, 0x0000);
/* Stop the chip's Tx and Rx Status Machine */
sw32(cr, RxDIS | TxDIS | sr32(cr));
timer_delete(&sis_priv->timer);
free_irq(pdev->irq, net_dev);
/* Free Tx and RX skbuff */ for (i = 0; i < NUM_RX_DESC; i++) {
skb = sis_priv->rx_skbuff[i]; if (skb) {
dma_unmap_single(&pdev->dev,
sis_priv->rx_ring[i].bufptr,
RX_BUF_SIZE, DMA_FROM_DEVICE);
dev_kfree_skb(skb);
sis_priv->rx_skbuff[i] = NULL;
}
} for (i = 0; i < NUM_TX_DESC; i++) {
skb = sis_priv->tx_skbuff[i]; if (skb) {
dma_unmap_single(&pdev->dev,
sis_priv->tx_ring[i].bufptr,
skb->len, DMA_TO_DEVICE);
dev_kfree_skb(skb);
sis_priv->tx_skbuff[i] = NULL;
}
}
/* Green! Put the chip in low-power mode. */
return 0;
}
/** * sis900_get_drvinfo - Return information about driver * @net_dev: the net device to probe * @info: container for info returned * * Process ethtool command such as "ehtool -i" to show information
*/
/** * sis900_set_wol - Set up Wake on Lan registers * @net_dev: the net device to probe * @wol: container for info passed to the driver * * Process ethtool command "wol" to setup wake on lan features. * SiS900 supports sending WoL events if a correct packet is received, * but there is no simple way to filter them to only a subset (broadcast, * multicast, unicast or arp).
*/
if (wol->wolopts & WAKE_MAGIC)
pmctrl_bits |= MAGICPKT; if (wol->wolopts & WAKE_PHY)
pmctrl_bits |= LINKON;
sw32(pmctrl, pmctrl_bits);
pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr);
cfgpmcsr |= PME_EN;
pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr); if (netif_msg_wol(sis_priv))
printk(KERN_DEBUG "%s: Wake on LAN enabled\n", net_dev->name);
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