/* * Driver for the Cirrus PD6729 PCI-PCMCIA bridge. * * Based on the i82092.c driver. * * This software may be used and distributed according to the terms of * the GNU General Public License, incorporated herein by reference.
*/
/* * PARAMETERS * irq_mode=n * Specifies the interrupt delivery mode. The default (1) is to use PCI * interrupts; a value of 0 selects ISA interrupts. This must be set for * correct operation of PCI card readers.
*/
/* Interface Status Register */
status = indirect_read(socket, I365_STATUS);
*value = 0;
if ((status & I365_CS_DETECT) == I365_CS_DETECT)
*value |= SS_DETECT;
/* * IO cards have a different meaning of bits 0,1 * Also notice the inverse-logic on the bits
*/ if (indirect_read(socket, I365_INTCTL) & I365_PC_IOCARD) { /* IO card */ if (!(status & I365_CS_STSCHG))
*value |= SS_STSCHG;
} else { /* non I/O card */ if (!(status & I365_CS_BVD1))
*value |= SS_BATDEAD; if (!(status & I365_CS_BVD2))
*value |= SS_BATWARN;
}
if (status & I365_CS_WRPROT)
*value |= SS_WRPROT; /* card is write protected */
if (status & I365_CS_READY)
*value |= SS_READY; /* card is not busy */
if (status & I365_CS_POWERON)
*value |= SS_POWERON; /* power is applied to the card */
/* First, set the global controller options */
indirect_write(socket, I365_GBLCTL, 0x00);
indirect_write(socket, I365_GENCTL, 0x00);
/* Values for the IGENC register */
socket->card_irq = state->io_irq;
reg = 0; /* The reset bit has "inverse" logic */ if (!(state->flags & SS_RESET))
reg |= I365_PC_RESET; if (state->flags & SS_IOCARD)
reg |= I365_PC_IOCARD;
/* IGENC, Interrupt and General Control Register */
indirect_write(socket, I365_INTCTL, reg);
/* Power registers */
reg = I365_PWR_NORESET; /* default: disable resetdrv on resume */
if (state->flags & SS_PWR_AUTO) {
dev_dbg(&sock->dev, "Auto power\n");
reg |= I365_PWR_AUTO; /* automatic power mngmnt */
} if (state->flags & SS_OUTPUT_ENA) {
dev_dbg(&sock->dev, "Power Enabled\n");
reg |= I365_PWR_OUT; /* enable power */
}
switch (state->Vcc) { case 0: break; case 33:
dev_dbg(&sock->dev, "setting voltage to Vcc to 3.3V on socket %i\n",
socket->number);
reg |= I365_VCC_5V;
indirect_setbit(socket, PD67_MISC_CTL_1, PD67_MC1_VCC_3V); break; case 50:
dev_dbg(&sock->dev, "setting voltage to Vcc to 5V on socket %i\n",
socket->number);
reg |= I365_VCC_5V;
indirect_resetbit(socket, PD67_MISC_CTL_1, PD67_MC1_VCC_3V); break; default:
dev_dbg(&sock->dev, "pd6729_set_socket called with invalid VCC power " "value: %i\n", state->Vcc); return -EINVAL;
}
switch (state->Vpp) { case 0:
dev_dbg(&sock->dev, "not setting Vpp on socket %i\n",
socket->number); break; case 33: case 50:
dev_dbg(&sock->dev, "setting Vpp to Vcc for socket %i\n",
socket->number);
reg |= I365_VPP1_5V; break; case 120:
dev_dbg(&sock->dev, "setting Vpp to 12.0\n");
reg |= I365_VPP1_12V; break; default:
dev_dbg(&sock->dev, "pd6729: pd6729_set_socket called with " "invalid VPP power value: %i\n", state->Vpp); return -EINVAL;
}
/* only write if changed */ if (reg != indirect_read(socket, I365_POWER))
indirect_write(socket, I365_POWER, reg);
if (irq_mode == 1) { /* all interrupts are to be done as PCI interrupts */
data = PD67_EC1_INV_MGMT_IRQ | PD67_EC1_INV_CARD_IRQ;
} else
data = 0;
/* Check error conditions */ if (map > 1) {
dev_dbg(&sock->dev, "pd6729_set_io_map with invalid map\n"); return -EINVAL;
}
/* Turn off the window before changing anything */ if (indirect_read(socket, I365_ADDRWIN) & I365_ENA_IO(map))
indirect_resetbit(socket, I365_ADDRWIN, I365_ENA_IO(map));
/* dev_dbg(&sock->dev, "set_io_map: Setting range to %x - %x\n",
io->start, io->stop);*/
/* write the new values */
indirect_write16(socket, I365_IO(map)+I365_W_START, io->start);
indirect_write16(socket, I365_IO(map)+I365_W_STOP, io->stop);
/* Turn off the window before changing anything */ if (indirect_read(socket, I365_ADDRWIN) & I365_ENA_MEM(map))
indirect_resetbit(socket, I365_ADDRWIN, I365_ENA_MEM(map));
/* write the start address */
base = I365_MEM(map);
i = (mem->res->start >> 12) & 0x0fff; if (mem->flags & MAP_16BIT)
i |= I365_MEM_16BIT; if (mem->flags & MAP_0WS)
i |= I365_MEM_0WS;
indirect_write16(socket, base + I365_W_START, i);
/* write the stop address */
i = (mem->res->end >> 12) & 0x0fff; switch (to_cycles(mem->speed)) { case 0: break; case 1:
i |= I365_MEM_WS0; break; case 2:
i |= I365_MEM_WS1; break; default:
i |= I365_MEM_WS1 | I365_MEM_WS0; break;
}
indirect_write16(socket, base + I365_W_STOP, i);
/* Take care of high byte */
indirect_write(socket, PD67_EXT_INDEX, PD67_MEM_PAGE(map));
indirect_write(socket, PD67_EXT_DATA, mem->res->start >> 24);
/* card start */
i = ((mem->card_start - mem->res->start) >> 12) & 0x3fff; if (mem->flags & MAP_WRPROT)
i |= I365_MEM_WRPROT; if (mem->flags & MAP_ATTRIB) { /* dev_dbg(&sock->dev, "requesting attribute memory for "
"socket %i\n", socket->number);*/
i |= I365_MEM_REG;
} else { /* dev_dbg(&sock->dev, "requesting normal memory for "
"socket %i\n", socket->number);*/
}
indirect_write16(socket, base + I365_W_OFF, i);
/* Enable the window if necessary */ if (mem->flags & MAP_ACTIVE)
indirect_setbit(socket, I365_ADDRWIN, I365_ENA_MEM(map));
if (irq_mode == 1) {
printk(KERN_INFO "pd6729: PCI card interrupts, " "PCI status changes\n"); return 0;
}
mask0 = PD67_MASK;
/* just find interrupts that aren't in use */ for (i = 0; i < 16; i++) if ((mask0 & (1 << i)) && (pd6729_check_irq(i) == 0))
mask |= (1 << i);
printk(KERN_INFO "pd6729: ISA irqs = "); for (i = 0; i < 16; i++) if (mask & (1<<i))
printk("%s%d", ((mask & ((1<<i)-1)) ? "," : ""), i);
if (mask == 0)
printk("none!"); else
printk(" polling status changes.\n");
return mask;
}
staticint pd6729_pci_probe(struct pci_dev *dev, conststruct pci_device_id *id)
{ int i, j, ret;
u_int mask; char configbyte; struct pd6729_socket *socket;
socket = kcalloc(MAX_SOCKETS, sizeof(struct pd6729_socket),
GFP_KERNEL); if (!socket) {
dev_warn(&dev->dev, "failed to kzalloc socket.\n"); return -ENOMEM;
}
ret = pci_enable_device(dev); if (ret) {
dev_warn(&dev->dev, "failed to enable pci_device.\n"); goto err_out_free_mem;
}
if (!pci_resource_start(dev, 0)) {
dev_warn(&dev->dev, "refusing to load the driver as the " "io_base is NULL.\n");
ret = -ENOMEM; goto err_out_disable;
}
dev_info(&dev->dev, "Cirrus PD6729 PCI to PCMCIA Bridge at 0x%llx " "on irq %d\n",
(unsignedlonglong)pci_resource_start(dev, 0), dev->irq); /* * Since we have no memory BARs some firmware may not * have had PCI_COMMAND_MEMORY enabled, yet the device needs it.
*/
pci_read_config_byte(dev, PCI_COMMAND, &configbyte); if (!(configbyte & PCI_COMMAND_MEMORY)) {
dev_dbg(&dev->dev, "pd6729: Enabling PCI_COMMAND_MEMORY.\n");
configbyte |= PCI_COMMAND_MEMORY;
pci_write_config_byte(dev, PCI_COMMAND, configbyte);
}
ret = pci_request_regions(dev, "pd6729"); if (ret) {
dev_warn(&dev->dev, "pci request region failed.\n"); goto err_out_disable;
}
if (dev->irq == NO_IRQ)
irq_mode = 0; /* fall back to ISA interrupt mode */
mask = pd6729_isa_scan(); if (irq_mode == 0 && mask == 0) {
dev_warn(&dev->dev, "no ISA interrupt is available.\n");
ret = -ENODEV; goto err_out_free_res;
}
pci_set_drvdata(dev, socket); if (irq_mode == 1) { /* Register the interrupt handler */
ret = request_irq(dev->irq, pd6729_interrupt, IRQF_SHARED, "pd6729", socket); if (ret) {
dev_err(&dev->dev, "Failed to register irq %d\n",
dev->irq); goto err_out_free_res;
}
} else { /* poll Card status change */
timer_setup(&socket->poll_timer, pd6729_interrupt_wrapper, 0);
mod_timer(&socket->poll_timer, jiffies + HZ);
}
for (i = 0; i < MAX_SOCKETS; i++) {
ret = pcmcia_register_socket(&socket[i].socket); if (ret) {
dev_warn(&dev->dev, "pcmcia_register_socket failed.\n"); for (j = 0; j < i ; j++)
pcmcia_unregister_socket(&socket[j].socket); goto err_out_free_res2;
}
}
for (i = 0; i < MAX_SOCKETS; i++) { /* Turn off all interrupt sources */
indirect_write(&socket[i], I365_CSCINT, 0);
indirect_write(&socket[i], I365_INTCTL, 0);
pcmcia_unregister_socket(&socket[i].socket);
}
if (irq_mode == 1)
free_irq(dev->irq, socket); else
timer_shutdown_sync(&socket->poll_timer);
pci_release_regions(dev);
pci_disable_device(dev);
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