// SPDX-License-Identifier: GPL-2.0 /* * The MT7988 driver based on Linux generic pinctrl binding. * * Copyright (C) 2020 MediaTek Inc. * Author: Sam Shih <sam.shih@mediatek.com> #include "pinctrl-moore.h" enum mt7988_pinctrl_reg_page {#define MT7988_PIN(_number, _name) MTK_PIN(_number, _name, 0, _number, DRV_GRP4)#define PIN_FIELD_BASE(_s_pin, _e_pin, _i_base, _s_addr, _x_addrs, _s_bit, \#define PINS_FIELD_BASE(_s_pin, _e_pin, _i_base, _s_addr, _x_addrs, _s_bit, \static const struct mtk_pin_field_calc mt7988_pin_mode_range[] = {static const struct mtk_pin_field_calc mt7988_pin_dir_range[] = {static const struct mtk_pin_field_calc mt7988_pin_di_range[] = {static const struct mtk_pin_field_calc mt7988_pin_do_range[] = {static const struct mtk_pin_field_calc mt7988_pin_ies_range[] = {static const struct mtk_pin_field_calc mt7988_pin_smt_range[] = {static const struct mtk_pin_field_calc mt7988_pin_pu_range[] = {static const struct mtk_pin_field_calc mt7988_pin_pd_range[] = {static const struct mtk_pin_field_calc mt7988_pin_drv_range[] = {static const struct mtk_pin_field_calc mt7988_pin_pupd_range[] = {static const struct mtk_pin_field_calc mt7988_pin_r0_range[] = {static const struct mtk_pin_field_calc mt7988_pin_r1_range[] = {static const unsigned int mt7988_pull_type[] = {/*0*/ MTK_PULL_PUPD_R1R0_TYPE,/*1*/ /*2*/ MTK_PULL_PUPD_R1R0_TYPE,/*3*/ /*4*/ MTK_PULL_PUPD_R1R0_TYPE,/*5*/ /*6*/ MTK_PULL_PU_PD_TYPE, /*7*/ /*8*/ MTK_PULL_PU_PD_TYPE, /*9*/ /*10*/ MTK_PULL_PUPD_R1R0_TYPE,/*11*/ /*12*/ MTK_PULL_PU_PD_TYPE, /*13*/ /*14*/ MTK_PULL_PD_TYPE, /*15*/ /*16*/ MTK_PULL_PD_TYPE, /*17*/ /*18*/ MTK_PULL_PUPD_R1R0_TYPE,/*19*/ /*20*/ MTK_PULL_PUPD_R1R0_TYPE,/*21*/ /*22*/ MTK_PULL_PUPD_R1R0_TYPE,/*23*/ /*24*/ MTK_PULL_PUPD_R1R0_TYPE,/*25*/ /*26*/ MTK_PULL_PUPD_R1R0_TYPE,/*27*/ /*28*/ MTK_PULL_PUPD_R1R0_TYPE,/*29*/ /*30*/ MTK_PULL_PUPD_R1R0_TYPE,/*31*/ /*32*/ MTK_PULL_PUPD_R1R0_TYPE,/*33*/ /*34*/ MTK_PULL_PUPD_R1R0_TYPE,/*35*/ /*36*/ MTK_PULL_PUPD_R1R0_TYPE,/*37*/ /*38*/ MTK_PULL_PUPD_R1R0_TYPE,/*39*/ /*40*/ MTK_PULL_PUPD_R1R0_TYPE,/*41*/ /*42*/ MTK_PULL_PUPD_R1R0_TYPE,/*43*/ /*44*/ MTK_PULL_PUPD_R1R0_TYPE,/*45*/ /*46*/ MTK_PULL_PUPD_R1R0_TYPE,/*47*/ /*48*/ MTK_PULL_PUPD_R1R0_TYPE,/*49*/ /*50*/ MTK_PULL_PUPD_R1R0_TYPE,/*51*/ /*52*/ MTK_PULL_PUPD_R1R0_TYPE,/*53*/ /*54*/ MTK_PULL_PUPD_R1R0_TYPE,/*55*/ /*56*/ MTK_PULL_PUPD_R1R0_TYPE,/*57*/ /*58*/ MTK_PULL_PUPD_R1R0_TYPE,/*59*/ /*60*/ MTK_PULL_PUPD_R1R0_TYPE,/*61*/ /*62*/ MTK_PULL_PU_PD_TYPE, /*63*/ /*64*/ MTK_PULL_PUPD_R1R0_TYPE,/*65*/ /*66*/ MTK_PULL_PUPD_R1R0_TYPE,/*67*/ /*68*/ MTK_PULL_PUPD_R1R0_TYPE,/*69*/ /*70*/ MTK_PULL_PD_TYPE, /*71*/ /*72*/ MTK_PULL_PUPD_R1R0_TYPE,/*73*/ /*74*/ MTK_PULL_PU_PD_TYPE, /*75*/ /*76*/ MTK_PULL_PU_PD_TYPE, /*77*/ /*78*/ MTK_PULL_PU_PD_TYPE, /*79*/ /*80*/ MTK_PULL_PUPD_R1R0_TYPE,/*81*/ /*82*/ MTK_PULL_PUPD_R1R0_TYPE,/*83*/ static const struct mtk_pin_reg_calc mt7988_reg_cals[] = {static const struct mtk_pin_desc mt7988_pins[] = {"UART2_RXD" ),"UART2_TXD" ),"UART2_CTS" ),"UART2_RTS" ),"GPIO_A" ),"SMI_0_MDC" ),"SMI_0_MDIO" ),"PCIE30_2L_0_WAKE_N" ),"PCIE30_2L_0_CLKREQ_N" ),"PCIE30_1L_1_WAKE_N" ),"PCIE30_1L_1_CLKREQ_N" ),"GPIO_P" ),"WATCHDOG" ),"GPIO_RESET" ),"GPIO_WPS" ),"PMIC_I2C_SCL" ),"PMIC_I2C_SDA" ),"I2C_1_SCL" ),"I2C_1_SDA" ),"PCIE30_2L_0_PRESET_N" ),"PCIE30_1L_1_PRESET_N" ),"PWMD1" ),"SPI0_WP" ),"SPI0_HOLD" ),"SPI0_CSB" ),"SPI0_MISO" ),"SPI0_MOSI" ),"SPI0_CLK" ),"SPI1_CSB" ),"SPI1_MISO" ),"SPI1_MOSI" ),"SPI1_CLK" ),"SPI2_CLK" ),"SPI2_MOSI" ),"SPI2_MISO" ),"SPI2_CSB" ),"SPI2_HOLD" ),"SPI2_WP" ),"EMMC_RSTB" ),"EMMC_DSL" ),"EMMC_CK" ),"EMMC_CMD" ),"EMMC_DATA_7" ),"EMMC_DATA_6" ),"EMMC_DATA_5" ),"EMMC_DATA_4" ),"EMMC_DATA_3" ),"EMMC_DATA_2" ),"EMMC_DATA_1" ),"EMMC_DATA_0" ),"PCM_FS_I2S_LRCK" ),"PCM_CLK_I2S_BCLK" ),"PCM_DRX_I2S_DIN" ),"PCM_DTX_I2S_DOUT" ),"PCM_MCK_I2S_MCLK" ),"UART0_RXD" ),"UART0_TXD" ),"PWMD0" ),"JTAG_JTDI" ),"JTAG_JTDO" ),"JTAG_JTMS" ),"JTAG_JTCLK" ),"JTAG_JTRST_N" ),"USB_DRV_VBUS_P1" ),"LED_A" ),"LED_B" ),"LED_C" ),"LED_D" ),"LED_E" ),"GPIO_B" ),"GPIO_C" ),"I2C_2_SCL" ),"I2C_2_SDA" ),"PCIE30_2L_1_PRESET_N" ),"PCIE30_1L_0_PRESET_N" ),"PCIE30_2L_1_WAKE_N" ),"PCIE30_2L_1_CLKREQ_N" ),"PCIE30_1L_0_WAKE_N" ),"PCIE30_1L_0_CLKREQ_N" ),"USB_DRV_VBUS_P0" ),"UART1_RXD" ),"UART1_TXD" ),"UART1_CTS" ),"UART1_RTS" ),/* jtag */ static const int mt7988_tops_jtag0_0_pins[] = { 0, 1, 2, 3, 4 };static int mt7988_tops_jtag0_0_funcs[] = { 2, 2, 2, 2, 2 };static const int mt7988_wo0_jtag_pins[] = { 50, 51, 52, 53, 54 };static int mt7988_wo0_jtag_funcs[] = { 3, 3, 3, 3, 3 };static const int mt7988_wo1_jtag_pins[] = { 50, 51, 52, 53, 54 };static int mt7988_wo1_jtag_funcs[] = { 4, 4, 4, 4, 4 };static const int mt7988_wo2_jtag_pins[] = { 50, 51, 52, 53, 54 };static int mt7988_wo2_jtag_funcs[] = { 5, 5, 5, 5, 5 };static const int mt7988_jtag_pins[] = { 58, 59, 60, 61, 62 };static int mt7988_jtag_funcs[] = { 1, 1, 1, 1, 1 };static const int mt7988_tops_jtag0_1_pins[] = { 58, 59, 60, 61, 62 };static int mt7988_tops_jtag0_1_funcs[] = { 4, 4, 4, 4, 4 };/* int_usxgmii */ static const int mt7988_int_usxgmii_pins[] = { 2, 3 };static int mt7988_int_usxgmii_funcs[] = { 3, 3 };/* pwm */ static const int mt7988_pwm0_pins[] = { 57 };static int mt7988_pwm0_funcs[] = { 1 };static const int mt7988_pwm1_pins[] = { 21 };static int mt7988_pwm1_funcs[] = { 1 };static const int mt7988_pwm2_pins[] = { 80 };static int mt7988_pwm2_funcs[] = { 2 };static const int mt7988_pwm2_0_pins[] = { 58 };static int mt7988_pwm2_0_funcs[] = { 5 };static const int mt7988_pwm3_pins[] = { 81 };static int mt7988_pwm3_funcs[] = { 2 };static const int mt7988_pwm3_0_pins[] = { 59 };static int mt7988_pwm3_0_funcs[] = { 5 };static const int mt7988_pwm4_pins[] = { 82 };static int mt7988_pwm4_funcs[] = { 2 };static const int mt7988_pwm4_0_pins[] = { 60 };static int mt7988_pwm4_0_funcs[] = { 5 };static const int mt7988_pwm5_pins[] = { 83 };static int mt7988_pwm5_funcs[] = { 2 };static const int mt7988_pwm5_0_pins[] = { 61 };static int mt7988_pwm5_0_funcs[] = { 5 };static const int mt7988_pwm6_pins[] = { 69 };static int mt7988_pwm6_funcs[] = { 3 };static const int mt7988_pwm6_0_pins[] = { 62 };static int mt7988_pwm6_0_funcs[] = { 5 };static const int mt7988_pwm7_pins[] = { 70 };static int mt7988_pwm7_funcs[] = { 3 };static const int mt7988_pwm7_0_pins[] = { 4 };static int mt7988_pwm7_0_funcs[] = { 3 };/* dfd */ static const int mt7988_dfd_pins[] = { 0, 1, 2, 3, 4 };static int mt7988_dfd_funcs[] = { 4, 4, 4, 4, 4 };/* i2c */ static const int mt7988_xfi_phy0_i2c0_pins[] = { 0, 1 };static int mt7988_xfi_phy0_i2c0_funcs[] = { 5, 5 };static const int mt7988_xfi_phy1_i2c0_pins[] = { 0, 1 };static int mt7988_xfi_phy1_i2c0_funcs[] = { 6, 6 };static const int mt7988_xfi_phy_pll_i2c0_pins[] = { 3, 4 };static int mt7988_xfi_phy_pll_i2c0_funcs[] = { 5, 5 };static const int mt7988_xfi_phy_pll_i2c1_pins[] = { 3, 4 };static int mt7988_xfi_phy_pll_i2c1_funcs[] = { 6, 6 };static const int mt7988_i2c0_0_pins[] = { 5, 6 };static int mt7988_i2c0_0_funcs[] = { 2, 2 };static const int mt7988_i2c1_sfp_pins[] = { 5, 6 };static int mt7988_i2c1_sfp_funcs[] = { 4, 4 };static const int mt7988_xfi_pextp_phy0_i2c_pins[] = { 5, 6 };static int mt7988_xfi_pextp_phy0_i2c_funcs[] = { 5, 5 };static const int mt7988_xfi_pextp_phy1_i2c_pins[] = { 5, 6 };static int mt7988_xfi_pextp_phy1_i2c_funcs[] = { 6, 6 };static const int mt7988_i2c0_1_pins[] = { 15, 16 };static int mt7988_i2c0_1_funcs[] = { 1, 1 };static const int mt7988_u30_phy_i2c0_pins[] = { 15, 16 };static int mt7988_u30_phy_i2c0_funcs[] = { 2, 2 };static const int mt7988_u32_phy_i2c0_pins[] = { 15, 16 };static int mt7988_u32_phy_i2c0_funcs[] = { 3, 3 };static const int mt7988_xfi_phy0_i2c1_pins[] = { 15, 16 };static int mt7988_xfi_phy0_i2c1_funcs[] = { 5, 5 };static const int mt7988_xfi_phy1_i2c1_pins[] = { 15, 16 };static int mt7988_xfi_phy1_i2c1_funcs[] = { 6, 6 };static const int mt7988_xfi_phy_pll_i2c2_pins[] = { 15, 16 };static int mt7988_xfi_phy_pll_i2c2_funcs[] = { 7, 7 };static const int mt7988_i2c1_0_pins[] = { 17, 18 };static int mt7988_i2c1_0_funcs[] = { 1, 1 };static const int mt7988_u30_phy_i2c1_pins[] = { 17, 18 };static int mt7988_u30_phy_i2c1_funcs[] = { 2, 2 };static const int mt7988_u32_phy_i2c1_pins[] = { 17, 18 };static int mt7988_u32_phy_i2c1_funcs[] = { 3, 3 };static const int mt7988_xfi_phy_pll_i2c3_pins[] = { 17, 18 };static int mt7988_xfi_phy_pll_i2c3_funcs[] = { 4, 4 };static const int mt7988_sgmii0_i2c_pins[] = { 17, 18 };static int mt7988_sgmii0_i2c_funcs[] = { 5, 5 };static const int mt7988_sgmii1_i2c_pins[] = { 17, 18 };static int mt7988_sgmii1_i2c_funcs[] = { 6, 6 };static const int mt7988_i2c1_2_pins[] = { 69, 70 };static int mt7988_i2c1_2_funcs[] = { 2, 2 };static const int mt7988_i2c2_0_pins[] = { 69, 70 };static int mt7988_i2c2_0_funcs[] = { 4, 4 };static const int mt7988_i2c2_1_pins[] = { 71, 72 };static int mt7988_i2c2_1_funcs[] = { 1, 1 };/* eth */ static const int mt7988_mdc_mdio0_pins[] = { 5, 6 };static int mt7988_mdc_mdio0_funcs[] = { 1, 1 };static const int mt7988_2p5g_ext_mdio_pins[] = { 28, 29 };static int mt7988_2p5g_ext_mdio_funcs[] = { 6, 6 };static const int mt7988_gbe_ext_mdio_pins[] = { 30, 31 };static int mt7988_gbe_ext_mdio_funcs[] = { 6, 6 };static const int mt7988_mdc_mdio1_pins[] = { 69, 70 };static int mt7988_mdc_mdio1_funcs[] = { 1, 1 };/* pcie */ static const int mt7988_pcie_wake_n0_0_pins[] = { 7 };static int mt7988_pcie_wake_n0_0_funcs[] = { 1 };static const int mt7988_pcie_clk_req_n0_0_pins[] = { 8 };static int mt7988_pcie_clk_req_n0_0_funcs[] = { 1 };static const int mt7988_pcie_wake_n3_0_pins[] = { 9 };static int mt7988_pcie_wake_n3_0_funcs[] = { 1 };static const int mt7988_pcie_clk_req_n3_pins[] = { 10 };static int mt7988_pcie_clk_req_n3_funcs[] = { 1 };static const int mt7988_pcie_clk_req_n0_1_pins[] = { 10 };static int mt7988_pcie_clk_req_n0_1_funcs[] = { 2 };static const int mt7988_pcie_p0_phy_i2c_pins[] = { 7, 8 };static int mt7988_pcie_p0_phy_i2c_funcs[] = { 3, 3 };static const int mt7988_pcie_p1_phy_i2c_pins[] = { 7, 8 };static int mt7988_pcie_p1_phy_i2c_funcs[] = { 4, 4 };static const int mt7988_pcie_p3_phy_i2c_pins[] = { 9, 10 };static int mt7988_pcie_p3_phy_i2c_funcs[] = { 4, 4 };static const int mt7988_pcie_p2_phy_i2c_pins[] = { 7, 8 };static int mt7988_pcie_p2_phy_i2c_funcs[] = { 5, 5 };static const int mt7988_ckm_phy_i2c_pins[] = { 9, 10 };static int mt7988_ckm_phy_i2c_funcs[] = { 5, 5 };static const int mt7988_pcie_wake_n0_1_pins[] = { 13 };static int mt7988_pcie_wake_n0_1_funcs[] = { 2 };static const int mt7988_pcie_wake_n3_1_pins[] = { 14 };static int mt7988_pcie_wake_n3_1_funcs[] = { 2 };static const int mt7988_pcie_2l_0_pereset_pins[] = { 19 };static int mt7988_pcie_2l_0_pereset_funcs[] = { 1 };static const int mt7988_pcie_1l_1_pereset_pins[] = { 20 };static int mt7988_pcie_1l_1_pereset_funcs[] = { 1 };static const int mt7988_pcie_clk_req_n2_1_pins[] = { 63 };static int mt7988_pcie_clk_req_n2_1_funcs[] = { 2 };static const int mt7988_pcie_2l_1_pereset_pins[] = { 73 };static int mt7988_pcie_2l_1_pereset_funcs[] = { 1 };static const int mt7988_pcie_1l_0_pereset_pins[] = { 74 };static int mt7988_pcie_1l_0_pereset_funcs[] = { 1 };static const int mt7988_pcie_wake_n1_0_pins[] = { 75 };static int mt7988_pcie_wake_n1_0_funcs[] = { 1 };static const int mt7988_pcie_clk_req_n1_pins[] = { 76 };static int mt7988_pcie_clk_req_n1_funcs[] = { 1 };static const int mt7988_pcie_wake_n2_0_pins[] = { 77 };static int mt7988_pcie_wake_n2_0_funcs[] = { 1 };static const int mt7988_pcie_clk_req_n2_0_pins[] = { 78 };static int mt7988_pcie_clk_req_n2_0_funcs[] = { 1 };static const int mt7988_pcie_wake_n2_1_pins[] = { 79 };static int mt7988_pcie_wake_n2_1_funcs[] = { 2 };/* pmic */ static const int mt7988_pmic_pins[] = { 11 };static int mt7988_pmic_funcs[] = { 1 };/* watchdog */ static const int mt7988_watchdog_pins[] = { 12 };static int mt7988_watchdog_funcs[] = { 1 };/* spi */ static const int mt7988_spi0_wp_hold_pins[] = { 22, 23 };static int mt7988_spi0_wp_hold_funcs[] = { 1, 1 };static const int mt7988_spi0_pins[] = { 24, 25, 26, 27 };static int mt7988_spi0_funcs[] = { 1, 1, 1, 1 };static const int mt7988_spi1_pins[] = { 28, 29, 30, 31 };static int mt7988_spi1_funcs[] = { 1, 1, 1, 1 };static const int mt7988_spi2_pins[] = { 32, 33, 34, 35 };static int mt7988_spi2_funcs[] = { 1, 1, 1, 1 };static const int mt7988_spi2_wp_hold_pins[] = { 36, 37 };static int mt7988_spi2_wp_hold_funcs[] = { 1, 1 };/* flash */ static const int mt7988_snfi_pins[] = { 22, 23, 24, 25, 26, 27 };static int mt7988_snfi_funcs[] = { 2, 2, 2, 2, 2, 2 };static const int mt7988_emmc_45_pins[] = {static int mt7988_emmc_45_funcs[] = { 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5 };static const int mt7988_sdcard_pins[] = { 32, 33, 34, 35, 36, 37 };static int mt7988_sdcard_funcs[] = { 5, 5, 5, 5, 5, 5 };static const int mt7988_emmc_51_pins[] = { 38, 39, 40, 41, 42, 43,static int mt7988_emmc_51_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 };/* uart */ static const int mt7988_uart2_pins[] = { 0, 1, 2, 3 };static int mt7988_uart2_funcs[] = { 1, 1, 1, 1 };static const int mt7988_tops_uart0_0_pins[] = { 22, 23 };static int mt7988_tops_uart0_0_funcs[] = { 3, 3 };static const int mt7988_uart2_0_pins[] = { 28, 29, 30, 31 };static int mt7988_uart2_0_funcs[] = { 2, 2, 2, 2 };static const int mt7988_uart1_0_pins[] = { 32, 33, 34, 35 };static int mt7988_uart1_0_funcs[] = { 2, 2, 2, 2 };static const int mt7988_uart2_1_pins[] = { 32, 33, 34, 35 };static int mt7988_uart2_1_funcs[] = { 3, 3, 3, 3 };static const int mt7988_net_wo0_uart_txd_0_pins[] = { 28 };static int mt7988_net_wo0_uart_txd_0_funcs[] = { 3 };static const int mt7988_net_wo1_uart_txd_0_pins[] = { 29 };static int mt7988_net_wo1_uart_txd_0_funcs[] = { 3 };static const int mt7988_net_wo2_uart_txd_0_pins[] = { 30 };static int mt7988_net_wo2_uart_txd_0_funcs[] = { 3 };static const int mt7988_tops_uart1_0_pins[] = { 28, 29 };static int mt7988_tops_uart1_0_funcs[] = { 4, 4 };static const int mt7988_tops_uart0_1_pins[] = { 30, 31 };static int mt7988_tops_uart0_1_funcs[] = { 4, 4 };static const int mt7988_tops_uart1_1_pins[] = { 36, 37 };static int mt7988_tops_uart1_1_funcs[] = { 3, 3 };static const int mt7988_uart0_pins[] = { 55, 56 };static int mt7988_uart0_funcs[] = { 1, 1 };static const int mt7988_tops_uart0_2_pins[] = { 55, 56 };static int mt7988_tops_uart0_2_funcs[] = { 2, 2 };static const int mt7988_uart2_2_pins[] = { 50, 51, 52, 53 };static int mt7988_uart2_2_funcs[] = { 2, 2, 2, 2 };static const int mt7988_uart1_1_pins[] = { 58, 59, 60, 61 };static int mt7988_uart1_1_funcs[] = { 2, 2, 2, 2 };static const int mt7988_uart2_3_pins[] = { 58, 59, 60, 61 };static int mt7988_uart2_3_funcs[] = { 3, 3, 3, 3 };static const int mt7988_uart1_2_pins[] = { 80, 81, 82, 83 };static int mt7988_uart1_2_funcs[] = { 1, 1, 1, 1 };static const int mt7988_uart1_2_lite_pins[] = { 80, 81 };static int mt7988_uart1_2_lite_funcs[] = { 1, 1 };static const int mt7988_tops_uart1_2_pins[] = { 80, 81 };static int mt7988_tops_uart1_2_funcs[] = { 4, 4, };static const int mt7988_net_wo0_uart_txd_1_pins[] = { 80 };static int mt7988_net_wo0_uart_txd_1_funcs[] = { 3 };static const int mt7988_net_wo1_uart_txd_1_pins[] = { 81 };static int mt7988_net_wo1_uart_txd_1_funcs[] = { 3 };static const int mt7988_net_wo2_uart_txd_1_pins[] = { 82 };static int mt7988_net_wo2_uart_txd_1_funcs[] = { 3 };/* udi */ static const int mt7988_udi_pins[] = { 32, 33, 34, 35, 36 };static int mt7988_udi_funcs[] = { 4, 4, 4, 4, 4 };/* i2s */ static const int mt7988_i2s_pins[] = { 50, 51, 52, 53, 54 };static int mt7988_i2s_funcs[] = { 1, 1, 1, 1, 1 };/* pcm */ static const int mt7988_pcm_pins[] = { 50, 51, 52, 53 };static int mt7988_pcm_funcs[] = { 1, 1, 1, 1 };/* led */ static const int mt7988_gbe0_led1_pins[] = { 58 };static int mt7988_gbe0_led1_funcs[] = { 6 };static const int mt7988_gbe1_led1_pins[] = { 59 };static int mt7988_gbe1_led1_funcs[] = { 6 };static const int mt7988_gbe2_led1_pins[] = { 60 };static int mt7988_gbe2_led1_funcs[] = { 6 };static const int mt7988_gbe3_led1_pins[] = { 61 };static int mt7988_gbe3_led1_funcs[] = { 6 };static const int mt7988_2p5gbe_led1_pins[] = { 62 };static int mt7988_2p5gbe_led1_funcs[] = { 6 };static const int mt7988_gbe0_led0_pins[] = { 64 };static int mt7988_gbe0_led0_funcs[] = { 1 };static const int mt7988_gbe1_led0_pins[] = { 65 };static int mt7988_gbe1_led0_funcs[] = { 1 };static const int mt7988_gbe2_led0_pins[] = { 66 };static int mt7988_gbe2_led0_funcs[] = { 1 };static const int mt7988_gbe3_led0_pins[] = { 67 };static int mt7988_gbe3_led0_funcs[] = { 1 };static const int mt7988_2p5gbe_led0_pins[] = { 68 };static int mt7988_2p5gbe_led0_funcs[] = { 1 };/* usb */ static const int mt7988_drv_vbus_p1_pins[] = { 63 };static int mt7988_drv_vbus_p1_funcs[] = { 1 };static const int mt7988_drv_vbus_pins[] = { 79 };static int mt7988_drv_vbus_funcs[] = { 1 };static const struct group_desc mt7988_groups[] = {/* @GPIO(0,1,2,3): uart2 */ "uart2" , mt7988_uart2),/* @GPIO(0,1,2,3,4): tops_jtag0_0 */ "tops_jtag0_0" , mt7988_tops_jtag0_0),/* @GPIO(2,3): int_usxgmii */ "int_usxgmii" , mt7988_int_usxgmii),/* @GPIO(0,1,2,3,4): dfd */ "dfd" , mt7988_dfd),/* @GPIO(0,1): xfi_phy0_i2c0 */ "xfi_phy0_i2c0" , mt7988_xfi_phy0_i2c0),/* @GPIO(0,1): xfi_phy1_i2c0 */ "xfi_phy1_i2c0" , mt7988_xfi_phy1_i2c0),/* @GPIO(3,4): xfi_phy_pll_i2c0 */ "xfi_phy_pll_i2c0" , mt7988_xfi_phy_pll_i2c0),/* @GPIO(3,4): xfi_phy_pll_i2c1 */ "xfi_phy_pll_i2c1" , mt7988_xfi_phy_pll_i2c1),/* @GPIO(4): pwm7 */ "pwm7_0" , mt7988_pwm7_0),/* @GPIO(5,6) i2c0_0 */ "i2c0_0" , mt7988_i2c0_0),/* @GPIO(5,6) i2c1_sfp */ "i2c1_sfp" , mt7988_i2c1_sfp),/* @GPIO(5,6) xfi_pextp_phy0_i2c */ "xfi_pextp_phy0_i2c" , mt7988_xfi_pextp_phy0_i2c),/* @GPIO(5,6) xfi_pextp_phy1_i2c */ "xfi_pextp_phy1_i2c" , mt7988_xfi_pextp_phy1_i2c),/* @GPIO(5,6) mdc_mdio0 */ "mdc_mdio0" , mt7988_mdc_mdio0),/* @GPIO(7): pcie_wake_n0_0 */ "pcie_wake_n0_0" , mt7988_pcie_wake_n0_0),/* @GPIO(8): pcie_clk_req_n0_0 */ "pcie_clk_req_n0_0" , mt7988_pcie_clk_req_n0_0),/* @GPIO(9): pcie_wake_n3_0 */ "pcie_wake_n3_0" , mt7988_pcie_wake_n3_0),/* @GPIO(10): pcie_clk_req_n3 */ "pcie_clk_req_n3" , mt7988_pcie_clk_req_n3),/* @GPIO(10): pcie_clk_req_n0_1 */ "pcie_clk_req_n0_1" , mt7988_pcie_clk_req_n0_1),/* @GPIO(7,8) pcie_p0_phy_i2c */ "pcie_p0_phy_i2c" , mt7988_pcie_p0_phy_i2c),/* @GPIO(7,8) pcie_p1_phy_i2c */ "pcie_p1_phy_i2c" , mt7988_pcie_p1_phy_i2c),/* @GPIO(7,8) pcie_p2_phy_i2c */ "pcie_p2_phy_i2c" , mt7988_pcie_p2_phy_i2c),/* @GPIO(9,10) pcie_p3_phy_i2c */ "pcie_p3_phy_i2c" , mt7988_pcie_p3_phy_i2c),/* @GPIO(9,10) ckm_phy_i2c */ "ckm_phy_i2c" , mt7988_ckm_phy_i2c),/* @GPIO(11): pmic */ "pcie_pmic" , mt7988_pmic),/* @GPIO(12): watchdog */ "watchdog" , mt7988_watchdog),/* @GPIO(13): pcie_wake_n0_1 */ "pcie_wake_n0_1" , mt7988_pcie_wake_n0_1),/* @GPIO(14): pcie_wake_n3_1 */ "pcie_wake_n3_1" , mt7988_pcie_wake_n3_1),/* @GPIO(15,16) i2c0_1 */ "i2c0_1" , mt7988_i2c0_1),/* @GPIO(15,16) u30_phy_i2c0 */ "u30_phy_i2c0" , mt7988_u30_phy_i2c0),/* @GPIO(15,16) u32_phy_i2c0 */ "u32_phy_i2c0" , mt7988_u32_phy_i2c0),/* @GPIO(15,16) xfi_phy0_i2c1 */ "xfi_phy0_i2c1" , mt7988_xfi_phy0_i2c1),/* @GPIO(15,16) xfi_phy1_i2c1 */ "xfi_phy1_i2c1" , mt7988_xfi_phy1_i2c1),/* @GPIO(15,16) xfi_phy_pll_i2c2 */ "xfi_phy_pll_i2c2" , mt7988_xfi_phy_pll_i2c2),/* @GPIO(17,18) i2c1_0 */ "i2c1_0" , mt7988_i2c1_0),/* @GPIO(17,18) u30_phy_i2c1 */ "u30_phy_i2c1" , mt7988_u30_phy_i2c1),/* @GPIO(17,18) u32_phy_i2c1 */ "u32_phy_i2c1" , mt7988_u32_phy_i2c1),/* @GPIO(17,18) xfi_phy_pll_i2c3 */ "xfi_phy_pll_i2c3" , mt7988_xfi_phy_pll_i2c3),/* @GPIO(17,18) sgmii0_i2c */ "sgmii0_i2c" , mt7988_sgmii0_i2c),/* @GPIO(17,18) sgmii1_i2c */ "sgmii1_i2c" , mt7988_sgmii1_i2c),/* @GPIO(19): pcie_2l_0_pereset */ "pcie_2l_0_pereset" , mt7988_pcie_2l_0_pereset),/* @GPIO(20): pcie_1l_1_pereset */ "pcie_1l_1_pereset" , mt7988_pcie_1l_1_pereset),/* @GPIO(21): pwm1 */ "pwm1" , mt7988_pwm1),/* @GPIO(22,23) spi0_wp_hold */ "spi0_wp_hold" , mt7988_spi0_wp_hold),/* @GPIO(24,25,26,27) spi0 */ "spi0" , mt7988_spi0),/* @GPIO(28,29,30,31) spi1 */ "spi1" , mt7988_spi1),/* @GPIO(32,33,34,35) spi2 */ "spi2" , mt7988_spi2),/* @GPIO(36,37) spi2_wp_hold */ "spi2_wp_hold" , mt7988_spi2_wp_hold),/* @GPIO(22,23,24,25,26,27) snfi */ "snfi" , mt7988_snfi),/* @GPIO(22,23) tops_uart0_0 */ "tops_uart0_0" , mt7988_tops_uart0_0),/* @GPIO(28,29,30,31) uart2_0 */ "uart2_0" , mt7988_uart2_0),/* @GPIO(32,33,34,35) uart1_0 */ "uart1_0" , mt7988_uart1_0),/* @GPIO(32,33,34,35) uart2_1 */ "uart2_1" , mt7988_uart2_1),/* @GPIO(28) net_wo0_uart_txd_0 */ "net_wo0_uart_txd_0" , mt7988_net_wo0_uart_txd_0),/* @GPIO(29) net_wo1_uart_txd_0 */ "net_wo1_uart_txd_0" , mt7988_net_wo1_uart_txd_0),/* @GPIO(30) net_wo2_uart_txd_0 */ "net_wo2_uart_txd_0" , mt7988_net_wo2_uart_txd_0),/* @GPIO(28,29) tops_uart1_0 */ "tops_uart0_0" , mt7988_tops_uart1_0),/* @GPIO(30,31) tops_uart0_1 */ "tops_uart0_1" , mt7988_tops_uart0_1),/* @GPIO(36,37) tops_uart1_1 */ "tops_uart1_1" , mt7988_tops_uart1_1),/* @GPIO(32,33,34,35,36) udi */ "udi" , mt7988_udi),/* @GPIO(21,28,29,30,31,32,33,34,35,36,37) emmc_45 */ "emmc_45" , mt7988_emmc_45),/* @GPIO(32,33,34,35,36,37) sdcard */ "sdcard" , mt7988_sdcard),/* @GPIO(38,39,40,41,42,43,44,45,46,47,48,49) emmc_51 */ "emmc_51" , mt7988_emmc_51),/* @GPIO(28,29) 2p5g_ext_mdio */ "2p5g_ext_mdio" , mt7988_2p5g_ext_mdio),/* @GPIO(30,31) gbe_ext_mdio */ "gbe_ext_mdio" , mt7988_gbe_ext_mdio),/* @GPIO(50,51,52,53,54) i2s */ "i2s" , mt7988_i2s),/* @GPIO(50,51,52,53) pcm */ "pcm" , mt7988_pcm),/* @GPIO(55,56) uart0 */ "uart0" , mt7988_uart0),/* @GPIO(55,56) tops_uart0_2 */ "tops_uart0_2" , mt7988_tops_uart0_2),/* @GPIO(50,51,52,53) uart2_2 */ "uart2_2" , mt7988_uart2_2),/* @GPIO(50,51,52,53,54) wo0_jtag */ "wo0_jtag" , mt7988_wo0_jtag),/* @GPIO(50,51,52,53,54) wo1-wo1_jtag */ "wo1_jtag" , mt7988_wo1_jtag),/* @GPIO(50,51,52,53,54) wo2_jtag */ "wo2_jtag" , mt7988_wo2_jtag),/* @GPIO(57) pwm0 */ "pwm0" , mt7988_pwm0),/* @GPIO(58) pwm2_0 */ "pwm2_0" , mt7988_pwm2_0),/* @GPIO(59) pwm3_0 */ "pwm3_0" , mt7988_pwm3_0),/* @GPIO(60) pwm4_0 */ "pwm4_0" , mt7988_pwm4_0),/* @GPIO(61) pwm5_0 */ "pwm5_0" , mt7988_pwm5_0),/* @GPIO(58,59,60,61,62) jtag */ "jtag" , mt7988_jtag),/* @GPIO(58,59,60,61,62) tops_jtag0_1 */ "tops_jtag0_1" , mt7988_tops_jtag0_1),/* @GPIO(58,59,60,61) uart2_3 */ "uart2_3" , mt7988_uart2_3),/* @GPIO(58,59,60,61) uart1_1 */ "uart1_1" , mt7988_uart1_1),/* @GPIO(58,59,60,61) gbe_led1 */ "gbe0_led1" , mt7988_gbe0_led1),"gbe1_led1" , mt7988_gbe1_led1),"gbe2_led1" , mt7988_gbe2_led1),"gbe3_led1" , mt7988_gbe3_led1),/* @GPIO(62) pwm6_0 */ "pwm6_0" , mt7988_pwm6_0),/* @GPIO(62) 2p5gbe_led1 */ "2p5gbe_led1" , mt7988_2p5gbe_led1),/* @GPIO(64,65,66,67) gbe_led0 */ "gbe0_led0" , mt7988_gbe0_led0),"gbe1_led0" , mt7988_gbe1_led0),"gbe2_led0" , mt7988_gbe2_led0),"gbe3_led0" , mt7988_gbe3_led0),/* @GPIO(68) 2p5gbe_led0 */ "2p5gbe_led0" , mt7988_2p5gbe_led0),/* @GPIO(63) drv_vbus_p1 */ "drv_vbus_p1" , mt7988_drv_vbus_p1),/* @GPIO(63) pcie_clk_req_n2_1 */ "pcie_clk_req_n2_1" , mt7988_pcie_clk_req_n2_1),/* @GPIO(69, 70) mdc_mdio1 */ "mdc_mdio1" , mt7988_mdc_mdio1),/* @GPIO(69, 70) i2c1_2 */ "i2c1_2" , mt7988_i2c1_2),/* @GPIO(69) pwm6 */ "pwm6" , mt7988_pwm6),/* @GPIO(70) pwm7 */ "pwm7" , mt7988_pwm7),/* @GPIO(69,70) i2c2_0 */ "i2c2_0" , mt7988_i2c2_0),/* @GPIO(71,72) i2c2_1 */ "i2c2_1" , mt7988_i2c2_1),/* @GPIO(73) pcie_2l_1_pereset */ "pcie_2l_1_pereset" , mt7988_pcie_2l_1_pereset),/* @GPIO(74) pcie_1l_0_pereset */ "pcie_1l_0_pereset" , mt7988_pcie_1l_0_pereset),/* @GPIO(75) pcie_wake_n1_0 */ "pcie_wake_n1_0" , mt7988_pcie_wake_n1_0),/* @GPIO(76) pcie_clk_req_n1 */ "pcie_clk_req_n1" , mt7988_pcie_clk_req_n1),/* @GPIO(77) pcie_wake_n2_0 */ "pcie_wake_n2_0" , mt7988_pcie_wake_n2_0),/* @GPIO(78) pcie_clk_req_n2_0 */ "pcie_clk_req_n2_0" , mt7988_pcie_clk_req_n2_0),/* @GPIO(79) drv_vbus */ "drv_vbus" , mt7988_drv_vbus),/* @GPIO(79) pcie_wake_n2_1 */ "pcie_wake_n2_1" , mt7988_pcie_wake_n2_1),/* @GPIO(80,81,82,83) uart1_2 */ "uart1_2" , mt7988_uart1_2),/* @GPIO(80,81) uart1_2_lite */ "uart1_2_lite" , mt7988_uart1_2_lite),/* @GPIO(80) pwm2 */ "pwm2" , mt7988_pwm2),/* @GPIO(81) pwm3 */ "pwm3" , mt7988_pwm3),/* @GPIO(82) pwm4 */ "pwm4" , mt7988_pwm4),/* @GPIO(83) pwm5 */ "pwm5" , mt7988_pwm5),/* @GPIO(80) net_wo0_uart_txd_0 */ "net_wo0_uart_txd_0" , mt7988_net_wo0_uart_txd_0),/* @GPIO(81) net_wo1_uart_txd_0 */ "net_wo1_uart_txd_0" , mt7988_net_wo1_uart_txd_0),/* @GPIO(82) net_wo2_uart_txd_0 */ "net_wo2_uart_txd_0" , mt7988_net_wo2_uart_txd_0),/* @GPIO(80,81) tops_uart1_2 */ "tops_uart1_2" , mt7988_tops_uart1_2),/* @GPIO(80) net_wo0_uart_txd_1 */ "net_wo0_uart_txd_1" , mt7988_net_wo0_uart_txd_1),/* @GPIO(81) net_wo1_uart_txd_1 */ "net_wo1_uart_txd_1" , mt7988_net_wo1_uart_txd_1),/* @GPIO(82) net_wo2_uart_txd_1 */ "net_wo2_uart_txd_1" , mt7988_net_wo2_uart_txd_1),/* Joint those groups owning the same capability in user point of view which * allows that people tend to use through the device tree. static const char * const mt7988_jtag_groups[] = {"tops_jtag0_0" , "wo0_jtag" , "wo1_jtag" ,"wo2_jtag" , "jtag" , "tops_jtag0_1" ,static const char * const mt7988_int_usxgmii_groups[] = {"int_usxgmii" ,static const char * const mt7988_pwm_groups[] = {"pwm0" , "pwm1" , "pwm2" , "pwm2_0" , "pwm3" , "pwm3_0" , "pwm4" , "pwm4_0" ,"pwm5" , "pwm5_0" , "pwm6" , "pwm6_0" , "pwm7" , "pwm7_0" ,static const char * const mt7988_dfd_groups[] = {"dfd" ,static const char * const mt7988_i2c_groups[] = {"xfi_phy0_i2c0" ,"xfi_phy1_i2c0" ,"xfi_phy_pll_i2c0" ,"xfi_phy_pll_i2c1" ,"i2c0_0" ,"i2c1_sfp" ,"xfi_pextp_phy0_i2c" ,"xfi_pextp_phy1_i2c" ,"i2c0_1" ,"u30_phy_i2c0" ,"u32_phy_i2c0" ,"xfi_phy0_i2c1" ,"xfi_phy1_i2c1" ,"xfi_phy_pll_i2c2" ,"i2c1_0" ,"u30_phy_i2c1" ,"u32_phy_i2c1" ,"xfi_phy_pll_i2c3" ,"sgmii0_i2c" ,"sgmii1_i2c" ,"i2c1_2" ,"i2c2_0" ,"i2c2_1" ,static const char * const mt7988_ethernet_groups[] = {"mdc_mdio0" ,"2p5g_ext_mdio" ,"gbe_ext_mdio" ,"mdc_mdio1" ,static const char * const mt7988_pcie_groups[] = {"pcie_wake_n0_0" , "pcie_clk_req_n0_0" , "pcie_wake_n3_0" ,"pcie_clk_req_n3" , "pcie_p0_phy_i2c" , "pcie_p1_phy_i2c" ,"pcie_p3_phy_i2c" , "pcie_p2_phy_i2c" , "ckm_phy_i2c" ,"pcie_wake_n0_1" , "pcie_wake_n3_1" , "pcie_2l_0_pereset" ,"pcie_1l_1_pereset" , "pcie_clk_req_n2_1" , "pcie_2l_1_pereset" ,"pcie_1l_0_pereset" , "pcie_wake_n1_0" , "pcie_clk_req_n1" ,"pcie_wake_n2_0" , "pcie_clk_req_n2_0" , "pcie_wake_n2_1" ,"pcie_clk_req_n0_1" static const char * const mt7988_pmic_groups[] = {"pmic" ,static const char * const mt7988_wdt_groups[] = {"watchdog" ,static const char * const mt7988_spi_groups[] = {"spi0" , "spi0_wp_hold" , "spi1" , "spi2" , "spi2_wp_hold" ,static const char * const mt7988_flash_groups[] = { "emmc_45" , "sdcard" , "snfi" ,"emmc_51" };static const char * const mt7988_uart_groups[] = {"uart2" ,"tops_uart0_0" ,"uart2_0" ,"uart1_0" ,"uart2_1" ,"net_wo0_uart_txd_0" ,"net_wo1_uart_txd_0" ,"net_wo2_uart_txd_0" ,"tops_uart1_0" ,"ops_uart0_1" ,"ops_uart1_1" ,"uart0" ,"tops_uart0_2" ,"uart1_1" ,"uart2_3" ,"uart1_2" ,"uart1_2_lite" ,"tops_uart1_2" ,"net_wo0_uart_txd_1" ,"net_wo1_uart_txd_1" ,"net_wo2_uart_txd_1" ,static const char * const mt7988_udi_groups[] = {"udi" ,static const char * const mt7988_audio_groups[] = {"i2s" , "pcm" ,static const char * const mt7988_led_groups[] = {"gbe0_led1" , "gbe1_led1" , "gbe2_led1" , "gbe3_led1" , "2p5gbe_led1" ,"gbe0_led0" , "gbe1_led0" , "gbe2_led0" , "gbe3_led0" , "2p5gbe_led0" ,"wf5g_led0" , "wf5g_led1" ,static const char * const mt7988_usb_groups[] = {"drv_vbus" ,"drv_vbus_p1" ,static const struct function_desc mt7988_functions[] = {"audio" , mt7988_audio_groups, ARRAY_SIZE(mt7988_audio_groups) },"jtag" , mt7988_jtag_groups, ARRAY_SIZE(mt7988_jtag_groups) },"int_usxgmii" , mt7988_int_usxgmii_groups,"pwm" , mt7988_pwm_groups, ARRAY_SIZE(mt7988_pwm_groups) }, NULL },"dfd" , mt7988_dfd_groups, ARRAY_SIZE(mt7988_dfd_groups) }, NULL },"i2c" , mt7988_i2c_groups, ARRAY_SIZE(mt7988_i2c_groups) }, NULL },"eth" , mt7988_ethernet_groups, ARRAY_SIZE(mt7988_ethernet_groups) },"pcie" , mt7988_pcie_groups, ARRAY_SIZE(mt7988_pcie_groups) },"pmic" , mt7988_pmic_groups, ARRAY_SIZE(mt7988_pmic_groups) },"watchdog" , mt7988_wdt_groups, ARRAY_SIZE(mt7988_wdt_groups) },"spi" , mt7988_spi_groups, ARRAY_SIZE(mt7988_spi_groups) }, NULL },"flash" , mt7988_flash_groups, ARRAY_SIZE(mt7988_flash_groups) },"uart" , mt7988_uart_groups, ARRAY_SIZE(mt7988_uart_groups) },"udi" , mt7988_udi_groups, ARRAY_SIZE(mt7988_udi_groups) }, NULL },"usb" , mt7988_usb_groups, ARRAY_SIZE(mt7988_usb_groups) }, NULL },"led" , mt7988_led_groups, ARRAY_SIZE(mt7988_led_groups) }, NULL },static const struct mtk_eint_hw mt7988_eint_hw = {static const char * const mt7988_pinctrl_register_base_names[] = {"gpio" , "iocfg_tr" , "iocfg_br" ,"iocfg_rb" , "iocfg_lb" , "iocfg_tl" ,static const struct mtk_pin_soc mt7988_data = {false ,static const struct of_device_id mt7988_pinctrl_of_match[] = {"mediatek,mt7988-pinctrl" },static int mt7988_pinctrl_probe(struct platform_device *pdev)return mtk_moore_pinctrl_probe(pdev, &mt7988_data);static struct platform_driver mt7988_pinctrl_driver = {"mt7988-pinctrl" ,static int __init mt7988_pinctrl_init(void )return platform_driver_register(&mt7988_pinctrl_driver);
Messung V0.5 C=94 H=95 G=94
