// SPDX-License-Identifier: GPL-2.0 // Copyright (c) 2018-2021, The Linux Foundation. All rights reserved. // Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. #define pr_fmt(fmt) "%s: " fmt, __func__#include <linux/err.h>#include <linux/kernel.h>#include <linux/module.h>#include <linux/of.h>#include <linux/platform_device.h>#include <linux/slab.h>#include <linux/string.h>#include <linux/regulator/driver.h>#include <linux/regulator/machine.h>#include <linux/regulator/of_regulator.h>#include <soc/qcom/cmd-db.h>#include <soc/qcom/rpmh.h>#include <dt-bindings/regulator/qcom,rpmh-regulator.h>/** * enum rpmh_regulator_type - supported RPMh accelerator types * @VRM: RPMh VRM accelerator which supports voting on enable, voltage, * and mode of LDO, SMPS, and BOB type PMIC regulators. * @XOB: RPMh XOB accelerator which supports voting on the enable state * of PMIC regulators. enum rpmh_regulator_type {#define RPMH_REGULATOR_REG_VRM_VOLTAGE 0x0#define RPMH_REGULATOR_REG_ENABLE 0x4#define RPMH_REGULATOR_REG_VRM_MODE 0x8#define PMIC4_LDO_MODE_RETENTION 4#define PMIC4_LDO_MODE_LPM 5#define PMIC4_LDO_MODE_HPM 7#define PMIC4_SMPS_MODE_RETENTION 4#define PMIC4_SMPS_MODE_PFM 5#define PMIC4_SMPS_MODE_AUTO 6#define PMIC4_SMPS_MODE_PWM 7#define PMIC4_BOB_MODE_PASS 0#define PMIC4_BOB_MODE_PFM 1#define PMIC4_BOB_MODE_AUTO 2#define PMIC4_BOB_MODE_PWM 3#define PMIC5_LDO_MODE_RETENTION 3#define PMIC5_LDO_MODE_LPM 4#define PMIC5_LDO_MODE_HPM 7#define PMIC5_SMPS_MODE_RETENTION 3#define PMIC5_SMPS_MODE_PFM 4#define PMIC5_SMPS_MODE_AUTO 6#define PMIC5_SMPS_MODE_PWM 7#define PMIC5_BOB_MODE_PASS 2#define PMIC5_BOB_MODE_PFM 4#define PMIC5_BOB_MODE_AUTO 6#define PMIC5_BOB_MODE_PWM 7/** * struct rpmh_vreg_hw_data - RPMh regulator hardware configurations * @regulator_type: RPMh accelerator type used to manage this * regulator * @ops: Pointer to regulator ops callback structure * @voltage_ranges: The possible ranges of voltages supported by this * PMIC regulator type * @n_linear_ranges: Number of entries in voltage_ranges * @n_voltages: The number of unique voltage set points defined * by voltage_ranges * @hpm_min_load_uA: Minimum load current in microamps that requires * high power mode (HPM) operation. This is used * for LDO hardware type regulators only. * @pmic_mode_map: Array indexed by regulator framework mode * containing PMIC hardware modes. Must be large * enough to index all framework modes supported * by this regulator hardware type. * @of_map_mode: Maps an RPMH_REGULATOR_MODE_* mode value defined * in device tree to a regulator framework mode struct rpmh_vreg_hw_data {enum rpmh_regulator_type regulator_type;const struct regulator_ops *ops;const struct linear_range *voltage_ranges;int n_linear_ranges;int n_voltages;int hpm_min_load_uA;const int *pmic_mode_map;unsigned int (*of_map_mode)(unsigned int mode);/** * struct rpmh_vreg - individual RPMh regulator data structure encapsulating a * single regulator device * @dev: Device pointer for the top-level PMIC RPMh * regulator parent device. This is used as a * handle in RPMh write requests. * @addr: Base address of the regulator resource within * an RPMh accelerator * @rdesc: Regulator descriptor * @hw_data: PMIC regulator configuration data for this RPMh * regulator * @always_wait_for_ack: Boolean flag indicating if a request must always * wait for an ACK from RPMh before continuing even * if it corresponds to a strictly lower power * state (e.g. enabled --> disabled). * @enabled: Flag indicating if the regulator is enabled or * not * @bypassed: Boolean indicating if the regulator is in * bypass (pass-through) mode or not. This is * only used by BOB rpmh-regulator resources. * @voltage_selector: Selector used for get_voltage_sel() and * set_voltage_sel() callbacks * @mode: RPMh VRM regulator current framework mode struct rpmh_vreg {struct device *dev;struct regulator_desc rdesc;const struct rpmh_vreg_hw_data *hw_data;bool always_wait_for_ack;int enabled;bool bypassed;int voltage_selector;unsigned int mode;/** * struct rpmh_vreg_init_data - initialization data for an RPMh regulator * @name: Name for the regulator which also corresponds * to the device tree subnode name of the regulator * @resource_name: RPMh regulator resource name format string. * This must include exactly one field: '%s' which * is filled at run-time with the PMIC ID provided * by device tree property qcom,pmic-id. Example: * "ldo%s1" for RPMh resource "ldoa1". * @supply_name: Parent supply regulator name * @hw_data: Configuration data for this PMIC regulator type struct rpmh_vreg_init_data {const char *name;const char *resource_name;const char *supply_name;const struct rpmh_vreg_hw_data *hw_data;/** * rpmh_regulator_send_request() - send the request to RPMh * @vreg: Pointer to the RPMh regulator * @cmd: Pointer to the RPMh command to send * @wait_for_ack: Boolean indicating if execution must wait until the * request has been acknowledged as complete * * Return: 0 on success, or a negative error number on failure static int rpmh_regulator_send_request(struct rpmh_vreg *vreg,struct tcs_cmd *cmd, bool wait_for_ack)int ret;if (wait_for_ack || vreg->always_wait_for_ack)else return ret;static int _rpmh_regulator_vrm_set_voltage_sel(struct regulator_dev *rdev,unsigned int selector, bool wait_for_ack)struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);struct tcs_cmd cmd = {int ret;/* VRM voltage control register is set with voltage in millivolts. */ if (!ret)return ret;static int rpmh_regulator_vrm_set_voltage_sel(struct regulator_dev *rdev,unsigned int selector)struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);if (vreg->enabled == -EINVAL) {/* * Cache the voltage and send it later when the regulator is * enabled or disabled. return 0;return _rpmh_regulator_vrm_set_voltage_sel(rdev, selector,static int rpmh_regulator_vrm_get_voltage_sel(struct regulator_dev *rdev)struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);return vreg->voltage_selector;static int rpmh_regulator_is_enabled(struct regulator_dev *rdev)struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);return vreg->enabled;static int rpmh_regulator_set_enable_state(struct regulator_dev *rdev,bool enable)struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);struct tcs_cmd cmd = {int ret;if (vreg->enabled == -EINVAL &&true );if (ret < 0)return ret;if (!ret)return ret;static int rpmh_regulator_enable(struct regulator_dev *rdev)return rpmh_regulator_set_enable_state(rdev, true );static int rpmh_regulator_disable(struct regulator_dev *rdev)return rpmh_regulator_set_enable_state(rdev, false );static int rpmh_regulator_vrm_set_mode_bypass(struct rpmh_vreg *vreg,unsigned int mode, bool bypassed)struct tcs_cmd cmd = {int pmic_mode;if (mode > REGULATOR_MODE_STANDBY)return -EINVAL;if (pmic_mode < 0)return pmic_mode;if (bypassed)else return rpmh_regulator_send_request(vreg, &cmd, true );static int rpmh_regulator_vrm_set_mode(struct regulator_dev *rdev,unsigned int mode)struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);int ret;if (mode == vreg->mode)return 0;if (!ret)return ret;static unsigned int rpmh_regulator_vrm_get_mode(struct regulator_dev *rdev)struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);return vreg->mode;/** * rpmh_regulator_vrm_get_optimum_mode() - get the mode based on the load * @rdev: Regulator device pointer for the rpmh-regulator * @input_uV: Input voltage * @output_uV: Output voltage * @load_uA: Aggregated load current in microamps * * This function is used in the regulator_ops for VRM type RPMh regulator * devices. * * Return: 0 on success, or a negative error number on failure static unsigned int rpmh_regulator_vrm_get_optimum_mode(struct regulator_dev *rdev, int input_uV, int output_uV, int load_uA)struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);if (load_uA >= vreg->hw_data->hpm_min_load_uA)return REGULATOR_MODE_NORMAL;else return REGULATOR_MODE_IDLE;static int rpmh_regulator_vrm_set_bypass(struct regulator_dev *rdev,bool enable)struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);int ret;if (vreg->bypassed == enable)return 0;if (!ret)return ret;static int rpmh_regulator_vrm_get_bypass(struct regulator_dev *rdev,bool *enable)struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);return 0;static const struct regulator_ops rpmh_regulator_vrm_ops = {static const struct regulator_ops rpmh_regulator_vrm_drms_ops = {static const struct regulator_ops rpmh_regulator_vrm_bypass_ops = {static const struct regulator_ops rpmh_regulator_xob_ops = {/** * rpmh_regulator_init_vreg() - initialize all attributes of an rpmh-regulator * @vreg: Pointer to the individual rpmh-regulator resource * @dev: Pointer to the top level rpmh-regulator PMIC device * @node: Pointer to the individual rpmh-regulator resource * device node * @pmic_id: String used to identify the top level rpmh-regulator * PMIC device on the board * @pmic_rpmh_data: Pointer to a null-terminated array of rpmh-regulator * resources defined for the top level PMIC device * * Return: 0 on success, or a negative error number on failure static int rpmh_regulator_init_vreg(struct rpmh_vreg *vreg, struct device *dev,struct device_node *node, const char *pmic_id,const struct rpmh_vreg_init_data *pmic_rpmh_data)struct regulator_config reg_config = {};char rpmh_resource_name[20] = "" ;const struct rpmh_vreg_init_data *rpmh_data;struct regulator_init_data *init_data;struct regulator_dev *rdev;int ret;for (rpmh_data = pmic_rpmh_data; rpmh_data->name; rpmh_data++)if (of_node_name_eq(node, rpmh_data->name))break ;if (!rpmh_data->name) {"Unknown regulator %pOFn\n" , node);return -EINVAL;sizeof (rpmh_resource_name),if (!vreg->addr) {"%pOFn: could not find RPMh address for resource %s\n" ,return -ENODEV;if (rpmh_data->hw_data->n_voltages) {"qcom,always-wait-for-ack" );if (!init_data)return -ENOMEM;if (rpmh_data->hw_data->regulator_type == XOB &&if (IS_ERR(rdev)) {"%pOFn: devm_regulator_register() failed, ret=%d\n" ,return ret;"%pOFn regulator registered for RPMh resource %s @ 0x%05X\n" ,return 0;static const int pmic_mode_map_pmic4_ldo[REGULATOR_MODE_STANDBY + 1] = {static const int pmic_mode_map_pmic5_ldo[REGULATOR_MODE_STANDBY + 1] = {static const int pmic_mode_map_pmic5_ldo_hpm[REGULATOR_MODE_STANDBY + 1] = {static unsigned int rpmh_regulator_pmic4_ldo_of_map_mode(unsigned int rpmh_mode)unsigned int mode;switch (rpmh_mode) {case RPMH_REGULATOR_MODE_HPM:break ;case RPMH_REGULATOR_MODE_LPM:break ;case RPMH_REGULATOR_MODE_RET:break ;default :break ;return mode;static const int pmic_mode_map_pmic4_smps[REGULATOR_MODE_STANDBY + 1] = {static const int pmic_mode_map_pmic5_smps[REGULATOR_MODE_STANDBY + 1] = {static unsigned int unsigned int rpmh_mode)unsigned int mode;switch (rpmh_mode) {case RPMH_REGULATOR_MODE_HPM:break ;case RPMH_REGULATOR_MODE_AUTO:break ;case RPMH_REGULATOR_MODE_LPM:break ;case RPMH_REGULATOR_MODE_RET:break ;default :break ;return mode;static const int pmic_mode_map_pmic4_bob[REGULATOR_MODE_STANDBY + 1] = {static const int pmic_mode_map_pmic5_bob[REGULATOR_MODE_STANDBY + 1] = {static unsigned int rpmh_regulator_pmic4_bob_of_map_mode(unsigned int rpmh_mode)unsigned int mode;switch (rpmh_mode) {case RPMH_REGULATOR_MODE_HPM:break ;case RPMH_REGULATOR_MODE_AUTO:break ;case RPMH_REGULATOR_MODE_LPM:break ;default :break ;return mode;static const struct rpmh_vreg_hw_data pmic4_pldo = {struct linear_range[]) {static const struct rpmh_vreg_hw_data pmic4_pldo_lv = {struct linear_range[]) {static const struct rpmh_vreg_hw_data pmic4_nldo = {struct linear_range[]) {static const struct rpmh_vreg_hw_data pmic4_hfsmps3 = {struct linear_range[]) {static const struct rpmh_vreg_hw_data pmic4_ftsmps426 = {struct linear_range[]) {static const struct rpmh_vreg_hw_data pmic4_bob = {struct linear_range[]) {static const struct rpmh_vreg_hw_data pmic4_lvs = {/* LVS hardware does not support voltage or mode configuration. */ static const struct rpmh_vreg_hw_data pmic5_pldo = {struct linear_range[]) {static const struct rpmh_vreg_hw_data pmic5_pldo_lv = {struct linear_range[]) {static const struct rpmh_vreg_hw_data pmic5_pldo515_mv = {struct linear_range[]) {static const struct rpmh_vreg_hw_data pmic5_pldo502 = {struct linear_range[]) {static const struct rpmh_vreg_hw_data pmic5_pldo502ln = {struct linear_range[]) {static const struct rpmh_vreg_hw_data pmic5_nldo = {struct linear_range[]) {static const struct rpmh_vreg_hw_data pmic5_nldo515 = {struct linear_range[]) {static const struct rpmh_vreg_hw_data pmic5_nldo502 = {struct linear_range[]) {static const struct rpmh_vreg_hw_data pmic5_hfsmps510 = {struct linear_range[]) {static const struct rpmh_vreg_hw_data pmic5_ftsmps510 = {struct linear_range[]) {static const struct rpmh_vreg_hw_data pmic5_ftsmps520 = {struct linear_range[]) {static const struct rpmh_vreg_hw_data pmic5_ftsmps525 = {struct linear_range[]) {static const struct rpmh_vreg_hw_data pmic5_ftsmps527 = {struct linear_range[]) {static const struct rpmh_vreg_hw_data pmic5_hfsmps515 = {struct linear_range[]) {static const struct rpmh_vreg_hw_data pmic5_hfsmps515_1 = {struct linear_range[]) {static const struct rpmh_vreg_hw_data pmic5_bob = {struct linear_range[]) {#define RPMH_VREG(_name, _resource_name, _hw_data, _supply_name) \static const struct rpmh_vreg_init_data pm8998_vreg_data[] = {"smps1" , "smp%s1" , &pmic4_ftsmps426, "vdd-s1" ),"smps2" , "smp%s2" , &pmic4_ftsmps426, "vdd-s2" ),"smps3" , "smp%s3" , &pmic4_hfsmps3, "vdd-s3" ),"smps4" , "smp%s4" , &pmic4_hfsmps3, "vdd-s4" ),"smps5" , "smp%s5" , &pmic4_hfsmps3, "vdd-s5" ),"smps6" , "smp%s6" , &pmic4_ftsmps426, "vdd-s6" ),"smps7" , "smp%s7" , &pmic4_ftsmps426, "vdd-s7" ),"smps8" , "smp%s8" , &pmic4_ftsmps426, "vdd-s8" ),"smps9" , "smp%s9" , &pmic4_ftsmps426, "vdd-s9" ),"smps10" , "smp%s10" , &pmic4_ftsmps426, "vdd-s10" ),"smps11" , "smp%s11" , &pmic4_ftsmps426, "vdd-s11" ),"smps12" , "smp%s12" , &pmic4_ftsmps426, "vdd-s12" ),"smps13" , "smp%s13" , &pmic4_ftsmps426, "vdd-s13" ),"ldo1" , "ldo%s1" , &pmic4_nldo, "vdd-l1-l27" ),"ldo2" , "ldo%s2" , &pmic4_nldo, "vdd-l2-l8-l17" ),"ldo3" , "ldo%s3" , &pmic4_nldo, "vdd-l3-l11" ),"ldo4" , "ldo%s4" , &pmic4_nldo, "vdd-l4-l5" ),"ldo5" , "ldo%s5" , &pmic4_nldo, "vdd-l4-l5" ),"ldo6" , "ldo%s6" , &pmic4_pldo, "vdd-l6" ),"ldo7" , "ldo%s7" , &pmic4_pldo_lv, "vdd-l7-l12-l14-l15" ),"ldo8" , "ldo%s8" , &pmic4_nldo, "vdd-l2-l8-l17" ),"ldo9" , "ldo%s9" , &pmic4_pldo, "vdd-l9" ),"ldo10" , "ldo%s10" , &pmic4_pldo, "vdd-l10-l23-l25" ),"ldo11" , "ldo%s11" , &pmic4_nldo, "vdd-l3-l11" ),"ldo12" , "ldo%s12" , &pmic4_pldo_lv, "vdd-l7-l12-l14-l15" ),"ldo13" , "ldo%s13" , &pmic4_pldo, "vdd-l13-l19-l21" ),"ldo14" , "ldo%s14" , &pmic4_pldo_lv, "vdd-l7-l12-l14-l15" ),"ldo15" , "ldo%s15" , &pmic4_pldo_lv, "vdd-l7-l12-l14-l15" ),"ldo16" , "ldo%s16" , &pmic4_pldo, "vdd-l16-l28" ),"ldo17" , "ldo%s17" , &pmic4_nldo, "vdd-l2-l8-l17" ),"ldo18" , "ldo%s18" , &pmic4_pldo, "vdd-l18-l22" ),"ldo19" , "ldo%s19" , &pmic4_pldo, "vdd-l13-l19-l21" ),"ldo20" , "ldo%s20" , &pmic4_pldo, "vdd-l20-l24" ),"ldo21" , "ldo%s21" , &pmic4_pldo, "vdd-l13-l19-l21" ),"ldo22" , "ldo%s22" , &pmic4_pldo, "vdd-l18-l22" ),"ldo23" , "ldo%s23" , &pmic4_pldo, "vdd-l10-l23-l25" ),"ldo24" , "ldo%s24" , &pmic4_pldo, "vdd-l20-l24" ),"ldo25" , "ldo%s25" , &pmic4_pldo, "vdd-l10-l23-l25" ),"ldo26" , "ldo%s26" , &pmic4_nldo, "vdd-l26" ),"ldo27" , "ldo%s27" , &pmic4_nldo, "vdd-l1-l27" ),"ldo28" , "ldo%s28" , &pmic4_pldo, "vdd-l16-l28" ),"lvs1" , "vs%s1" , &pmic4_lvs, "vin-lvs-1-2" ),"lvs2" , "vs%s2" , &pmic4_lvs, "vin-lvs-1-2" ),static const struct rpmh_vreg_init_data pmg1110_vreg_data[] = {"smps1" , "smp%s1" , &pmic5_ftsmps510, "vdd-s1" ),static const struct rpmh_vreg_init_data pmi8998_vreg_data[] = {"bob" , "bob%s1" , &pmic4_bob, "vdd-bob" ),static const struct rpmh_vreg_init_data pm8005_vreg_data[] = {"smps1" , "smp%s1" , &pmic4_ftsmps426, "vdd-s1" ),"smps2" , "smp%s2" , &pmic4_ftsmps426, "vdd-s2" ),"smps3" , "smp%s3" , &pmic4_ftsmps426, "vdd-s3" ),"smps4" , "smp%s4" , &pmic4_ftsmps426, "vdd-s4" ),static const struct rpmh_vreg_init_data pm8150_vreg_data[] = {"smps1" , "smp%s1" , &pmic5_ftsmps510, "vdd-s1" ),"smps2" , "smp%s2" , &pmic5_ftsmps510, "vdd-s2" ),"smps3" , "smp%s3" , &pmic5_ftsmps510, "vdd-s3" ),"smps4" , "smp%s4" , &pmic5_hfsmps510, "vdd-s4" ),"smps5" , "smp%s5" , &pmic5_hfsmps510, "vdd-s5" ),"smps6" , "smp%s6" , &pmic5_ftsmps510, "vdd-s6" ),"smps7" , "smp%s7" , &pmic5_ftsmps510, "vdd-s7" ),"smps8" , "smp%s8" , &pmic5_ftsmps510, "vdd-s8" ),"smps9" , "smp%s9" , &pmic5_ftsmps510, "vdd-s9" ),"smps10" , "smp%s10" , &pmic5_ftsmps510, "vdd-s10" ),"ldo1" , "ldo%s1" , &pmic5_nldo, "vdd-l1-l8-l11" ),"ldo2" , "ldo%s2" , &pmic5_pldo, "vdd-l2-l10" ),"ldo3" , "ldo%s3" , &pmic5_nldo, "vdd-l3-l4-l5-l18" ),"ldo4" , "ldo%s4" , &pmic5_nldo, "vdd-l3-l4-l5-l18" ),"ldo5" , "ldo%s5" , &pmic5_nldo, "vdd-l3-l4-l5-l18" ),"ldo6" , "ldo%s6" , &pmic5_nldo, "vdd-l6-l9" ),"ldo7" , "ldo%s7" , &pmic5_pldo, "vdd-l7-l12-l14-l15" ),"ldo8" , "ldo%s8" , &pmic5_nldo, "vdd-l1-l8-l11" ),"ldo9" , "ldo%s9" , &pmic5_nldo, "vdd-l6-l9" ),"ldo10" , "ldo%s10" , &pmic5_pldo, "vdd-l2-l10" ),"ldo11" , "ldo%s11" , &pmic5_nldo, "vdd-l1-l8-l11" ),"ldo12" , "ldo%s12" , &pmic5_pldo_lv, "vdd-l7-l12-l14-l15" ),"ldo13" , "ldo%s13" , &pmic5_pldo, "vdd-l13-l16-l17" ),"ldo14" , "ldo%s14" , &pmic5_pldo_lv, "vdd-l7-l12-l14-l15" ),"ldo15" , "ldo%s15" , &pmic5_pldo_lv, "vdd-l7-l12-l14-l15" ),"ldo16" , "ldo%s16" , &pmic5_pldo, "vdd-l13-l16-l17" ),"ldo17" , "ldo%s17" , &pmic5_pldo, "vdd-l13-l16-l17" ),"ldo18" , "ldo%s18" , &pmic5_nldo, "vdd-l3-l4-l5-l18" ),static const struct rpmh_vreg_init_data pm8150l_vreg_data[] = {"smps1" , "smp%s1" , &pmic5_ftsmps510, "vdd-s1" ),"smps2" , "smp%s2" , &pmic5_ftsmps510, "vdd-s2" ),"smps3" , "smp%s3" , &pmic5_ftsmps510, "vdd-s3" ),"smps4" , "smp%s4" , &pmic5_ftsmps510, "vdd-s4" ),"smps5" , "smp%s5" , &pmic5_ftsmps510, "vdd-s5" ),"smps6" , "smp%s6" , &pmic5_ftsmps510, "vdd-s6" ),"smps7" , "smp%s7" , &pmic5_ftsmps510, "vdd-s7" ),"smps8" , "smp%s8" , &pmic5_hfsmps510, "vdd-s8" ),"ldo1" , "ldo%s1" , &pmic5_pldo_lv, "vdd-l1-l8" ),"ldo2" , "ldo%s2" , &pmic5_nldo, "vdd-l2-l3" ),"ldo3" , "ldo%s3" , &pmic5_nldo, "vdd-l2-l3" ),"ldo4" , "ldo%s4" , &pmic5_pldo, "vdd-l4-l5-l6" ),"ldo5" , "ldo%s5" , &pmic5_pldo, "vdd-l4-l5-l6" ),"ldo6" , "ldo%s6" , &pmic5_pldo, "vdd-l4-l5-l6" ),"ldo7" , "ldo%s7" , &pmic5_pldo, "vdd-l7-l11" ),"ldo8" , "ldo%s8" , &pmic5_pldo_lv, "vdd-l1-l8" ),"ldo9" , "ldo%s9" , &pmic5_pldo, "vdd-l9-l10" ),"ldo10" , "ldo%s10" , &pmic5_pldo, "vdd-l9-l10" ),"ldo11" , "ldo%s11" , &pmic5_pldo, "vdd-l7-l11" ),"bob" , "bob%s1" , &pmic5_bob, "vdd-bob" ),static const struct rpmh_vreg_init_data pmm8155au_vreg_data[] = {"smps1" , "smp%s1" , &pmic5_ftsmps510, "vdd-s1" ),"smps2" , "smp%s2" , &pmic5_ftsmps510, "vdd-s2" ),"smps3" , "smp%s3" , &pmic5_ftsmps510, "vdd-s3" ),"smps4" , "smp%s4" , &pmic5_hfsmps510, "vdd-s4" ),"smps5" , "smp%s5" , &pmic5_hfsmps510, "vdd-s5" ),"smps6" , "smp%s6" , &pmic5_ftsmps510, "vdd-s6" ),"smps7" , "smp%s7" , &pmic5_ftsmps510, "vdd-s7" ),"smps8" , "smp%s8" , &pmic5_ftsmps510, "vdd-s8" ),"smps9" , "smp%s9" , &pmic5_ftsmps510, "vdd-s9" ),"smps10" , "smp%s10" , &pmic5_ftsmps510, "vdd-s10" ),"ldo1" , "ldo%s1" , &pmic5_nldo, "vdd-l1-l8-l11" ),"ldo2" , "ldo%s2" , &pmic5_pldo, "vdd-l2-l10" ),"ldo3" , "ldo%s3" , &pmic5_nldo, "vdd-l3-l4-l5-l18" ),"ldo4" , "ldo%s4" , &pmic5_nldo, "vdd-l3-l4-l5-l18" ),"ldo5" , "ldo%s5" , &pmic5_nldo, "vdd-l3-l4-l5-l18" ),"ldo6" , "ldo%s6" , &pmic5_nldo, "vdd-l6-l9" ),"ldo7" , "ldo%s7" , &pmic5_pldo_lv, "vdd-l7-l12-l14-l15" ),"ldo8" , "ldo%s8" , &pmic5_nldo, "vdd-l1-l8-l11" ),"ldo9" , "ldo%s9" , &pmic5_nldo, "vdd-l6-l9" ),"ldo10" , "ldo%s10" , &pmic5_pldo, "vdd-l2-l10" ),"ldo11" , "ldo%s11" , &pmic5_nldo, "vdd-l1-l8-l11" ),"ldo12" , "ldo%s12" , &pmic5_pldo_lv, "vdd-l7-l12-l14-l15" ),"ldo13" , "ldo%s13" , &pmic5_pldo, "vdd-l13-l16-l17" ),"ldo14" , "ldo%s14" , &pmic5_pldo_lv, "vdd-l7-l12-l14-l15" ),"ldo15" , "ldo%s15" , &pmic5_pldo_lv, "vdd-l7-l12-l14-l15" ),"ldo16" , "ldo%s16" , &pmic5_pldo, "vdd-l13-l16-l17" ),"ldo17" , "ldo%s17" , &pmic5_pldo, "vdd-l13-l16-l17" ),"ldo18" , "ldo%s18" , &pmic5_nldo, "vdd-l3-l4-l5-l18" ),static const struct rpmh_vreg_init_data pmm8654au_vreg_data[] = {"smps1" , "smp%s1" , &pmic5_ftsmps527, "vdd-s1" ),"smps2" , "smp%s2" , &pmic5_ftsmps527, "vdd-s2" ),"smps3" , "smp%s3" , &pmic5_ftsmps527, "vdd-s3" ),"smps4" , "smp%s4" , &pmic5_ftsmps527, "vdd-s4" ),"smps5" , "smp%s5" , &pmic5_ftsmps527, "vdd-s5" ),"smps6" , "smp%s6" , &pmic5_ftsmps527, "vdd-s6" ),"smps7" , "smp%s7" , &pmic5_ftsmps527, "vdd-s7" ),"smps8" , "smp%s8" , &pmic5_ftsmps527, "vdd-s8" ),"smps9" , "smp%s9" , &pmic5_ftsmps527, "vdd-s9" ),"ldo1" , "ldo%s1" , &pmic5_nldo515, "vdd-s9" ),"ldo2" , "ldo%s2" , &pmic5_nldo515, "vdd-l2-l3" ),"ldo3" , "ldo%s3" , &pmic5_nldo515, "vdd-l2-l3" ),"ldo4" , "ldo%s4" , &pmic5_nldo515, "vdd-s9" ),"ldo5" , "ldo%s5" , &pmic5_nldo515, "vdd-s9" ),"ldo6" , "ldo%s6" , &pmic5_nldo515, "vdd-l6-l7" ),"ldo7" , "ldo%s7" , &pmic5_nldo515, "vdd-l6-l7" ),"ldo8" , "ldo%s8" , &pmic5_pldo515_mv, "vdd-l8-l9" ),"ldo9" , "ldo%s9" , &pmic5_pldo, "vdd-l8-l9" ),static const struct rpmh_vreg_init_data pm8350_vreg_data[] = {"smps1" , "smp%s1" , &pmic5_ftsmps510, "vdd-s1" ),"smps2" , "smp%s2" , &pmic5_ftsmps510, "vdd-s2" ),"smps3" , "smp%s3" , &pmic5_ftsmps510, "vdd-s3" ),"smps4" , "smp%s4" , &pmic5_ftsmps510, "vdd-s4" ),"smps5" , "smp%s5" , &pmic5_ftsmps510, "vdd-s5" ),"smps6" , "smp%s6" , &pmic5_ftsmps510, "vdd-s6" ),"smps7" , "smp%s7" , &pmic5_ftsmps510, "vdd-s7" ),"smps8" , "smp%s8" , &pmic5_ftsmps510, "vdd-s8" ),"smps9" , "smp%s9" , &pmic5_ftsmps510, "vdd-s9" ),"smps10" , "smp%s10" , &pmic5_hfsmps510, "vdd-s10" ),"smps11" , "smp%s11" , &pmic5_hfsmps510, "vdd-s11" ),"smps12" , "smp%s12" , &pmic5_hfsmps510, "vdd-s12" ),"ldo1" , "ldo%s1" , &pmic5_nldo, "vdd-l1-l4" ),"ldo2" , "ldo%s2" , &pmic5_pldo, "vdd-l2-l7" ),"ldo3" , "ldo%s3" , &pmic5_nldo, "vdd-l3-l5" ),"ldo4" , "ldo%s4" , &pmic5_nldo, "vdd-l1-l4" ),"ldo5" , "ldo%s5" , &pmic5_nldo, "vdd-l3-l5" ),"ldo6" , "ldo%s6" , &pmic5_nldo, "vdd-l6-l9-l10" ),"ldo7" , "ldo%s7" , &pmic5_pldo, "vdd-l2-l7" ),"ldo8" , "ldo%s8" , &pmic5_nldo, "vdd-l8" ),"ldo9" , "ldo%s9" , &pmic5_nldo, "vdd-l6-l9-l10" ),"ldo10" , "ldo%s10" , &pmic5_nldo, "vdd-l6-l9-l10" ),static const struct rpmh_vreg_init_data pm8350c_vreg_data[] = {"smps1" , "smp%s1" , &pmic5_hfsmps515, "vdd-s1" ),"smps2" , "smp%s2" , &pmic5_ftsmps510, "vdd-s2" ),"smps3" , "smp%s3" , &pmic5_ftsmps510, "vdd-s3" ),"smps4" , "smp%s4" , &pmic5_ftsmps510, "vdd-s4" ),"smps5" , "smp%s5" , &pmic5_ftsmps510, "vdd-s5" ),"smps6" , "smp%s6" , &pmic5_ftsmps510, "vdd-s6" ),"smps7" , "smp%s7" , &pmic5_ftsmps510, "vdd-s7" ),"smps8" , "smp%s8" , &pmic5_ftsmps510, "vdd-s8" ),"smps9" , "smp%s9" , &pmic5_ftsmps510, "vdd-s9" ),"smps10" , "smp%s10" , &pmic5_ftsmps510, "vdd-s10" ),"ldo1" , "ldo%s1" , &pmic5_pldo_lv, "vdd-l1-l12" ),"ldo2" , "ldo%s2" , &pmic5_pldo_lv, "vdd-l2-l8" ),"ldo3" , "ldo%s3" , &pmic5_pldo, "vdd-l3-l4-l5-l7-l13" ),"ldo4" , "ldo%s4" , &pmic5_pldo, "vdd-l3-l4-l5-l7-l13" ),"ldo5" , "ldo%s5" , &pmic5_pldo, "vdd-l3-l4-l5-l7-l13" ),"ldo6" , "ldo%s6" , &pmic5_pldo, "vdd-l6-l9-l11" ),"ldo7" , "ldo%s7" , &pmic5_pldo, "vdd-l3-l4-l5-l7-l13" ),"ldo8" , "ldo%s8" , &pmic5_pldo_lv, "vdd-l2-l8" ),"ldo9" , "ldo%s9" , &pmic5_pldo, "vdd-l6-l9-l11" ),"ldo10" , "ldo%s10" , &pmic5_nldo, "vdd-l10" ),"ldo11" , "ldo%s11" , &pmic5_pldo, "vdd-l6-l9-l11" ),"ldo12" , "ldo%s12" , &pmic5_pldo_lv, "vdd-l1-l12" ),"ldo13" , "ldo%s13" , &pmic5_pldo, "vdd-l3-l4-l5-l7-l13" ),"bob" , "bob%s1" , &pmic5_bob, "vdd-bob" ),static const struct rpmh_vreg_init_data pm8450_vreg_data[] = {"smps1" , "smp%s1" , &pmic5_ftsmps520, "vdd-s1" ),"smps2" , "smp%s2" , &pmic5_ftsmps520, "vdd-s2" ),"smps3" , "smp%s3" , &pmic5_ftsmps520, "vdd-s3" ),"smps4" , "smp%s4" , &pmic5_ftsmps520, "vdd-s4" ),"smps5" , "smp%s5" , &pmic5_ftsmps520, "vdd-s5" ),"smps6" , "smp%s6" , &pmic5_ftsmps520, "vdd-s6" ),"ldo1" , "ldo%s1" , &pmic5_nldo, "vdd-l1" ),"ldo2" , "ldo%s2" , &pmic5_nldo, "vdd-l2" ),"ldo3" , "ldo%s3" , &pmic5_nldo, "vdd-l3" ),"ldo4" , "ldo%s4" , &pmic5_pldo_lv, "vdd-l4" ),static const struct rpmh_vreg_init_data pm8550_vreg_data[] = {"ldo1" , "ldo%s1" , &pmic5_nldo515, "vdd-l1-l4-l10" ),"ldo2" , "ldo%s2" , &pmic5_pldo, "vdd-l2-l13-l14" ),"ldo3" , "ldo%s3" , &pmic5_nldo515, "vdd-l3" ),"ldo4" , "ldo%s4" , &pmic5_nldo515, "vdd-l1-l4-l10" ),"ldo5" , "ldo%s5" , &pmic5_pldo, "vdd-l5-l16" ),"ldo6" , "ldo%s6" , &pmic5_pldo, "vdd-l6-l7" ),"ldo7" , "ldo%s7" , &pmic5_pldo, "vdd-l6-l7" ),"ldo8" , "ldo%s8" , &pmic5_pldo, "vdd-l8-l9" ),"ldo9" , "ldo%s9" , &pmic5_pldo, "vdd-l8-l9" ),"ldo10" , "ldo%s10" , &pmic5_nldo515, "vdd-l1-l4-l10" ),"ldo11" , "ldo%s11" , &pmic5_nldo515, "vdd-l11" ),"ldo12" , "ldo%s12" , &pmic5_nldo515, "vdd-l12" ),"ldo13" , "ldo%s13" , &pmic5_pldo, "vdd-l2-l13-l14" ),"ldo14" , "ldo%s14" , &pmic5_pldo, "vdd-l2-l13-l14" ),"ldo15" , "ldo%s15" , &pmic5_nldo515, "vdd-l15" ),"ldo16" , "ldo%s16" , &pmic5_pldo, "vdd-l5-l16" ),"ldo17" , "ldo%s17" , &pmic5_pldo, "vdd-l17" ),"bob1" , "bob%s1" , &pmic5_bob, "vdd-bob1" ),"bob2" , "bob%s2" , &pmic5_bob, "vdd-bob2" ),static const struct rpmh_vreg_init_data pm8550vs_vreg_data[] = {"smps1" , "smp%s1" , &pmic5_ftsmps525, "vdd-s1" ),"smps2" , "smp%s2" , &pmic5_ftsmps525, "vdd-s2" ),"smps3" , "smp%s3" , &pmic5_ftsmps525, "vdd-s3" ),"smps4" , "smp%s4" , &pmic5_ftsmps525, "vdd-s4" ),"smps5" , "smp%s5" , &pmic5_ftsmps525, "vdd-s5" ),"smps6" , "smp%s6" , &pmic5_ftsmps525, "vdd-s6" ),"ldo1" , "ldo%s1" , &pmic5_nldo515, "vdd-l1" ),"ldo2" , "ldo%s2" , &pmic5_nldo515, "vdd-l2" ),"ldo3" , "ldo%s3" , &pmic5_nldo515, "vdd-l3" ),static const struct rpmh_vreg_init_data pm8550ve_vreg_data[] = {"smps1" , "smp%s1" , &pmic5_ftsmps525, "vdd-s1" ),"smps2" , "smp%s2" , &pmic5_ftsmps525, "vdd-s2" ),"smps3" , "smp%s3" , &pmic5_ftsmps525, "vdd-s3" ),"smps4" , "smp%s4" , &pmic5_ftsmps525, "vdd-s4" ),"smps5" , "smp%s5" , &pmic5_ftsmps525, "vdd-s5" ),"smps6" , "smp%s6" , &pmic5_ftsmps525, "vdd-s6" ),"smps7" , "smp%s7" , &pmic5_ftsmps525, "vdd-s7" ),"smps8" , "smp%s8" , &pmic5_ftsmps525, "vdd-s8" ),"ldo1" , "ldo%s1" , &pmic5_nldo515, "vdd-l1" ),"ldo2" , "ldo%s2" , &pmic5_nldo515, "vdd-l2" ),"ldo3" , "ldo%s3" , &pmic5_nldo515, "vdd-l3" ),static const struct rpmh_vreg_init_data pmc8380_vreg_data[] = {"smps1" , "smp%s1" , &pmic5_ftsmps525, "vdd-s1" ),"smps2" , "smp%s2" , &pmic5_ftsmps525, "vdd-s2" ),"smps3" , "smp%s3" , &pmic5_ftsmps525, "vdd-s3" ),"smps4" , "smp%s4" , &pmic5_ftsmps525, "vdd-s4" ),"smps5" , "smp%s5" , &pmic5_ftsmps525, "vdd-s5" ),"smps6" , "smp%s6" , &pmic5_ftsmps525, "vdd-s6" ),"smps7" , "smp%s7" , &pmic5_ftsmps525, "vdd-s7" ),"smps8" , "smp%s8" , &pmic5_ftsmps525, "vdd-s8" ),"ldo1" , "ldo%s1" , &pmic5_nldo515, "vdd-l1" ),"ldo2" , "ldo%s2" , &pmic5_nldo515, "vdd-l2" ),"ldo3" , "ldo%s3" , &pmic5_nldo515, "vdd-l3" ),static const struct rpmh_vreg_init_data pm8009_vreg_data[] = {"smps1" , "smp%s1" , &pmic5_hfsmps510, "vdd-s1" ),"smps2" , "smp%s2" , &pmic5_hfsmps515, "vdd-s2" ),"ldo1" , "ldo%s1" , &pmic5_nldo, "vdd-l1" ),"ldo2" , "ldo%s2" , &pmic5_nldo, "vdd-l2" ),"ldo3" , "ldo%s3" , &pmic5_nldo, "vdd-l3" ),"ldo4" , "ldo%s4" , &pmic5_nldo, "vdd-l4" ),"ldo5" , "ldo%s5" , &pmic5_pldo, "vdd-l5-l6" ),"ldo6" , "ldo%s6" , &pmic5_pldo, "vdd-l5-l6" ),"ldo7" , "ldo%s7" , &pmic5_pldo_lv, "vdd-l7" ),static const struct rpmh_vreg_init_data pm8009_1_vreg_data[] = {"smps1" , "smp%s1" , &pmic5_hfsmps510, "vdd-s1" ),"smps2" , "smp%s2" , &pmic5_hfsmps515_1, "vdd-s2" ),"ldo1" , "ldo%s1" , &pmic5_nldo, "vdd-l1" ),"ldo2" , "ldo%s2" , &pmic5_nldo, "vdd-l2" ),"ldo3" , "ldo%s3" , &pmic5_nldo, "vdd-l3" ),"ldo4" , "ldo%s4" , &pmic5_nldo, "vdd-l4" ),"ldo5" , "ldo%s5" , &pmic5_pldo, "vdd-l5-l6" ),"ldo6" , "ldo%s6" , &pmic5_pldo, "vdd-l5-l6" ),"ldo7" , "ldo%s7" , &pmic5_pldo_lv, "vdd-l7" ),static const struct rpmh_vreg_init_data pm8010_vreg_data[] = {"ldo1" , "ldo%s1" , &pmic5_nldo502, "vdd-l1-l2" ),"ldo2" , "ldo%s2" , &pmic5_nldo502, "vdd-l1-l2" ),"ldo3" , "ldo%s3" , &pmic5_pldo502ln, "vdd-l3-l4" ),"ldo4" , "ldo%s4" , &pmic5_pldo502ln, "vdd-l3-l4" ),"ldo5" , "ldo%s5" , &pmic5_pldo502, "vdd-l5" ),"ldo6" , "ldo%s6" , &pmic5_pldo502ln, "vdd-l6" ),"ldo7" , "ldo%s7" , &pmic5_pldo502, "vdd-l7" ),static const struct rpmh_vreg_init_data pm6150_vreg_data[] = {"smps1" , "smp%s1" , &pmic5_ftsmps510, "vdd-s1" ),"smps2" , "smp%s2" , &pmic5_ftsmps510, "vdd-s2" ),"smps3" , "smp%s3" , &pmic5_ftsmps510, "vdd-s3" ),"smps4" , "smp%s4" , &pmic5_hfsmps510, "vdd-s4" ),"smps5" , "smp%s5" , &pmic5_hfsmps510, "vdd-s5" ),"ldo1" , "ldo%s1" , &pmic5_nldo, "vdd-l1" ),"ldo2" , "ldo%s2" , &pmic5_nldo, "vdd-l2-l3" ),"ldo3" , "ldo%s3" , &pmic5_nldo, "vdd-l2-l3" ),"ldo4" , "ldo%s4" , &pmic5_nldo, "vdd-l4-l7-l8" ),"ldo5" , "ldo%s5" , &pmic5_pldo, "vdd-l5-l16-l17-l18-l19" ),"ldo6" , "ldo%s6" , &pmic5_nldo, "vdd-l6" ),"ldo7" , "ldo%s7" , &pmic5_nldo, "vdd-l4-l7-l8" ),"ldo8" , "ldo%s8" , &pmic5_nldo, "vdd-l4-l7-l8" ),"ldo9" , "ldo%s9" , &pmic5_nldo, "vdd-l9" ),"ldo10" , "ldo%s10" , &pmic5_pldo_lv, "vdd-l10-l14-l15" ),"ldo11" , "ldo%s11" , &pmic5_pldo_lv, "vdd-l11-l12-l13" ),"ldo12" , "ldo%s12" , &pmic5_pldo_lv, "vdd-l11-l12-l13" ),"ldo13" , "ldo%s13" , &pmic5_pldo_lv, "vdd-l11-l12-l13" ),"ldo14" , "ldo%s14" , &pmic5_pldo_lv, "vdd-l10-l14-l15" ),"ldo15" , "ldo%s15" , &pmic5_pldo_lv, "vdd-l10-l14-l15" ),"ldo16" , "ldo%s16" , &pmic5_pldo, "vdd-l5-l16-l17-l18-l19" ),"ldo17" , "ldo%s17" , &pmic5_pldo, "vdd-l5-l16-l17-l18-l19" ),"ldo18" , "ldo%s18" , &pmic5_pldo, "vdd-l5-l16-l17-l18-l19" ),"ldo19" , "ldo%s19" , &pmic5_pldo, "vdd-l5-l16-l17-l18-l19" ),static const struct rpmh_vreg_init_data pm6150l_vreg_data[] = {"smps1" , "smp%s1" , &pmic5_ftsmps510, "vdd-s1" ),"smps2" , "smp%s2" , &pmic5_ftsmps510, "vdd-s2" ),"smps3" , "smp%s3" , &pmic5_ftsmps510, "vdd-s3" ),"smps4" , "smp%s4" , &pmic5_ftsmps510, "vdd-s4" ),"smps5" , "smp%s5" , &pmic5_ftsmps510, "vdd-s5" ),"smps6" , "smp%s6" , &pmic5_ftsmps510, "vdd-s6" ),"smps7" , "smp%s7" , &pmic5_ftsmps510, "vdd-s7" ),"smps8" , "smp%s8" , &pmic5_hfsmps510, "vdd-s8" ),"ldo1" , "ldo%s1" , &pmic5_pldo_lv, "vdd-l1-l8" ),"ldo2" , "ldo%s2" , &pmic5_nldo, "vdd-l2-l3" ),"ldo3" , "ldo%s3" , &pmic5_nldo, "vdd-l2-l3" ),"ldo4" , "ldo%s4" , &pmic5_pldo, "vdd-l4-l5-l6" ),"ldo5" , "ldo%s5" , &pmic5_pldo, "vdd-l4-l5-l6" ),"ldo6" , "ldo%s6" , &pmic5_pldo, "vdd-l4-l5-l6" ),"ldo7" , "ldo%s7" , &pmic5_pldo, "vdd-l7-l11" ),"ldo8" , "ldo%s8" , &pmic5_pldo, "vdd-l1-l8" ),"ldo9" , "ldo%s9" , &pmic5_pldo, "vdd-l9-l10" ),"ldo10" , "ldo%s10" , &pmic5_pldo, "vdd-l9-l10" ),"ldo11" , "ldo%s11" , &pmic5_pldo, "vdd-l7-l11" ),"bob" , "bob%s1" , &pmic5_bob, "vdd-bob" ),static const struct rpmh_vreg_init_data pm6350_vreg_data[] = {"smps1" , "smp%s1" , &pmic5_ftsmps510, NULL),"smps2" , "smp%s2" , &pmic5_hfsmps510, NULL),/* smps3 - smps5 not configured */ "ldo1" , "ldo%s1" , &pmic5_nldo, NULL),"ldo2" , "ldo%s2" , &pmic5_pldo, NULL),"ldo3" , "ldo%s3" , &pmic5_pldo, NULL),"ldo4" , "ldo%s4" , &pmic5_nldo, NULL),"ldo5" , "ldo%s5" , &pmic5_pldo, NULL),"ldo6" , "ldo%s6" , &pmic5_pldo, NULL),"ldo7" , "ldo%s7" , &pmic5_pldo, NULL),"ldo8" , "ldo%s8" , &pmic5_pldo, NULL),"ldo9" , "ldo%s9" , &pmic5_pldo, NULL),"ldo10" , "ldo%s10" , &pmic5_pldo, NULL),"ldo11" , "ldo%s11" , &pmic5_pldo, NULL),"ldo12" , "ldo%s12" , &pmic5_pldo, NULL),"ldo13" , "ldo%s13" , &pmic5_nldo, NULL),"ldo14" , "ldo%s14" , &pmic5_pldo, NULL),"ldo15" , "ldo%s15" , &pmic5_nldo, NULL),"ldo16" , "ldo%s16" , &pmic5_nldo, NULL),/* ldo17 not configured */ "ldo18" , "ldo%s18" , &pmic5_nldo, NULL),"ldo19" , "ldo%s19" , &pmic5_nldo, NULL),"ldo20" , "ldo%s20" , &pmic5_nldo, NULL),"ldo21" , "ldo%s21" , &pmic5_nldo, NULL),"ldo22" , "ldo%s22" , &pmic5_nldo, NULL),static const struct rpmh_vreg_init_data pmx55_vreg_data[] = {"smps1" , "smp%s1" , &pmic5_ftsmps510, "vdd-s1" ),"smps2" , "smp%s2" , &pmic5_hfsmps510, "vdd-s2" ),"smps3" , "smp%s3" , &pmic5_hfsmps510, "vdd-s3" ),"smps4" , "smp%s4" , &pmic5_hfsmps510, "vdd-s4" ),"smps5" , "smp%s5" , &pmic5_hfsmps510, "vdd-s5" ),"smps6" , "smp%s6" , &pmic5_ftsmps510, "vdd-s6" ),"smps7" , "smp%s7" , &pmic5_hfsmps510, "vdd-s7" ),"ldo1" , "ldo%s1" , &pmic5_nldo, "vdd-l1-l2" ),"ldo2" , "ldo%s2" , &pmic5_nldo, "vdd-l1-l2" ),"ldo3" , "ldo%s3" , &pmic5_nldo, "vdd-l3-l9" ),"ldo4" , "ldo%s4" , &pmic5_nldo, "vdd-l4-l12" ),"ldo5" , "ldo%s5" , &pmic5_pldo, "vdd-l5-l6" ),"ldo6" , "ldo%s6" , &pmic5_pldo, "vdd-l5-l6" ),"ldo7" , "ldo%s7" , &pmic5_nldo, "vdd-l7-l8" ),"ldo8" , "ldo%s8" , &pmic5_nldo, "vdd-l7-l8" ),"ldo9" , "ldo%s9" , &pmic5_nldo, "vdd-l3-l9" ),"ldo10" , "ldo%s10" , &pmic5_pldo, "vdd-l10-l11-l13" ),"ldo11" , "ldo%s11" , &pmic5_pldo, "vdd-l10-l11-l13" ),"ldo12" , "ldo%s12" , &pmic5_nldo, "vdd-l4-l12" ),"ldo13" , "ldo%s13" , &pmic5_pldo, "vdd-l10-l11-l13" ),"ldo14" , "ldo%s14" , &pmic5_nldo, "vdd-l14" ),"ldo15" , "ldo%s15" , &pmic5_nldo, "vdd-l15" ),"ldo16" , "ldo%s16" , &pmic5_pldo, "vdd-l16" ),static const struct rpmh_vreg_init_data pmx65_vreg_data[] = {"smps1" , "smp%s1" , &pmic5_ftsmps510, "vdd-s1" ),"smps2" , "smp%s2" , &pmic5_hfsmps510, "vdd-s2" ),"smps3" , "smp%s3" , &pmic5_hfsmps510, "vdd-s3" ),"smps4" , "smp%s4" , &pmic5_hfsmps510, "vdd-s4" ),"smps5" , "smp%s5" , &pmic5_hfsmps510, "vdd-s5" ),"smps6" , "smp%s6" , &pmic5_ftsmps510, "vdd-s6" ),"smps7" , "smp%s7" , &pmic5_hfsmps510, "vdd-s7" ),"smps8" , "smp%s8" , &pmic5_hfsmps510, "vdd-s8" ),"ldo1" , "ldo%s1" , &pmic5_nldo, "vdd-l1" ),"ldo2" , "ldo%s2" , &pmic5_nldo, "vdd-l2-l18" ),"ldo3" , "ldo%s3" , &pmic5_nldo, "vdd-l3" ),"ldo4" , "ldo%s4" , &pmic5_nldo, "vdd-l4" ),"ldo5" , "ldo%s5" , &pmic5_pldo, "vdd-l5-l6-l16" ),"ldo6" , "ldo%s6" , &pmic5_pldo, "vdd-l5-l6-l16" ),"ldo7" , "ldo%s7" , &pmic5_nldo, "vdd-l7" ),"ldo8" , "ldo%s8" , &pmic5_nldo, "vdd-l8-l9" ),"ldo9" , "ldo%s9" , &pmic5_nldo, "vdd-l8-l9" ),"ldo10" , "ldo%s10" , &pmic5_pldo, "vdd-l10" ),"ldo11" , "ldo%s11" , &pmic5_pldo, "vdd-l11-l13" ),"ldo12" , "ldo%s12" , &pmic5_nldo, "vdd-l12" ),"ldo13" , "ldo%s13" , &pmic5_pldo, "vdd-l11-l13" ),"ldo14" , "ldo%s14" , &pmic5_nldo, "vdd-l14" ),"ldo15" , "ldo%s15" , &pmic5_nldo, "vdd-l15" ),"ldo16" , "ldo%s16" , &pmic5_pldo, "vdd-l5-l6-l16" ),"ldo17" , "ldo%s17" , &pmic5_nldo, "vdd-l17" ),/* ldo18 not configured */ "ldo19" , "ldo%s19" , &pmic5_nldo, "vdd-l19" ),"ldo20" , "ldo%s20" , &pmic5_nldo, "vdd-l20" ),"ldo21" , "ldo%s21" , &pmic5_nldo, "vdd-l21" ),static const struct rpmh_vreg_init_data pmx75_vreg_data[] = {"smps1" , "smp%s1" , &pmic5_ftsmps525, "vdd-s1" ),"smps2" , "smp%s2" , &pmic5_ftsmps525, "vdd-s2" ),"smps3" , "smp%s3" , &pmic5_ftsmps525, "vdd-s3" ),"smps4" , "smp%s4" , &pmic5_ftsmps525, "vdd-s4" ),"smps5" , "smp%s5" , &pmic5_ftsmps525, "vdd-s5" ),"smps6" , "smp%s6" , &pmic5_ftsmps525, "vdd-s6" ),"smps7" , "smp%s7" , &pmic5_ftsmps525, "vdd-s7" ),"smps8" , "smp%s8" , &pmic5_ftsmps525, "vdd-s8" ),"smps9" , "smp%s9" , &pmic5_ftsmps525, "vdd-s9" ),"smps10" , "smp%s10" , &pmic5_ftsmps525, "vdd-s10" ),"ldo1" , "ldo%s1" , &pmic5_nldo515, "vdd-l1" ),"ldo2" , "ldo%s2" , &pmic5_nldo515, "vdd-l2-18" ),"ldo3" , "ldo%s3" , &pmic5_nldo515, "vdd-l3" ),"ldo4" , "ldo%s4" , &pmic5_nldo515, "vdd-l4-l16" ),"ldo5" , "ldo%s5" , &pmic5_pldo_lv, "vdd-l5-l6" ),"ldo6" , "ldo%s6" , &pmic5_pldo_lv, "vdd-l5-l6" ),"ldo7" , "ldo%s7" , &pmic5_nldo515, "vdd-l7" ),"ldo8" , "ldo%s8" , &pmic5_nldo515, "vdd-l8-l9" ),"ldo9" , "ldo%s9" , &pmic5_nldo515, "vdd-l8-l9" ),"ldo10" , "ldo%s10" , &pmic5_pldo, "vdd-l10" ),"ldo11" , "ldo%s11" , &pmic5_pldo, "vdd-l11-l13" ),"ldo12" , "ldo%s12" , &pmic5_nldo515, "vdd-l12" ),"ldo13" , "ldo%s13" , &pmic5_pldo, "vdd-l11-l13" ),"ldo14" , "ldo%s14" , &pmic5_nldo515, "vdd-l14" ),"ldo15" , "ldo%s15" , &pmic5_nldo515, "vdd-l15" ),"ldo16" , "ldo%s16" , &pmic5_nldo515, "vdd-l4-l16" ),"ldo17" , "ldo%s17" , &pmic5_nldo515, "vdd-l17" ),/* ldo18 not configured */ "ldo19" , "ldo%s19" , &pmic5_nldo515, "vdd-l19" ),"ldo20" , "ldo%s20" , &pmic5_nldo515, "vdd-l20-l21" ),"ldo21" , "ldo%s21" , &pmic5_nldo515, "vdd-l20-l21" ),static const struct rpmh_vreg_init_data pm7325_vreg_data[] = {"smps1" , "smp%s1" , &pmic5_hfsmps510, "vdd-s1" ),"smps2" , "smp%s2" , &pmic5_ftsmps520, "vdd-s2" ),"smps3" , "smp%s3" , &pmic5_ftsmps520, "vdd-s3" ),"smps4" , "smp%s4" , &pmic5_ftsmps520, "vdd-s4" ),"smps5" , "smp%s5" , &pmic5_ftsmps520, "vdd-s5" ),"smps6" , "smp%s6" , &pmic5_ftsmps520, "vdd-s6" ),"smps7" , "smp%s7" , &pmic5_ftsmps520, "vdd-s7" ),"smps8" , "smp%s8" , &pmic5_hfsmps510, "vdd-s8" ),"ldo1" , "ldo%s1" , &pmic5_nldo, "vdd-l1-l4-l12-l15" ),"ldo2" , "ldo%s2" , &pmic5_pldo, "vdd-l2-l7" ),"ldo3" , "ldo%s3" , &pmic5_nldo, "vdd-l3" ),"ldo4" , "ldo%s4" , &pmic5_nldo, "vdd-l1-l4-l12-l15" ),"ldo5" , "ldo%s5" , &pmic5_nldo, "vdd-l5" ),"ldo6" , "ldo%s6" , &pmic5_nldo, "vdd-l6-l9-l10" ),"ldo7" , "ldo%s7" , &pmic5_pldo, "vdd-l2-l7" ),"ldo8" , "ldo%s8" , &pmic5_nldo, "vdd-l8" ),"ldo9" , "ldo%s9" , &pmic5_nldo, "vdd-l6-l9-l10" ),"ldo10" , "ldo%s10" , &pmic5_nldo, "vdd-l6-l9-l10" ),"ldo11" , "ldo%s11" , &pmic5_pldo_lv, "vdd-l11-l17-l18-l19" ),"ldo12" , "ldo%s12" , &pmic5_nldo, "vdd-l1-l4-l12-l15" ),"ldo13" , "ldo%s13" , &pmic5_nldo, "vdd-l13" ),"ldo14" , "ldo%s14" , &pmic5_nldo, "vdd-l14-l16" ),"ldo15" , "ldo%s15" , &pmic5_nldo, "vdd-l1-l4-l12-l15" ),"ldo16" , "ldo%s16" , &pmic5_nldo, "vdd-l14-l16" ),"ldo17" , "ldo%s17" , &pmic5_pldo_lv, "vdd-l11-l17-l18-l19" ),"ldo18" , "ldo%s18" , &pmic5_pldo_lv, "vdd-l11-l17-l18-l19" ),"ldo19" , "ldo%s19" , &pmic5_pldo_lv, "vdd-l11-l17-l18-l19" ),static const struct rpmh_vreg_init_data pm7550_vreg_data[] = {"smps1" , "smp%s1" , &pmic5_ftsmps525, "vdd-s1" ),"smps2" , "smp%s2" , &pmic5_ftsmps525, "vdd-s2" ),"smps3" , "smp%s3" , &pmic5_ftsmps525, "vdd-s3" ),"smps4" , "smp%s4" , &pmic5_ftsmps525, "vdd-s4" ),"smps5" , "smp%s5" , &pmic5_ftsmps525, "vdd-s5" ),"smps6" , "smp%s6" , &pmic5_ftsmps525, "vdd-s6" ),"ldo1" , "ldo%s1" , &pmic5_nldo515, "vdd-l1" ),"ldo2" , "ldo%s2" , &pmic5_nldo515, "vdd-l2-l3" ),"ldo3" , "ldo%s3" , &pmic5_nldo515, "vdd-l2-l3" ),"ldo4" , "ldo%s4" , &pmic5_nldo515, "vdd-l4-l5" ),"ldo5" , "ldo%s5" , &pmic5_nldo515, "vdd-l4-l5" ),"ldo6" , "ldo%s6" , &pmic5_nldo515, "vdd-l6" ),"ldo7" , "ldo%s7" , &pmic5_nldo515, "vdd-l7" ),"ldo8" , "ldo%s8" , &pmic5_nldo515, "vdd-l8" ),"ldo9" , "ldo%s9" , &pmic5_nldo515, "vdd-l9-l10" ),"ldo10" , "ldo%s10" , &pmic5_nldo515, "vdd-l9-l10" ),"ldo11" , "ldo%s11" , &pmic5_nldo515, "vdd-l11" ),"ldo12" , "ldo%s12" , &pmic5_pldo515_mv, "vdd-l12-l14" ),"ldo13" , "ldo%s13" , &pmic5_pldo515_mv, "vdd-l13-l16" ),"ldo14" , "ldo%s14" , &pmic5_pldo, "vdd-l12-l14" ),"ldo15" , "ldo%s15" , &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23" ),"ldo16" , "ldo%s16" , &pmic5_pldo, "vdd-l13-l16" ),"ldo17" , "ldo%s17" , &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23" ),"ldo18" , "ldo%s18" , &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23" ),"ldo19" , "ldo%s19" , &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23" ),"ldo20" , "ldo%s20" , &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23" ),"ldo21" , "ldo%s21" , &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23" ),"ldo22" , "ldo%s22" , &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23" ),"ldo23" , "ldo%s23" , &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23" ),"bob" , "bob%s1" , &pmic5_bob, "vdd-bob" ),static const struct rpmh_vreg_init_data pmr735a_vreg_data[] = {"smps1" , "smp%s1" , &pmic5_ftsmps520, "vdd-s1" ),"smps2" , "smp%s2" , &pmic5_ftsmps520, "vdd-s2" ),"smps3" , "smp%s3" , &pmic5_hfsmps515, "vdd-s3" ),"ldo1" , "ldo%s1" , &pmic5_nldo, "vdd-l1-l2" ),"ldo2" , "ldo%s2" , &pmic5_nldo, "vdd-l1-l2" ),"ldo3" , "ldo%s3" , &pmic5_nldo, "vdd-l3" ),"ldo4" , "ldo%s4" , &pmic5_pldo_lv, "vdd-l4" ),"ldo5" , "ldo%s5" , &pmic5_nldo, "vdd-l5-l6" ),"ldo6" , "ldo%s6" , &pmic5_nldo, "vdd-l5-l6" ),"ldo7" , "ldo%s7" , &pmic5_pldo, "vdd-l7-bob" ),static const struct rpmh_vreg_init_data pmr735b_vreg_data[] = {"ldo1" , "ldo%s1" , &pmic5_nldo, "vdd-l1-l2" ),"ldo2" , "ldo%s2" , &pmic5_nldo, "vdd-l1-l2" ),"ldo3" , "ldo%s3" , &pmic5_nldo, "vdd-l3" ),"ldo4" , "ldo%s4" , &pmic5_pldo_lv, "vdd-l4" ),"ldo5" , "ldo%s5" , &pmic5_nldo, "vdd-l5" ),"ldo6" , "ldo%s6" , &pmic5_nldo, "vdd-l6" ),"ldo7" , "ldo%s7" , &pmic5_nldo, "vdd-l7-l8" ),"ldo8" , "ldo%s8" , &pmic5_nldo, "vdd-l7-l8" ),"ldo9" , "ldo%s9" , &pmic5_nldo, "vdd-l9" ),"ldo10" , "ldo%s10" , &pmic5_pldo_lv, "vdd-l10" ),"ldo11" , "ldo%s11" , &pmic5_nldo, "vdd-l11" ),"ldo12" , "ldo%s12" , &pmic5_nldo, "vdd-l12" ),static const struct rpmh_vreg_init_data pm660_vreg_data[] = {"smps1" , "smp%s1" , &pmic4_ftsmps426, "vdd-s1" ),"smps2" , "smp%s2" , &pmic4_ftsmps426, "vdd-s2" ),"smps3" , "smp%s3" , &pmic4_ftsmps426, "vdd-s3" ),"smps4" , "smp%s4" , &pmic4_hfsmps3, "vdd-s4" ),"smps5" , "smp%s5" , &pmic4_hfsmps3, "vdd-s5" ),"smps6" , "smp%s6" , &pmic4_hfsmps3, "vdd-s6" ),"ldo1" , "ldo%s1" , &pmic4_nldo, "vdd-l1-l6-l7" ),"ldo2" , "ldo%s2" , &pmic4_nldo, "vdd-l2-l3" ),"ldo3" , "ldo%s3" , &pmic4_nldo, "vdd-l2-l3" ),/* ldo4 is inaccessible on PM660 */ "ldo5" , "ldo%s5" , &pmic4_nldo, "vdd-l5" ),"ldo6" , "ldo%s6" , &pmic4_nldo, "vdd-l1-l6-l7" ),"ldo7" , "ldo%s7" , &pmic4_nldo, "vdd-l1-l6-l7" ),"ldo8" , "ldo%s8" , &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14" ),"ldo9" , "ldo%s9" , &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14" ),"ldo10" , "ldo%s10" , &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14" ),"ldo11" , "ldo%s11" , &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14" ),"ldo12" , "ldo%s12" , &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14" ),"ldo13" , "ldo%s13" , &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14" ),"ldo14" , "ldo%s14" , &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14" ),"ldo15" , "ldo%s15" , &pmic4_pldo, "vdd-l15-l16-l17-l18-l19" ),"ldo16" , "ldo%s16" , &pmic4_pldo, "vdd-l15-l16-l17-l18-l19" ),"ldo17" , "ldo%s17" , &pmic4_pldo, "vdd-l15-l16-l17-l18-l19" ),"ldo18" , "ldo%s18" , &pmic4_pldo, "vdd-l15-l16-l17-l18-l19" ),"ldo19" , "ldo%s19" , &pmic4_pldo, "vdd-l15-l16-l17-l18-l19" ),static const struct rpmh_vreg_init_data pm660l_vreg_data[] = {"smps1" , "smp%s1" , &pmic4_ftsmps426, "vdd-s1" ),"smps2" , "smp%s2" , &pmic4_ftsmps426, "vdd-s2" ),"smps3" , "smp%s3" , &pmic4_ftsmps426, "vdd-s3-s4" ),"smps5" , "smp%s5" , &pmic4_ftsmps426, "vdd-s5" ),"ldo1" , "ldo%s1" , &pmic4_nldo, "vdd-l1-l9-l10" ),"ldo2" , "ldo%s2" , &pmic4_pldo, "vdd-l2" ),"ldo3" , "ldo%s3" , &pmic4_pldo, "vdd-l3-l5-l7-l8" ),"ldo4" , "ldo%s4" , &pmic4_pldo, "vdd-l4-l6" ),"ldo5" , "ldo%s5" , &pmic4_pldo, "vdd-l3-l5-l7-l8" ),"ldo6" , "ldo%s6" , &pmic4_pldo, "vdd-l4-l6" ),"ldo7" , "ldo%s7" , &pmic4_pldo, "vdd-l3-l5-l7-l8" ),"ldo8" , "ldo%s8" , &pmic4_pldo, "vdd-l3-l5-l7-l8" ),"bob" , "bob%s1" , &pmic4_bob, "vdd-bob" ),static int rpmh_regulator_probe(struct platform_device *pdev)struct device *dev = &pdev->dev;const struct rpmh_vreg_init_data *vreg_data;struct rpmh_vreg *vreg;const char *pmic_id;int ret;if (!vreg_data)return -ENODEV;"qcom,pmic-id" , &pmic_id);if (ret < 0) {"qcom,pmic-id missing in DT node\n" );return ret;sizeof (*vreg), GFP_KERNEL);if (!vreg)return -ENOMEM;if (ret < 0)return ret;return 0;static const struct of_device_id __maybe_unused rpmh_regulator_match_table[] = {"qcom,pm8005-rpmh-regulators" ,"qcom,pm8009-rpmh-regulators" ,"qcom,pm8009-1-rpmh-regulators" ,"qcom,pm8010-rpmh-regulators" ,"qcom,pm8150-rpmh-regulators" ,"qcom,pm8150l-rpmh-regulators" ,"qcom,pm8350-rpmh-regulators" ,"qcom,pm8350c-rpmh-regulators" ,
Messung V0.5 C=93 H=93 G=92
¤ Dauer der Verarbeitung: 0.16 Sekunden
¤ *© Formatika GbR, Deutschland
