/* use bounce buffer if the physical address is bad */ if (addr & wh->dma_xfer_mask) { /* drop useless mapping */
dma_unmap_single(hdata->dev, scsi_pointer->dma_handle,
scsi_pointer->this_residual,
DMA_DIR(dir_in));
scsi_pointer->dma_handle = (dma_addr_t) NULL;
if (scsi_alloc_out_of_range ||
!wh->dma_bounce_buffer) {
wh->dma_bounce_buffer =
amiga_chip_alloc(wh->dma_bounce_len, "GVP II SCSI Bounce Buffer");
if (!wh->dma_bounce_buffer) {
wh->dma_bounce_len = 0; return 1;
}
wh->dma_buffer_pool = BUF_CHIP_ALLOCED;
}
if (!dir_in) { /* copy to bounce buffer for a write */
memcpy(wh->dma_bounce_buffer, scsi_pointer->ptr,
scsi_pointer->this_residual);
}
if (wh->dma_buffer_pool == BUF_SCSI_ALLOCED) { /* will flush/invalidate cache for us */
addr = dma_map_single(hdata->dev,
wh->dma_bounce_buffer,
wh->dma_bounce_len,
DMA_DIR(dir_in)); /* can't map buffer; use PIO */ if (dma_mapping_error(hdata->dev, addr)) {
dev_warn(hdata->dev, "cannot map bounce buffer %p\n",
wh->dma_bounce_buffer); return 1;
}
}
if (addr & wh->dma_xfer_mask) { /* drop useless mapping */
dma_unmap_single(hdata->dev, scsi_pointer->dma_handle,
scsi_pointer->this_residual,
DMA_DIR(dir_in)); /* fall back to Chip RAM if address out of range */ if (wh->dma_buffer_pool == BUF_SCSI_ALLOCED) {
kfree(wh->dma_bounce_buffer);
scsi_alloc_out_of_range = 1;
} else {
amiga_chip_free(wh->dma_bounce_buffer);
}
wh->dma_bounce_buffer =
amiga_chip_alloc(wh->dma_bounce_len, "GVP II SCSI Bounce Buffer");
if (!wh->dma_bounce_buffer) {
wh->dma_bounce_len = 0; return 1;
}
if (!dir_in) { /* copy to bounce buffer for a write */
memcpy(wh->dma_bounce_buffer, scsi_pointer->ptr,
scsi_pointer->this_residual);
} /* chip RAM can be mapped to phys. address directly */
addr = virt_to_phys(wh->dma_bounce_buffer); /* no need to flush/invalidate cache */
wh->dma_buffer_pool = BUF_CHIP_ALLOCED;
} /* finally, have OK mapping (punted for PIO else) */
scsi_pointer->dma_handle = addr;
}
/* setup dma direction */ if (!dir_in)
cntr |= GVP11_DMAC_DIR_WRITE;
/* stop DMA */
regs->SP_DMA = 1; /* remove write bit from CONTROL bits */
regs->CNTR = GVP11_DMAC_INT_ENABLE;
if (wh->dma_buffer_pool == BUF_SCSI_ALLOCED)
dma_unmap_single(hdata->dev, scsi_pointer->dma_handle,
scsi_pointer->this_residual,
DMA_DIR(wh->dma_dir));
/* copy from a bounce buffer, if necessary */ if (status && wh->dma_bounce_buffer) { if (wh->dma_dir && SCpnt)
memcpy(scsi_pointer->ptr, wh->dma_bounce_buffer,
scsi_pointer->this_residual);
if (wh->dma_buffer_pool == BUF_SCSI_ALLOCED)
kfree(wh->dma_bounce_buffer); else
amiga_chip_free(wh->dma_bounce_buffer);
/* * These darn GVP boards are a problem - it can be tough to tell * whether or not they include a SCSI controller. This is the * ultimate Yet-Another-GVP-Detection-Hack in that it actually * probes for a WD33c93 chip: If we find one, it's extremely * likely that this card supports SCSI, regardless of Product_ * Code, Board_Size, etc.
*/
/* Get pointers to the presumed register locations and save contents */
q = *sasr_3393; /* read it */ if (q & 0x08) /* bit 3 should always be clear */ return -ENODEV;
*sasr_3393 = WD_AUXILIARY_STATUS; /* setup indirect address */ if (*sasr_3393 == WD_AUXILIARY_STATUS) { /* shouldn't retain the write */
*sasr_3393 = save_sasr; /* Oops - restore this byte */ return -ENODEV;
} if (*sasr_3393 != q) { /* should still read the same */
*sasr_3393 = save_sasr; /* Oops - restore this byte */ return -ENODEV;
} if (*scmd_3393 != q) /* and so should the image at 0x1f */ return -ENODEV;
/* * Ok, we probably have a wd33c93, but let's check a few other places * for good measure. Make sure that this works for both 'A and 'B * chip versions.
*/
*sasr_3393 = WD_SCSI_STATUS;
q = *scmd_3393;
*sasr_3393 = WD_SCSI_STATUS;
*scmd_3393 = ~q;
*sasr_3393 = WD_SCSI_STATUS;
qq = *scmd_3393;
*sasr_3393 = WD_SCSI_STATUS;
*scmd_3393 = q; if (qq != q) /* should be read only */ return -ENODEV;
*sasr_3393 = 0x1e; /* this register is unimplemented */
q = *scmd_3393;
*sasr_3393 = 0x1e;
*scmd_3393 = ~q;
*sasr_3393 = 0x1e;
qq = *scmd_3393;
*sasr_3393 = 0x1e;
*scmd_3393 = q; if (qq != q || qq != 0xff) /* should be read only, all 1's */ return -ENODEV;
*sasr_3393 = WD_TIMEOUT_PERIOD;
q = *scmd_3393;
*sasr_3393 = WD_TIMEOUT_PERIOD;
*scmd_3393 = ~q;
*sasr_3393 = WD_TIMEOUT_PERIOD;
qq = *scmd_3393;
*sasr_3393 = WD_TIMEOUT_PERIOD;
*scmd_3393 = q; if (qq != (~q & 0xff)) /* should be read/write */ return -ENODEV; #endif/* CHECK_WD33C93 */
if (dma_set_mask_and_coherent(&z->dev,
TO_DMA_MASK(default_dma_xfer_mask))) {
dev_warn(&z->dev, "cannot use DMA mask %llx\n",
TO_DMA_MASK(default_dma_xfer_mask)); return -ENODEV;
}
/* * Rumors state that some GVP ram boards use the same product * code as the SCSI controllers. Therefore if the board-size * is not 64KB we assume it is a ram board and bail out.
*/ if (zorro_resource_len(z) != 0x10000) return -ENODEV;
address = z->resource.start; if (!request_mem_region(address, 256, "wd33c93")) return -EBUSY;
regs = ZTWO_VADDR(address);
error = check_wd33c93(regs); if (error) goto fail_check_or_alloc;
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