/******************************************************************* * This file is part of the Emulex Linux Device Driver for * * Fibre Channel Host Bus Adapters. * * Copyright (C) 2017-2024 Broadcom. All Rights Reserved. The term * * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. * * Copyright (C) 2004-2016 Emulex. All rights reserved. * * EMULEX and SLI are trademarks of Emulex. * * www.broadcom.com * * Portions Copyright (C) 2004-2005 Christoph Hellwig * * * * This program is free software; you can redistribute it and/or * * modify it under the terms of version 2 of the GNU General * * Public License as published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful. * * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * * TO BE LEGALLY INVALID. See the GNU General Public License for * * more details, a copy of which can be found in the file COPYING * * included with this package. *
*******************************************************************/
#define LPFC_MAX_TARGET 4096 /* max number of targets supported */ #define LPFC_MAX_DISC_THREADS 64 /* max outstanding discovery els
requests */ #define LPFC_MAX_NS_RETRY 3 /* Number of retry attempts to contact
the NameServer before giving up. */ #define LPFC_CMD_PER_LUN 3 /* max outstanding cmds per lun */ #define LPFC_DEFAULT_SG_SEG_CNT 64 /* sg element count per scsi cmnd */
#define LPFC_DEFAULT_XPSGL_SIZE 256 #define LPFC_MAX_SG_TABLESIZE 0xffff #define LPFC_MIN_SG_SLI4_BUF_SZ 0x800 /* based on LPFC_DEFAULT_SG_SEG_CNT */ #define LPFC_MAX_BG_SLI4_SEG_CNT_DIF 128 /* sg element count for BlockGuard */ #define LPFC_MAX_SG_SEG_CNT_DIF 512 /* sg element count per scsi cmnd */ #define LPFC_MAX_SG_SEG_CNT 4096 /* sg element count per scsi cmnd */ #define LPFC_MIN_SG_SEG_CNT 32 /* sg element count per scsi cmnd */ #define LPFC_MAX_SGL_SEG_CNT 512 /* SGL element count per scsi cmnd */ #define LPFC_MAX_BPL_SEG_CNT 4096 /* BPL element count per scsi cmnd */ #define LPFC_MAX_NVME_SEG_CNT 256 /* max SGL element cnt per NVME cmnd */
#define LPFC_MAX_SGE_SIZE 0x80000000 /* Maximum data allowed in a SGE */ #define LPFC_IOCB_LIST_CNT 2250 /* list of IOCBs for fast-path usage. */ #define LPFC_Q_RAMP_UP_INTERVAL 120 /* lun q_depth ramp up interval */ #define LPFC_VNAME_LEN 100 /* vport symbolic name length */ #define LPFC_TGTQ_RAMPUP_PCENT 5 /* Target queue rampup in percentage */ #define LPFC_MIN_TGT_QDEPTH 10 #define LPFC_MAX_TGT_QDEPTH 0xFFFF
/* * Following time intervals are used of adjusting SCSI device * queue depths when there are driver resource error or Firmware * resource error.
*/ #define QUEUE_RAMP_DOWN_INTERVAL (secs_to_jiffies(1))
/* Number of exchanges reserved for discovery to complete */ #define LPFC_DISC_IOCB_BUFF_COUNT 20
#define LPFC_HB_MBOX_INTERVAL 5 /* Heart beat interval in seconds. */ #define LPFC_HB_MBOX_TIMEOUT 30 /* Heart beat timeout in seconds. */
/* * Provide for FC4 TYPE x28 - NVME. The * bit mask for FCP and NVME is 0x8 identically * because they are 32 bit positions distance.
*/ #define LPFC_FC4_TYPE_BITMASK 0x00000100
/* Provide DMA memory definitions the driver uses per port instance. */ struct lpfc_dmabuf { struct list_head list; void *virt; /* virtual address ptr */
dma_addr_t phys; /* mapped address */
uint32_t buffer_tag; /* used for tagged queue ring */
};
/* Format of congestion buffer info * This structure defines memory thats allocated and registered with * the HBA firmware. When adding or removing fields from this structure * the alignment must match the HBA firmware.
*/
enum lpfc_fc_flag { /* Several of these flags are HBA centric and should be moved to * phba->link_flag (e.g. FC_PTP, FC_PUBLIC_LOOP)
*/
FC_PT2PT, /* pt2pt with no fabric */
FC_PT2PT_PLOGI, /* pt2pt initiate PLOGI */
FC_DISC_TMO, /* Discovery timer running */
FC_PUBLIC_LOOP, /* Public loop */
FC_LBIT, /* LOGIN bit in loopinit set */
FC_RSCN_MODE, /* RSCN cmd rcv'ed */
FC_NLP_MORE, /* More node to process in node tbl */
FC_OFFLINE_MODE, /* Interface is offline for diag */
FC_FABRIC, /* We are fabric attached */
FC_VPORT_LOGO_RCVD, /* LOGO received on vport */
FC_RSCN_DISCOVERY, /* Auth all devices after RSCN */
FC_LOGO_RCVD_DID_CHNG, /* FDISC on phys port detect DID chng */
FC_PT2PT_NO_NVME, /* Don't send NVME PRLI */
FC_SCSI_SCAN_TMO, /* scsi scan timer running */
FC_ABORT_DISCOVERY, /* we want to abort discovery */
FC_NDISC_ACTIVE, /* NPort discovery active */
FC_BYPASSED_MODE, /* NPort is in bypassed mode */
FC_VPORT_NEEDS_REG_VPI, /* Needs to have its vpi registered */
FC_RSCN_DEFERRED, /* A deferred RSCN being processed */
FC_VPORT_NEEDS_INIT_VPI, /* Need to INIT_VPI before FDISC */
FC_VPORT_CVL_RCVD, /* VLink failed due to CVL */
FC_VFI_REGISTERED, /* VFI is registered */
FC_FDISC_COMPLETED, /* FDISC completed */
FC_DISC_DELAYED, /* Delay NPort discovery */
};
enum lpfc_load_flag {
FC_LOADING, /* HBA in process of loading drvr */
FC_UNLOADING, /* HBA in process of unloading drvr */
FC_ALLOW_FDMI, /* port is ready for FDMI requests */
FC_ALLOW_VMID, /* Allow VMID I/Os */
FC_DEREGISTER_ALL_APP_ID /* Deregister all VMIDs */
};
struct list_head fc_nodes;
spinlock_t fc_nodes_list_lock; /* spinlock for fc_nodes list */
/* Keep counters for the number of entries in each list. */
atomic_t fc_plogi_cnt;
atomic_t fc_adisc_cnt;
atomic_t fc_reglogin_cnt;
atomic_t fc_prli_cnt;
atomic_t fc_unmap_cnt;
atomic_t fc_map_cnt;
atomic_t fc_npr_cnt;
atomic_t fc_unused_cnt;
struct serv_parm fc_sparam; /* buffer for our service parameters */
/* There is a single nvme instance per vport. */ struct nvme_fc_local_port *localport;
uint8_t nvmei_support; /* driver supports NVME Initiator */
uint32_t last_fcp_wqidx;
uint32_t rcv_flogi_cnt; /* How many unsol FLOGIs ACK'd. */
};
struct hbq_s {
uint16_t entry_count; /* Current number of HBQ slots */
uint16_t buffer_count; /* Current number of buffers posted */
uint32_t next_hbqPutIdx; /* Index to next HBQ slot to use */
uint32_t hbqPutIdx; /* HBQ slot to use */
uint32_t local_hbqGetIdx; /* Local copy of Get index from Port */ void *hbq_virt; /* Virtual ptr to this hbq */ struct list_head hbq_buffer_list; /* buffers assigned to this HBQ */ /* Callback for HBQ buffer allocation */ struct hbq_dmabuf *(*hbq_alloc_buffer) (struct lpfc_hba *); /* Callback for HBQ buffer free */ void (*hbq_free_buffer) (struct lpfc_hba *, struct hbq_dmabuf *);
};
/* this matches the position in the lpfc_hbq_defs array */ #define LPFC_ELS_HBQ 0 #define LPFC_MAX_HBQS 1
struct lpfc_epd_pool { /* Expedite pool */ struct list_head list;
u32 count;
spinlock_t lock; /* lock for expedite pool */
};
enum ras_state {
INACTIVE,
REG_INPROGRESS,
ACTIVE
};
struct lpfc_ras_fwlog {
uint8_t *fwlog_buff;
uint32_t fw_buffcount; /* Buffer size posted to FW */ #define LPFC_RAS_BUFF_ENTERIES 16 /* Each entry can hold max of 64k */ #define LPFC_RAS_MAX_ENTRY_SIZE (64 * 1024) #define LPFC_RAS_MIN_BUFF_POST_SIZE (256 * 1024) #define LPFC_RAS_MAX_BUFF_POST_SIZE (1024 * 1024)
uint32_t fw_loglevel; /* Log level set */ struct lpfc_dmabuf lwpd; struct list_head fwlog_buff_list;
/* RAS support status on adapter */ bool ras_hwsupport; /* RAS Support available on HW or not */ bool ras_enabled; /* Ras Enabled for the function */ #define LPFC_RAS_DISABLE_LOGGING 0x00 #define LPFC_RAS_ENABLE_LOGGING 0x01 enum ras_state state; /* RAS logging running state */
};
u32 cfg_max_vmid; /* maximum VMIDs allowed per port */
u32 cfg_vmid_app_header; #define LPFC_VMID_APP_HEADER_DISABLE 0 #define LPFC_VMID_APP_HEADER_ENABLE 1
u32 cfg_vmid_priority_tagging;
u32 cfg_vmid_inactivity_timeout; /* Time after which the VMID */ /* deregisters from switch */ struct pci_dev *pcidev; struct list_head work_list;
uint32_t work_ha; /* Host Attention Bits for WT */
uint32_t work_ha_mask; /* HA Bits owned by WT */
uint32_t work_hs; /* HS stored in case of ERRAT */
uint32_t work_status[2]; /* Extra status from SLIM */
uint32_t hbq_in_use; /* HBQs in use flag */
uint32_t hbq_count; /* Count of configured HBQs */ struct hbq_s hbqs[LPFC_MAX_HBQS]; /* local copy of hbq indicies */
atomic_t fcp_qidx; /* next FCP WQ (RR Policy) */
atomic_t nvme_qidx; /* next NVME WQ (RR Policy) */
phys_addr_t pci_bar0_map; /* Physical address for PCI BAR0 */
phys_addr_t pci_bar1_map; /* Physical address for PCI BAR1 */
phys_addr_t pci_bar2_map; /* Physical address for PCI BAR2 */ void __iomem *slim_memmap_p; /* Kernel memory mapped address for
PCI BAR0 */ void __iomem *ctrl_regs_memmap_p;/* Kernel memory mapped address for
PCI BAR2 */
void __iomem *pci_bar0_memmap_p; /* Kernel memory mapped address for
PCI BAR0 with dual-ULP support */ void __iomem *pci_bar2_memmap_p; /* Kernel memory mapped address for
PCI BAR2 with dual-ULP support */ void __iomem *pci_bar4_memmap_p; /* Kernel memory mapped address for
PCI BAR4 with dual-ULP support */ #define PCI_64BIT_BAR0 0 #define PCI_64BIT_BAR2 2 #define PCI_64BIT_BAR4 4 void __iomem *MBslimaddr; /* virtual address for mbox cmds */ void __iomem *HAregaddr; /* virtual address for host attn reg */ void __iomem *CAregaddr; /* virtual address for chip attn reg */ void __iomem *HSregaddr; /* virtual address for host status
reg */ void __iomem *HCregaddr; /* virtual address for host ctl reg */
struct lpfc_hgp __iomem *host_gp; /* Host side get/put pointers */ struct lpfc_pgp *port_gp;
uint32_t __iomem *hbq_put; /* Address in SLIM to HBQ put ptrs */
uint32_t *hbq_get; /* Host mem address of HBQ get ptrs */
int brd_no; /* FC board number */ char SerialNumber[32]; /* adapter Serial Number */ char OptionROMVersion[32]; /* adapter BIOS / Fcode version */ char BIOSVersion[16]; /* Boot BIOS version */ char ModelDesc[256]; /* Model Description */ char ModelName[80]; /* Model Name */ char ProgramType[256]; /* Program Type */ char Port[20]; /* Port No */
uint8_t vpd_flag; /* VPD data flag */
#define VPD_MODEL_DESC 0x1 /* valid vpd model description */ #define VPD_MODEL_NAME 0x2 /* valid vpd model name */ #define VPD_PROGRAM_TYPE 0x4 /* valid vpd program type */ #define VPD_PORT 0x8 /* valid vpd port data */ #define VPD_MASK 0xf /* mask for any vpd data */
/* Used for deferred freeing of ELS data buffers */ struct list_head elsbuf; int elsbuf_cnt; int elsbuf_prev_cnt;
uint8_t temp_sensor_support; /* Fields used for heart beat. */ unsignedlong last_completion_time; unsignedlong skipped_hb; struct timer_list hb_tmofunc; struct timer_list rrq_tmr; enum hba_temp_state over_temp_state; /* * Following bit will be set for all buffer tags which are not * associated with any HBQ.
*/ #define QUE_BUFTAG_BIT (1<<31)
uint32_t buffer_tag_count;
/* Maximum number of events that can be outstanding at any time*/ #define LPFC_MAX_EVT_COUNT 512
atomic_t fast_event_count;
uint32_t fcoe_eventtag;
uint32_t fcoe_eventtag_at_fcf_scan;
uint32_t fcoe_cvl_eventtag;
uint32_t fcoe_cvl_eventtag_attn; struct lpfc_fcf fcf;
uint8_t fc_map[3];
uint8_t valid_vlan;
uint16_t vlan_id; struct list_head fcf_conn_rec_list;
/* Signal / FPIN handling for Congestion Mgmt */
u8 cgn_reg_fpin; /* Negotiated value from RDF */
u8 cgn_init_reg_fpin; /* Initial value from READ_CONFIG */ #define LPFC_CGN_FPIN_NONE 0x0 #define LPFC_CGN_FPIN_WARN 0x1 #define LPFC_CGN_FPIN_ALARM 0x2 #define LPFC_CGN_FPIN_BOTH (LPFC_CGN_FPIN_WARN | LPFC_CGN_FPIN_ALARM)
u8 cgn_reg_signal; /* Negotiated value from EDC */
u8 cgn_init_reg_signal; /* Initial value from READ_CONFIG */ /* cgn_reg_signal and cgn_init_reg_signal use * enum fc_edc_cg_signal_cap_types
*/
u16 cgn_fpin_frequency; /* In units of msecs */ #define LPFC_FPIN_INIT_FREQ 0xffff
u32 cgn_sig_freq;
u32 cgn_acqe_cnt;
/* RX monitor handling for CMF */ struct lpfc_rx_info_monitor *rx_monitor;
atomic_t rx_max_read_cnt; /* Maximum read bytes */
uint64_t rx_block_cnt;
/* Congestion parameters from flash */ struct lpfc_cgn_param cgn_p;
/* Statistics counter for ACQE cgn alarms and warnings */ struct lpfc_cgn_acqe_stat cgn_acqe_stat;
/* Congestion buffer information */ struct lpfc_dmabuf *cgn_i; /* Congestion Info buffer */
atomic_t cgn_fabric_warn_cnt; /* Total warning cgn events for info */
atomic_t cgn_fabric_alarm_cnt; /* Total alarm cgn events for info */
atomic_t cgn_sync_warn_cnt; /* Total warning events for SYNC wqe */
atomic_t cgn_sync_alarm_cnt; /* Total alarm events for SYNC wqe */
atomic_t cgn_driver_evt_cnt; /* Total driver cgn events for fmw */
atomic_t cgn_latency_evt_cnt;
atomic64_t cgn_latency_evt; /* Avg latency per minute */ unsignedlong cgn_evt_timestamp; #define LPFC_CGN_TIMER_TO_MIN 60000 /* ms in a minute */
uint32_t cgn_evt_minute; #define LPFC_SEC_MIN 60UL #define LPFC_MIN_HOUR 60 #define LPFC_HOUR_DAY 24 #define LPFC_MIN_DAY (LPFC_MIN_HOUR * LPFC_HOUR_DAY)
struct hlist_node cpuhp; /* used for cpuhp per hba callback */ struct timer_list cpuhp_poll_timer; struct list_head poll_list; /* slowpath eq polling list */ #define LPFC_POLL_HB 1 /* slowpath heartbeat */
#define LPFC_MAX_RXMONITOR_ENTRY 800 #define LPFC_MAX_RXMONITOR_DUMP 32 struct rx_info_entry {
uint64_t cmf_bytes; /* Total no of read bytes for CMF_SYNC_WQE */
uint64_t total_bytes; /* Total no of read bytes requested */
uint64_t rcv_bytes; /* Total no of read bytes completed */
uint64_t avg_io_size;
uint64_t avg_io_latency;/* Average io latency in microseconds */
uint64_t max_read_cnt; /* Maximum read bytes */
uint64_t max_bytes_per_interval;
uint32_t cmf_busy;
uint32_t cmf_info; /* CMF_SYNC_WQE info */
uint32_t io_cnt;
uint32_t timer_utilization;
uint32_t timer_interval;
};
struct lpfc_rx_info_monitor { struct rx_info_entry *ring; /* info organized in a circular buffer */
u32 head_idx, tail_idx; /* index to head/tail of ring */
spinlock_t lock; /* spinlock for ring */
u32 entries; /* storing number entries/size of ring */
};
staticinlineint
lpfc_sli_read_hs(struct lpfc_hba *phba)
{ /* * There was a link/board error. Read the status register to retrieve * the error event and process it.
*/
phba->sli.slistat.err_attn_event++;
/* Save status info and check for unplug error */ if (lpfc_readl(phba->HSregaddr, &phba->work_hs) ||
lpfc_readl(phba->MBslimaddr + 0xa8, &phba->work_status[0]) ||
lpfc_readl(phba->MBslimaddr + 0xac, &phba->work_status[1])) { return -EIO;
}
staticinlinestruct lpfc_sli_ring *
lpfc_phba_elsring(struct lpfc_hba *phba)
{ /* Return NULL if sli_rev has become invalid due to bad fw */ if (phba->sli_rev != LPFC_SLI_REV4 &&
phba->sli_rev != LPFC_SLI_REV3 &&
phba->sli_rev != LPFC_SLI_REV2) return NULL;
if (phba->sli_rev == LPFC_SLI_REV4) { if (phba->sli4_hba.els_wq) return phba->sli4_hba.els_wq->pring; else return NULL;
} return &phba->sli.sli3_ring[LPFC_ELS_RING];
}
/** * lpfc_next_online_cpu - Finds next online CPU on cpumask * @mask: Pointer to phba's cpumask member. * @start: starting cpu index * * Note: If no valid cpu found, then nr_cpu_ids is returned. *
**/ static __always_inline unsignedint
lpfc_next_online_cpu(conststruct cpumask *mask, unsignedint start)
{ return cpumask_next_and_wrap(start, mask, cpu_online_mask);
}
/** * lpfc_next_present_cpu - Finds next present CPU after n * @n: the cpu prior to search * * Note: If no next present cpu, then fallback to first present cpu. *
**/ static __always_inline unsignedint lpfc_next_present_cpu(int n)
{ return cpumask_next_wrap(n, cpu_present_mask);
}
/** * lpfc_sli4_mod_hba_eq_delay - update EQ delay * @phba: Pointer to HBA context object. * @q: The Event Queue to update. * @delay: The delay value (in us) to be written. *
**/ staticinlinevoid
lpfc_sli4_mod_hba_eq_delay(struct lpfc_hba *phba, struct lpfc_queue *eq,
u32 delay)
{ struct lpfc_register reg_data;
/* * Macro that declares tables and a routine to perform enum type to * ascii string lookup. * * Defines a <key,value> table for an enum. Uses xxx_INIT defines for * the enum to populate the table. Macro defines a routine (named * by caller) that will search all elements of the table for the key * and return the name string if found or "Unrecognized" if not found.
*/ #define DECLARE_ENUM2STR_LOOKUP(routine, enum_name, enum_init) \ staticstruct { \ enum enum_name value; \ char *name; \
} fc_##enum_name##_e2str_names[] = enum_init; \ staticconstchar *routine(enum enum_name table_key) \
{ \ int i; \ char *name = "Unrecognized"; \
\ for (i = 0; i < ARRAY_SIZE(fc_##enum_name##_e2str_names); i++) {\ if (fc_##enum_name##_e2str_names[i].value == table_key) {\
name = fc_##enum_name##_e2str_names[i].name; \ break; \
} \
} \ return name; \
}
/** * lpfc_is_vmid_enabled - returns if VMID is enabled for either switch types * @phba: Pointer to HBA context object. * * Relationship between the enable, target support and if vmid tag is required * for the particular combination * --------------------------------------------------- * Switch Enable Flag Target Support VMID Needed * --------------------------------------------------- * App Id 0 NA N * App Id 1 0 N * App Id 1 1 Y * Pr Tag 0 NA N * Pr Tag 1 0 N * Pr Tag 1 1 Y * Pr Tag 2 * Y --------------------------------------------------- *
**/ staticinlineint lpfc_is_vmid_enabled(struct lpfc_hba *phba)
{ return phba->cfg_vmid_app_header || phba->cfg_vmid_priority_tagging;
}
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