/******************************************************************* * This file is part of the Emulex Linux Device Driver for * * Fibre Channel Host Bus Adapters. * * Copyright (C) 2017-2025 Broadcom. All Rights Reserved. The term * * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. * * Copyright (C) 2009-2016 Emulex. All rights reserved. * * EMULEX and SLI are trademarks of Emulex. * * www.broadcom.com * * * * This program is free software; you can redistribute it and/or * * modify it under the terms of version 2 of the GNU General * * Public License as published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful. * * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * * TO BE LEGALLY INVALID. See the GNU General Public License for * * more details, a copy of which can be found in the file COPYING * * included with this package. * #include <uapi/scsi/fc/fc_fs.h>#include <uapi/scsi/fc/fc_els.h>/* Macros to deal with bit fields. Each bit field must have 3 #defines * associated with it (_SHIFT, _MASK, and _WORD). * EG. For a bit field that is in the 7th bit of the "field4" field of a * structure and is 2 bits in size the following #defines must exist: * struct temp { * uint32_t field1; * uint32_t field2; * uint32_t field3; * uint32_t field4; * #define example_bit_field_SHIFT 7 * #define example_bit_field_MASK 0x03 * #define example_bit_field_WORD field4 * uint32_t field5; * }; * Then the macros below may be used to get or set the value of that field. * EG. To get the value of the bit field from the above example: * struct temp t1; * value = bf_get(example_bit_field, &t1); * And then to set that bit field: * bf_set(example_bit_field, &t1, 2); * Or clear that bit field: * bf_set(example_bit_field, &t1, 0); #define bf_get_be32(name, ptr) \## _WORD) >> name## _SHIFT) & name## _MASK)#define bf_get_le32(name, ptr) \## _WORD) >> name## _SHIFT) & name## _MASK)#define bf_get(name, ptr) \## _WORD >> name## _SHIFT) & name## _MASK)#define bf_set_le32(name, ptr, value) \## _WORD = cpu_to_le32(((((value) & \## _MASK) << name## _SHIFT) | (le32_to_cpu((ptr)->name## _WORD) & \## _MASK << name## _SHIFT)))))#define bf_set(name, ptr, value) \## _WORD = ((((value) & name## _MASK) << name## _SHIFT) | \## _WORD & ~(name## _MASK << name## _SHIFT))))#define get_wqe_reqtag(x) (((x)->wqe.words[9] >> 0) & 0xFFFF)#define get_wqe_tmo(x) (((x)->wqe.words[7] >> 24) & 0x00FF)#define get_job_ulpword(x, y) ((x)->iocb.un.ulpWord[y])#define set_job_ulpstatus(x, y) bf_set(lpfc_wcqe_c_status, &(x)->wcqe_cmpl, y)#define set_job_ulpword4(x, y) ((&(x)->wcqe_cmpl)->parameter = y)struct dma_address {struct lpfc_sli_intf {#define lpfc_sli_intf_valid_SHIFT 29#define lpfc_sli_intf_valid_MASK 0x00000007#define lpfc_sli_intf_valid_WORD word0#define LPFC_SLI_INTF_VALID 6#define lpfc_sli_intf_sli_hint2_SHIFT 24#define lpfc_sli_intf_sli_hint2_MASK 0x0000001F#define lpfc_sli_intf_sli_hint2_WORD word0#define LPFC_SLI_INTF_SLI_HINT2_NONE 0#define lpfc_sli_intf_sli_hint1_SHIFT 16#define lpfc_sli_intf_sli_hint1_MASK 0x000000FF#define lpfc_sli_intf_sli_hint1_WORD word0#define LPFC_SLI_INTF_SLI_HINT1_NONE 0#define LPFC_SLI_INTF_SLI_HINT1_1 1#define LPFC_SLI_INTF_SLI_HINT1_2 2#define lpfc_sli_intf_if_type_SHIFT 12#define lpfc_sli_intf_if_type_MASK 0x0000000F#define lpfc_sli_intf_if_type_WORD word0#define LPFC_SLI_INTF_IF_TYPE_0 0#define LPFC_SLI_INTF_IF_TYPE_1 1#define LPFC_SLI_INTF_IF_TYPE_2 2#define LPFC_SLI_INTF_IF_TYPE_6 6#define lpfc_sli_intf_sli_family_SHIFT 8#define lpfc_sli_intf_sli_family_MASK 0x0000000F#define lpfc_sli_intf_sli_family_WORD word0#define LPFC_SLI_INTF_FAMILY_BE2 0x0#define LPFC_SLI_INTF_FAMILY_BE3 0x1#define LPFC_SLI_INTF_FAMILY_LNCR_A0 0xa#define LPFC_SLI_INTF_FAMILY_LNCR_B0 0xb#define LPFC_SLI_INTF_FAMILY_G6 0xc#define LPFC_SLI_INTF_FAMILY_G7 0xd#define LPFC_SLI_INTF_FAMILY_G7P 0xe#define lpfc_sli_intf_slirev_SHIFT 4#define lpfc_sli_intf_slirev_MASK 0x0000000F#define lpfc_sli_intf_slirev_WORD word0#define LPFC_SLI_INTF_REV_SLI3 3#define LPFC_SLI_INTF_REV_SLI4 4#define lpfc_sli_intf_func_type_SHIFT 0#define lpfc_sli_intf_func_type_MASK 0x00000001#define lpfc_sli_intf_func_type_WORD word0#define LPFC_SLI_INTF_IF_TYPE_PHYS 0#define LPFC_SLI_INTF_IF_TYPE_VIRT 1#define LPFC_SLI4_MBX_EMBED true #define LPFC_SLI4_MBX_NEMBED false #define LPFC_SLI4_MB_WORD_COUNT 64#define LPFC_MAX_MQ_PAGE 8#define LPFC_MAX_WQ_PAGE_V0 4#define LPFC_MAX_WQ_PAGE 8#define LPFC_MAX_RQ_PAGE 8#define LPFC_MAX_CQ_PAGE 4#define LPFC_MAX_EQ_PAGE 8#define LPFC_VIR_FUNC_MAX 32 /* Maximum number of virtual functions */ #define LPFC_PCI_FUNC_MAX 5 /* Maximum number of PCI functions */ #define LPFC_VFR_PAGE_SIZE 0x1000 /* 4KB BAR2 per-VF register page size */ /* Define SLI4 Alignment requirements. */ #define LPFC_ALIGN_16_BYTE 16#define LPFC_ALIGN_64_BYTE 64#define SLI4_PAGE_SIZE 4096/* Define SLI4 specific definitions. */ #define LPFC_MQ_CQE_BYTE_OFFSET 256#define LPFC_MBX_CMD_HDR_LENGTH 16#define LPFC_MBX_ERROR_RANGE 0x4000#define LPFC_BMBX_BIT1_ADDR_HI 0x2#define LPFC_BMBX_BIT1_ADDR_LO 0#define LPFC_RPI_HDR_COUNT 64#define LPFC_HDR_TEMPLATE_SIZE 4096#define LPFC_RPI_ALLOC_ERROR 0xFFFF#define LPFC_FCF_RECORD_WD_CNT 132#define LPFC_ENTIRE_FCF_DATABASE 0#define LPFC_DFLT_FCF_INDEX 0/* Virtual function numbers */ #define LPFC_VF0 0#define LPFC_VF1 1#define LPFC_VF2 2#define LPFC_VF3 3#define LPFC_VF4 4#define LPFC_VF5 5#define LPFC_VF6 6#define LPFC_VF7 7#define LPFC_VF8 8#define LPFC_VF9 9#define LPFC_VF10 10#define LPFC_VF11 11#define LPFC_VF12 12#define LPFC_VF13 13#define LPFC_VF14 14#define LPFC_VF15 15#define LPFC_VF16 16#define LPFC_VF17 17#define LPFC_VF18 18#define LPFC_VF19 19#define LPFC_VF20 20#define LPFC_VF21 21#define LPFC_VF22 22#define LPFC_VF23 23#define LPFC_VF24 24#define LPFC_VF25 25#define LPFC_VF26 26#define LPFC_VF27 27#define LPFC_VF28 28#define LPFC_VF29 29#define LPFC_VF30 30#define LPFC_VF31 31/* PCI function numbers */ #define LPFC_PCI_FUNC0 0#define LPFC_PCI_FUNC1 1#define LPFC_PCI_FUNC2 2#define LPFC_PCI_FUNC3 3#define LPFC_PCI_FUNC4 4/* SLI4 interface type-2 PDEV_CTL register */ #define LPFC_CTL_PDEV_CTL_OFFSET 0x414#define LPFC_CTL_PDEV_CTL_DRST 0x00000001#define LPFC_CTL_PDEV_CTL_FRST 0x00000002#define LPFC_CTL_PDEV_CTL_DD 0x00000004#define LPFC_CTL_PDEV_CTL_LC 0x00000008#define LPFC_CTL_PDEV_CTL_FRL_ALL 0x00#define LPFC_CTL_PDEV_CTL_FRL_FC_FCOE 0x10#define LPFC_CTL_PDEV_CTL_FRL_NIC 0x20#define LPFC_CTL_PDEV_CTL_DDL_RAS 0x1000000#define LPFC_FW_DUMP_REQUEST (LPFC_CTL_PDEV_CTL_DD | LPFC_CTL_PDEV_CTL_FRST)/* Active interrupt test count */ #define LPFC_ACT_INTR_CNT 4/* Algrithmns for scheduling FCP commands to WQs */ #define LPFC_FCP_SCHED_BY_HDWQ 0#define LPFC_FCP_SCHED_BY_CPU 1/* Algrithmns for NameServer Query after RSCN */ #define LPFC_NS_QUERY_GID_FT 0#define LPFC_NS_QUERY_GID_PT 1/* Delay Multiplier constant */ #define LPFC_DMULT_CONST 651042#define LPFC_DMULT_MAX 1023/* Configuration of Interrupts / sec for entire HBA port */ #define LPFC_MIN_IMAX 5000#define LPFC_MAX_IMAX 5000000#define LPFC_DEF_IMAX 0#define LPFC_MAX_AUTO_EQ_DELAY 120#define LPFC_EQ_DELAY_STEP 15#define LPFC_EQD_ISR_TRIGGER 20000/* 1s intervals */ #define LPFC_EQ_DELAY_MSECS 1000#define LPFC_MIN_CPU_MAP 0#define LPFC_MAX_CPU_MAP 1#define LPFC_HBA_CPU_MAP 1/* PORT_CAPABILITIES constants. */ #define LPFC_MAX_SUPPORTED_PAGES 8enum ulp_bde64_word3 {/* BDE (Host_resident) */ /* Immediate Data BDE */ /* BDE (Port-resident) */ /* Input BDE (Host-resident) */ /* Input BDE (Port-resident) */ /* BLP (Host-resident) */ /* BLP (Port-resident) */ struct ulp_bde64_le {/* type 31:24, size 23:0 */ struct ulp_bde64 {union ULP_BDE_TUS {struct {#ifdef __BIG_ENDIAN_BITFIELD/* BDE Flags 0 IS A SUPPORTED /* Size of buffer (in bytes) */ #else /* __LITTLE_ENDIAN_BITFIELD */ /* Size of buffer (in bytes) */ /* BDE Flags 0 IS A SUPPORTED #endif #define BUFF_TYPE_BDE_64 0x00 /* BDE (Host_resident) */ #define BUFF_TYPE_BDE_IMMED 0x01 /* Immediate Data BDE */ #define BUFF_TYPE_BDE_64P 0x02 /* BDE (Port-resident) */ #define BUFF_TYPE_BDE_64I 0x08 /* Input BDE (Host-resident) */ #define BUFF_TYPE_BDE_64IP 0x0A /* Input BDE (Port-resident) */ #define BUFF_TYPE_BLP_64 0x40 /* BLP (Host-resident) */ #define BUFF_TYPE_BLP_64P 0x42 /* BLP (Port-resident) */ /* Maximun size of immediate data that can fit into a 128 byte WQE */ #define LPFC_MAX_BDE_IMM_SIZE 64struct lpfc_sli4_flags {#define lpfc_idx_rsrc_rdy_SHIFT 0#define lpfc_idx_rsrc_rdy_MASK 0x00000001#define lpfc_idx_rsrc_rdy_WORD word0#define LPFC_IDX_RSRC_RDY 1#define lpfc_rpi_rsrc_rdy_SHIFT 1#define lpfc_rpi_rsrc_rdy_MASK 0x00000001#define lpfc_rpi_rsrc_rdy_WORD word0#define LPFC_RPI_RSRC_RDY 1#define lpfc_vpi_rsrc_rdy_SHIFT 2#define lpfc_vpi_rsrc_rdy_MASK 0x00000001#define lpfc_vpi_rsrc_rdy_WORD word0#define LPFC_VPI_RSRC_RDY 1#define lpfc_vfi_rsrc_rdy_SHIFT 3#define lpfc_vfi_rsrc_rdy_MASK 0x00000001#define lpfc_vfi_rsrc_rdy_WORD word0#define LPFC_VFI_RSRC_RDY 1#define lpfc_ftr_ashdr_SHIFT 4#define lpfc_ftr_ashdr_MASK 0x00000001#define lpfc_ftr_ashdr_WORD word0struct sli4_bls_rsp {/* Word0 must be reserved */ #define lpfc_abts_orig_SHIFT 0#define lpfc_abts_orig_MASK 0x00000001#define lpfc_abts_orig_WORD word1#define LPFC_ABTS_UNSOL_RSP 1#define LPFC_ABTS_UNSOL_INT 0#define lpfc_abts_rxid_SHIFT 0#define lpfc_abts_rxid_MASK 0x0000FFFF#define lpfc_abts_rxid_WORD word2#define lpfc_abts_oxid_SHIFT 16#define lpfc_abts_oxid_MASK 0x0000FFFF#define lpfc_abts_oxid_WORD word2#define lpfc_vndr_code_SHIFT 0#define lpfc_vndr_code_MASK 0x000000FF#define lpfc_vndr_code_WORD word3#define lpfc_rsn_expln_SHIFT 8#define lpfc_rsn_expln_MASK 0x000000FF#define lpfc_rsn_expln_WORD word3#define lpfc_rsn_code_SHIFT 16#define lpfc_rsn_code_MASK 0x000000FF#define lpfc_rsn_code_WORD word3/* Word5 must be reserved */ /* event queue entry structure */ struct lpfc_eqe {#define lpfc_eqe_resource_id_SHIFT 16#define lpfc_eqe_resource_id_MASK 0x0000FFFF#define lpfc_eqe_resource_id_WORD word0#define lpfc_eqe_minor_code_SHIFT 4#define lpfc_eqe_minor_code_MASK 0x00000FFF#define lpfc_eqe_minor_code_WORD word0#define lpfc_eqe_major_code_SHIFT 1#define lpfc_eqe_major_code_MASK 0x00000007#define lpfc_eqe_major_code_WORD word0#define lpfc_eqe_valid_SHIFT 0#define lpfc_eqe_valid_MASK 0x00000001#define lpfc_eqe_valid_WORD word0/* completion queue entry structure (common fields for all cqe types) */ struct lpfc_cqe {#define lpfc_cqe_valid_SHIFT 31#define lpfc_cqe_valid_MASK 0x00000001#define lpfc_cqe_valid_WORD word3#define lpfc_cqe_code_SHIFT 16#define lpfc_cqe_code_MASK 0x000000FF#define lpfc_cqe_code_WORD word3/* Completion Queue Entry Status Codes */ #define CQE_STATUS_SUCCESS 0x0#define CQE_STATUS_FCP_RSP_FAILURE 0x1#define CQE_STATUS_REMOTE_STOP 0x2#define CQE_STATUS_LOCAL_REJECT 0x3#define CQE_STATUS_NPORT_RJT 0x4#define CQE_STATUS_FABRIC_RJT 0x5#define CQE_STATUS_NPORT_BSY 0x6#define CQE_STATUS_FABRIC_BSY 0x7#define CQE_STATUS_INTERMED_RSP 0x8#define CQE_STATUS_LS_RJT 0x9#define CQE_STATUS_CMD_REJECT 0xb#define CQE_STATUS_FCP_TGT_LENCHECK 0xc#define CQE_STATUS_NEED_BUFF_ENTRY 0xf#define CQE_STATUS_DI_ERROR 0x16/* Status returned by hardware (valid only if status = CQE_STATUS_SUCCESS). */ #define CQE_HW_STATUS_NO_ERR 0x0#define CQE_HW_STATUS_UNDERRUN 0x1#define CQE_HW_STATUS_OVERRUN 0x2/* Completion Queue Entry Codes */ #define CQE_CODE_COMPL_WQE 0x1#define CQE_CODE_RELEASE_WQE 0x2#define CQE_CODE_RECEIVE 0x4#define CQE_CODE_XRI_ABORTED 0x5#define CQE_CODE_RECEIVE_V1 0x9#define CQE_CODE_NVME_ERSP 0xd/* * Define mask value for xri_aborted and wcqe completed CQE extended status. * Currently, extended status is limited to 9 bits (0x0 -> 0x103) . #define WCQE_PARAM_MASK 0x1FF/* completion queue entry for wqe completions */ struct lpfc_wcqe_complete {#define lpfc_wcqe_c_request_tag_SHIFT 16#define lpfc_wcqe_c_request_tag_MASK 0x0000FFFF#define lpfc_wcqe_c_request_tag_WORD word0#define lpfc_wcqe_c_status_SHIFT 8#define lpfc_wcqe_c_status_MASK 0x000000FF#define lpfc_wcqe_c_status_WORD word0#define lpfc_wcqe_c_hw_status_SHIFT 0#define lpfc_wcqe_c_hw_status_MASK 0x000000FF#define lpfc_wcqe_c_hw_status_WORD word0#define lpfc_wcqe_c_ersp0_SHIFT 0#define lpfc_wcqe_c_ersp0_MASK 0x0000FFFF#define lpfc_wcqe_c_ersp0_WORD word0#define lpfc_wcqe_c_cmf_cg_SHIFT 31#define lpfc_wcqe_c_cmf_cg_MASK 0x00000001#define lpfc_wcqe_c_cmf_cg_WORD total_data_placed#define lpfc_wcqe_c_cmf_bw_SHIFT 0#define lpfc_wcqe_c_cmf_bw_MASK 0x0FFFFFFF#define lpfc_wcqe_c_cmf_bw_WORD total_data_placed#define lpfc_wcqe_c_bg_edir_SHIFT 5#define lpfc_wcqe_c_bg_edir_MASK 0x00000001#define lpfc_wcqe_c_bg_edir_WORD parameter#define lpfc_wcqe_c_bg_tdpv_SHIFT 3#define lpfc_wcqe_c_bg_tdpv_MASK 0x00000001#define lpfc_wcqe_c_bg_tdpv_WORD parameter#define lpfc_wcqe_c_bg_re_SHIFT 2#define lpfc_wcqe_c_bg_re_MASK 0x00000001#define lpfc_wcqe_c_bg_re_WORD parameter#define lpfc_wcqe_c_bg_ae_SHIFT 1#define lpfc_wcqe_c_bg_ae_MASK 0x00000001#define lpfc_wcqe_c_bg_ae_WORD parameter#define lpfc_wcqe_c_bg_ge_SHIFT 0#define lpfc_wcqe_c_bg_ge_MASK 0x00000001#define lpfc_wcqe_c_bg_ge_WORD parameter#define lpfc_wcqe_c_valid_SHIFT lpfc_cqe_valid_SHIFT#define lpfc_wcqe_c_valid_MASK lpfc_cqe_valid_MASK#define lpfc_wcqe_c_valid_WORD lpfc_cqe_valid_WORD#define lpfc_wcqe_c_xb_SHIFT 28#define lpfc_wcqe_c_xb_MASK 0x00000001#define lpfc_wcqe_c_xb_WORD word3#define lpfc_wcqe_c_pv_SHIFT 27#define lpfc_wcqe_c_pv_MASK 0x00000001#define lpfc_wcqe_c_pv_WORD word3#define lpfc_wcqe_c_priority_SHIFT 24#define lpfc_wcqe_c_priority_MASK 0x00000007#define lpfc_wcqe_c_priority_WORD word3#define lpfc_wcqe_c_code_SHIFT lpfc_cqe_code_SHIFT#define lpfc_wcqe_c_code_MASK lpfc_cqe_code_MASK#define lpfc_wcqe_c_code_WORD lpfc_cqe_code_WORD#define lpfc_wcqe_c_sqhead_SHIFT 0#define lpfc_wcqe_c_sqhead_MASK 0x0000FFFF#define lpfc_wcqe_c_sqhead_WORD word3/* completion queue entry for wqe release */ struct lpfc_wcqe_release {#define lpfc_wcqe_r_wq_id_SHIFT 16#define lpfc_wcqe_r_wq_id_MASK 0x0000FFFF#define lpfc_wcqe_r_wq_id_WORD word2#define lpfc_wcqe_r_wqe_index_SHIFT 0#define lpfc_wcqe_r_wqe_index_MASK 0x0000FFFF#define lpfc_wcqe_r_wqe_index_WORD word2#define lpfc_wcqe_r_valid_SHIFT lpfc_cqe_valid_SHIFT#define lpfc_wcqe_r_valid_MASK lpfc_cqe_valid_MASK#define lpfc_wcqe_r_valid_WORD lpfc_cqe_valid_WORD#define lpfc_wcqe_r_code_SHIFT lpfc_cqe_code_SHIFT#define lpfc_wcqe_r_code_MASK lpfc_cqe_code_MASK#define lpfc_wcqe_r_code_WORD lpfc_cqe_code_WORDstruct sli4_wcqe_xri_aborted {#define lpfc_wcqe_xa_status_SHIFT 8#define lpfc_wcqe_xa_status_MASK 0x000000FF#define lpfc_wcqe_xa_status_WORD word0#define lpfc_wcqe_xa_remote_xid_SHIFT 16#define lpfc_wcqe_xa_remote_xid_MASK 0x0000FFFF#define lpfc_wcqe_xa_remote_xid_WORD word2#define lpfc_wcqe_xa_xri_SHIFT 0#define lpfc_wcqe_xa_xri_MASK 0x0000FFFF#define lpfc_wcqe_xa_xri_WORD word2#define lpfc_wcqe_xa_valid_SHIFT lpfc_cqe_valid_SHIFT#define lpfc_wcqe_xa_valid_MASK lpfc_cqe_valid_MASK#define lpfc_wcqe_xa_valid_WORD lpfc_cqe_valid_WORD#define lpfc_wcqe_xa_ia_SHIFT 30#define lpfc_wcqe_xa_ia_MASK 0x00000001#define lpfc_wcqe_xa_ia_WORD word3#define CQE_XRI_ABORTED_IA_REMOTE 0#define CQE_XRI_ABORTED_IA_LOCAL 1#define lpfc_wcqe_xa_br_SHIFT 29#define lpfc_wcqe_xa_br_MASK 0x00000001#define lpfc_wcqe_xa_br_WORD word3#define CQE_XRI_ABORTED_BR_BA_ACC 0#define CQE_XRI_ABORTED_BR_BA_RJT 1#define lpfc_wcqe_xa_eo_SHIFT 28#define lpfc_wcqe_xa_eo_MASK 0x00000001#define lpfc_wcqe_xa_eo_WORD word3#define CQE_XRI_ABORTED_EO_REMOTE 0#define CQE_XRI_ABORTED_EO_LOCAL 1#define lpfc_wcqe_xa_code_SHIFT lpfc_cqe_code_SHIFT#define lpfc_wcqe_xa_code_MASK lpfc_cqe_code_MASK#define lpfc_wcqe_xa_code_WORD lpfc_cqe_code_WORD/* completion queue entry structure for rqe completion */ struct lpfc_rcqe {#define lpfc_rcqe_iv_SHIFT 31#define lpfc_rcqe_iv_MASK 0x00000001#define lpfc_rcqe_iv_WORD word0#define lpfc_rcqe_status_SHIFT 8#define lpfc_rcqe_status_MASK 0x000000FF#define lpfc_rcqe_status_WORD word0#define FC_STATUS_RQ_SUCCESS 0x10 /* Async receive successful */ #define FC_STATUS_RQ_BUF_LEN_EXCEEDED 0x11 /* payload truncated */ #define FC_STATUS_INSUFF_BUF_NEED_BUF 0x12 /* Insufficient buffers */ #define FC_STATUS_INSUFF_BUF_FRM_DISC 0x13 /* Frame Discard */ #define FC_STATUS_RQ_DMA_FAILURE 0x14 /* DMA failure */ #define lpfc_rcqe_fcf_id_v1_SHIFT 0#define lpfc_rcqe_fcf_id_v1_MASK 0x0000003F#define lpfc_rcqe_fcf_id_v1_WORD word1#define lpfc_rcqe_length_SHIFT 16#define lpfc_rcqe_length_MASK 0x0000FFFF#define lpfc_rcqe_length_WORD word2#define lpfc_rcqe_rq_id_SHIFT 6#define lpfc_rcqe_rq_id_MASK 0x000003FF#define lpfc_rcqe_rq_id_WORD word2#define lpfc_rcqe_fcf_id_SHIFT 0#define lpfc_rcqe_fcf_id_MASK 0x0000003F#define lpfc_rcqe_fcf_id_WORD word2#define lpfc_rcqe_rq_id_v1_SHIFT 0#define lpfc_rcqe_rq_id_v1_MASK 0x0000FFFF#define lpfc_rcqe_rq_id_v1_WORD word2#define lpfc_rcqe_valid_SHIFT lpfc_cqe_valid_SHIFT#define lpfc_rcqe_valid_MASK lpfc_cqe_valid_MASK#define lpfc_rcqe_valid_WORD lpfc_cqe_valid_WORD#define lpfc_rcqe_port_SHIFT 30#define lpfc_rcqe_port_MASK 0x00000001#define lpfc_rcqe_port_WORD word3#define lpfc_rcqe_hdr_length_SHIFT 24#define lpfc_rcqe_hdr_length_MASK 0x0000001F#define lpfc_rcqe_hdr_length_WORD word3#define lpfc_rcqe_code_SHIFT lpfc_cqe_code_SHIFT#define lpfc_rcqe_code_MASK lpfc_cqe_code_MASK#define lpfc_rcqe_code_WORD lpfc_cqe_code_WORD#define lpfc_rcqe_eof_SHIFT 8#define lpfc_rcqe_eof_MASK 0x000000FF#define lpfc_rcqe_eof_WORD word3#define FCOE_EOFn 0x41#define FCOE_EOFt 0x42#define FCOE_EOFni 0x49#define FCOE_EOFa 0x50#define lpfc_rcqe_sof_SHIFT 0#define lpfc_rcqe_sof_MASK 0x000000FF#define lpfc_rcqe_sof_WORD word3#define FCOE_SOFi2 0x2d#define FCOE_SOFi3 0x2e#define FCOE_SOFn2 0x35#define FCOE_SOFn3 0x36struct lpfc_rqe {/* buffer descriptors */ struct lpfc_bde4 {#define lpfc_bde4_last_SHIFT 31#define lpfc_bde4_last_MASK 0x00000001#define lpfc_bde4_last_WORD word2#define lpfc_bde4_sge_offset_SHIFT 0#define lpfc_bde4_sge_offset_MASK 0x000003FF#define lpfc_bde4_sge_offset_WORD word2#define lpfc_bde4_length_SHIFT 0#define lpfc_bde4_length_MASK 0x000000FF#define lpfc_bde4_length_WORD word3struct lpfc_register {#define LPFC_PORT_SEM_UE_RECOVERABLE 0xE000#define LPFC_PORT_SEM_MASK 0xF000/* The following BAR0 Registers apply to SLI4 if_type 0 UCNAs. */ #define LPFC_UERR_STATUS_HI 0x00A4#define LPFC_UERR_STATUS_LO 0x00A0#define LPFC_UE_MASK_HI 0x00AC#define LPFC_UE_MASK_LO 0x00A8/* The following BAR0 register sets are defined for if_type 0 and 2 UCNAs. */ #define LPFC_SLI_INTF 0x0058#define LPFC_SLI_ASIC_VER 0x009C#define LPFC_CTL_PORT_SEM_OFFSET 0x400#define lpfc_port_smphr_perr_SHIFT 31#define lpfc_port_smphr_perr_MASK 0x1#define lpfc_port_smphr_perr_WORD word0#define lpfc_port_smphr_sfi_SHIFT 30#define lpfc_port_smphr_sfi_MASK 0x1#define lpfc_port_smphr_sfi_WORD word0#define lpfc_port_smphr_nip_SHIFT 29#define lpfc_port_smphr_nip_MASK 0x1#define lpfc_port_smphr_nip_WORD word0#define lpfc_port_smphr_ipc_SHIFT 28#define lpfc_port_smphr_ipc_MASK 0x1#define lpfc_port_smphr_ipc_WORD word0#define lpfc_port_smphr_scr1_SHIFT 27#define lpfc_port_smphr_scr1_MASK 0x1#define lpfc_port_smphr_scr1_WORD word0#define lpfc_port_smphr_scr2_SHIFT 26#define lpfc_port_smphr_scr2_MASK 0x1#define lpfc_port_smphr_scr2_WORD word0#define lpfc_port_smphr_host_scratch_SHIFT 16#define lpfc_port_smphr_host_scratch_MASK 0xFF#define lpfc_port_smphr_host_scratch_WORD word0#define lpfc_port_smphr_port_status_SHIFT 0#define lpfc_port_smphr_port_status_MASK 0xFFFF#define lpfc_port_smphr_port_status_WORD word0#define LPFC_POST_STAGE_POWER_ON_RESET 0x0000#define LPFC_POST_STAGE_AWAITING_HOST_RDY 0x0001#define LPFC_POST_STAGE_HOST_RDY 0x0002#define LPFC_POST_STAGE_BE_RESET 0x0003#define LPFC_POST_STAGE_SEEPROM_CS_START 0x0100#define LPFC_POST_STAGE_SEEPROM_CS_DONE 0x0101#define LPFC_POST_STAGE_DDR_CONFIG_START 0x0200#define LPFC_POST_STAGE_DDR_CONFIG_DONE 0x0201#define LPFC_POST_STAGE_DDR_CALIBRATE_START 0x0300#define LPFC_POST_STAGE_DDR_CALIBRATE_DONE 0x0301#define LPFC_POST_STAGE_DDR_TEST_START 0x0400#define LPFC_POST_STAGE_DDR_TEST_DONE 0x0401#define LPFC_POST_STAGE_REDBOOT_INIT_START 0x0600#define LPFC_POST_STAGE_REDBOOT_INIT_DONE 0x0601#define LPFC_POST_STAGE_FW_IMAGE_LOAD_START 0x0700#define LPFC_POST_STAGE_FW_IMAGE_LOAD_DONE 0x0701#define LPFC_POST_STAGE_ARMFW_START 0x0800#define LPFC_POST_STAGE_DHCP_QUERY_START 0x0900#define LPFC_POST_STAGE_DHCP_QUERY_DONE 0x0901#define LPFC_POST_STAGE_BOOT_TARGET_DISCOVERY_START 0x0A00#define LPFC_POST_STAGE_BOOT_TARGET_DISCOVERY_DONE 0x0A01#define LPFC_POST_STAGE_RC_OPTION_SET 0x0B00#define LPFC_POST_STAGE_SWITCH_LINK 0x0B01#define LPFC_POST_STAGE_SEND_ICDS_MESSAGE 0x0B02#define LPFC_POST_STAGE_PERFROM_TFTP 0x0B03#define LPFC_POST_STAGE_PARSE_XML 0x0B04#define LPFC_POST_STAGE_DOWNLOAD_IMAGE 0x0B05#define LPFC_POST_STAGE_FLASH_IMAGE 0x0B06#define LPFC_POST_STAGE_RC_DONE 0x0B07#define LPFC_POST_STAGE_REBOOT_SYSTEM 0x0B08#define LPFC_POST_STAGE_MAC_ADDRESS 0x0C00#define LPFC_POST_STAGE_PORT_READY 0xC000#define LPFC_POST_STAGE_PORT_UE 0xF000#define LPFC_CTL_PORT_STA_OFFSET 0x404#define lpfc_sliport_status_err_SHIFT 31#define lpfc_sliport_status_err_MASK 0x1#define lpfc_sliport_status_err_WORD word0#define lpfc_sliport_status_end_SHIFT 30#define lpfc_sliport_status_end_MASK 0x1#define lpfc_sliport_status_end_WORD word0#define lpfc_sliport_status_oti_SHIFT 29#define lpfc_sliport_status_oti_MASK 0x1#define lpfc_sliport_status_oti_WORD word0#define lpfc_sliport_status_dip_SHIFT 25#define lpfc_sliport_status_dip_MASK 0x1#define lpfc_sliport_status_dip_WORD word0#define lpfc_sliport_status_rn_SHIFT 24#define lpfc_sliport_status_rn_MASK 0x1#define lpfc_sliport_status_rn_WORD word0#define lpfc_sliport_status_rdy_SHIFT 23#define lpfc_sliport_status_rdy_MASK 0x1#define lpfc_sliport_status_rdy_WORD word0#define lpfc_sliport_status_pldv_SHIFT 0#define lpfc_sliport_status_pldv_MASK 0x1#define lpfc_sliport_status_pldv_WORD word0#define CFG_PLD 0x3C#define MAX_IF_TYPE_2_RESETS 6#define LPFC_CTL_PORT_CTL_OFFSET 0x408#define lpfc_sliport_ctrl_end_SHIFT 30#define lpfc_sliport_ctrl_end_MASK 0x1#define lpfc_sliport_ctrl_end_WORD word0#define LPFC_SLIPORT_LITTLE_ENDIAN 0#define LPFC_SLIPORT_BIG_ENDIAN 1#define lpfc_sliport_ctrl_ip_SHIFT 27#define lpfc_sliport_ctrl_ip_MASK 0x1#define lpfc_sliport_ctrl_ip_WORD word0#define LPFC_SLIPORT_INIT_PORT 1#define LPFC_CTL_PORT_ER1_OFFSET 0x40C#define LPFC_CTL_PORT_ER2_OFFSET 0x410#define LPFC_CTL_PORT_EQ_DELAY_OFFSET 0x418#define lpfc_sliport_eqdelay_delay_SHIFT 16#define lpfc_sliport_eqdelay_delay_MASK 0xffff#define lpfc_sliport_eqdelay_delay_WORD word0#define lpfc_sliport_eqdelay_id_SHIFT 0#define lpfc_sliport_eqdelay_id_MASK 0xfff#define lpfc_sliport_eqdelay_id_WORD word0#define LPFC_SEC_TO_USEC 1000000#define LPFC_SEC_TO_MSEC 1000#define LPFC_MSECS_TO_SECS(msecs) ((msecs) / 1000)/* The following Registers apply to SLI4 if_type 0 UCNAs. They typically * reside in BAR 2. #define LPFC_SLIPORT_IF0_SMPHR 0x00AC#define LPFC_IMR_MASK_ALL 0xFFFFFFFF#define LPFC_ISCR_CLEAR_ALL 0xFFFFFFFF#define LPFC_HST_ISR0 0x0C18#define LPFC_HST_ISR1 0x0C1C#define LPFC_HST_ISR2 0x0C20#define LPFC_HST_ISR3 0x0C24#define LPFC_HST_ISR4 0x0C28#define LPFC_HST_IMR0 0x0C48#define LPFC_HST_IMR1 0x0C4C#define LPFC_HST_IMR2 0x0C50#define LPFC_HST_IMR3 0x0C54#define LPFC_HST_IMR4 0x0C58#define LPFC_HST_ISCR0 0x0C78#define LPFC_HST_ISCR1 0x0C7C#define LPFC_HST_ISCR2 0x0C80#define LPFC_HST_ISCR3 0x0C84#define LPFC_HST_ISCR4 0x0C88#define LPFC_SLI4_INTR0 BIT0#define LPFC_SLI4_INTR1 BIT1#define LPFC_SLI4_INTR2 BIT2#define LPFC_SLI4_INTR3 BIT3#define LPFC_SLI4_INTR4 BIT4#define LPFC_SLI4_INTR5 BIT5#define LPFC_SLI4_INTR6 BIT6#define LPFC_SLI4_INTR7 BIT7#define LPFC_SLI4_INTR8 BIT8#define LPFC_SLI4_INTR9 BIT9#define LPFC_SLI4_INTR10 BIT10#define LPFC_SLI4_INTR11 BIT11#define LPFC_SLI4_INTR12 BIT12#define LPFC_SLI4_INTR13 BIT13#define LPFC_SLI4_INTR14 BIT14#define LPFC_SLI4_INTR15 BIT15#define LPFC_SLI4_INTR16 BIT16#define LPFC_SLI4_INTR17 BIT17#define LPFC_SLI4_INTR18 BIT18#define LPFC_SLI4_INTR19 BIT19#define LPFC_SLI4_INTR20 BIT20#define LPFC_SLI4_INTR21 BIT21#define LPFC_SLI4_INTR22 BIT22#define LPFC_SLI4_INTR23 BIT23#define LPFC_SLI4_INTR24 BIT24#define LPFC_SLI4_INTR25 BIT25#define LPFC_SLI4_INTR26 BIT26#define LPFC_SLI4_INTR27 BIT27#define LPFC_SLI4_INTR28 BIT28#define LPFC_SLI4_INTR29 BIT29#define LPFC_SLI4_INTR30 BIT30#define LPFC_SLI4_INTR31 BIT31/* * The Doorbell registers defined here exist in different BAR * register sets depending on the UCNA Port's reported if_type * value. For UCNA ports running SLI4 and if_type 0, they reside in * BAR4. For UCNA ports running SLI4 and if_type 2, they reside in * BAR0. For FC ports running SLI4 and if_type 6, they reside in * BAR2. The offsets and base address are different, so the driver * has to compute the register addresses accordingly #define LPFC_ULP0_RQ_DOORBELL 0x00A0#define LPFC_ULP1_RQ_DOORBELL 0x00C0#define LPFC_IF6_RQ_DOORBELL 0x0080#define lpfc_rq_db_list_fm_num_posted_SHIFT 24#define lpfc_rq_db_list_fm_num_posted_MASK 0x00FF#define lpfc_rq_db_list_fm_num_posted_WORD word0#define lpfc_rq_db_list_fm_index_SHIFT 16#define lpfc_rq_db_list_fm_index_MASK 0x00FF#define lpfc_rq_db_list_fm_index_WORD word0#define lpfc_rq_db_list_fm_id_SHIFT 0#define lpfc_rq_db_list_fm_id_MASK 0xFFFF#define lpfc_rq_db_list_fm_id_WORD word0#define lpfc_rq_db_ring_fm_num_posted_SHIFT 16#define lpfc_rq_db_ring_fm_num_posted_MASK 0x3FFF#define lpfc_rq_db_ring_fm_num_posted_WORD word0#define lpfc_rq_db_ring_fm_id_SHIFT 0#define lpfc_rq_db_ring_fm_id_MASK 0xFFFF#define lpfc_rq_db_ring_fm_id_WORD word0#define LPFC_ULP0_WQ_DOORBELL 0x0040#define LPFC_ULP1_WQ_DOORBELL 0x0060#define lpfc_wq_db_list_fm_num_posted_SHIFT 24#define lpfc_wq_db_list_fm_num_posted_MASK 0x00FF#define lpfc_wq_db_list_fm_num_posted_WORD word0#define lpfc_wq_db_list_fm_index_SHIFT 16#define lpfc_wq_db_list_fm_index_MASK 0x00FF#define lpfc_wq_db_list_fm_index_WORD word0#define lpfc_wq_db_list_fm_id_SHIFT 0#define lpfc_wq_db_list_fm_id_MASK 0xFFFF#define lpfc_wq_db_list_fm_id_WORD word0#define lpfc_wq_db_ring_fm_num_posted_SHIFT 16#define lpfc_wq_db_ring_fm_num_posted_MASK 0x3FFF#define lpfc_wq_db_ring_fm_num_posted_WORD word0#define lpfc_wq_db_ring_fm_id_SHIFT 0#define lpfc_wq_db_ring_fm_id_MASK 0xFFFF#define lpfc_wq_db_ring_fm_id_WORD word0#define LPFC_IF6_WQ_DOORBELL 0x0040#define lpfc_if6_wq_db_list_fm_num_posted_SHIFT 24#define lpfc_if6_wq_db_list_fm_num_posted_MASK 0x00FF#define lpfc_if6_wq_db_list_fm_num_posted_WORD word0#define lpfc_if6_wq_db_list_fm_dpp_SHIFT 23#define lpfc_if6_wq_db_list_fm_dpp_MASK 0x0001#define lpfc_if6_wq_db_list_fm_dpp_WORD word0#define lpfc_if6_wq_db_list_fm_dpp_id_SHIFT 16#define lpfc_if6_wq_db_list_fm_dpp_id_MASK 0x001F#define lpfc_if6_wq_db_list_fm_dpp_id_WORD word0#define lpfc_if6_wq_db_list_fm_id_SHIFT 0#define lpfc_if6_wq_db_list_fm_id_MASK 0xFFFF#define lpfc_if6_wq_db_list_fm_id_WORD word0#define LPFC_EQCQ_DOORBELL 0x0120#define lpfc_eqcq_doorbell_se_SHIFT 31#define lpfc_eqcq_doorbell_se_MASK 0x0001#define lpfc_eqcq_doorbell_se_WORD word0#define LPFC_EQCQ_SOLICIT_ENABLE_OFF 0#define LPFC_EQCQ_SOLICIT_ENABLE_ON 1#define lpfc_eqcq_doorbell_arm_SHIFT 29#define lpfc_eqcq_doorbell_arm_MASK 0x0001#define lpfc_eqcq_doorbell_arm_WORD word0#define lpfc_eqcq_doorbell_num_released_SHIFT 16#define lpfc_eqcq_doorbell_num_released_MASK 0x1FFF#define lpfc_eqcq_doorbell_num_released_WORD word0#define lpfc_eqcq_doorbell_qt_SHIFT 10#define lpfc_eqcq_doorbell_qt_MASK 0x0001#define lpfc_eqcq_doorbell_qt_WORD word0#define LPFC_QUEUE_TYPE_COMPLETION 0#define LPFC_QUEUE_TYPE_EVENT 1#define lpfc_eqcq_doorbell_eqci_SHIFT 9#define lpfc_eqcq_doorbell_eqci_MASK 0x0001#define lpfc_eqcq_doorbell_eqci_WORD word0#define lpfc_eqcq_doorbell_cqid_lo_SHIFT 0#define lpfc_eqcq_doorbell_cqid_lo_MASK 0x03FF#define lpfc_eqcq_doorbell_cqid_lo_WORD word0#define lpfc_eqcq_doorbell_cqid_hi_SHIFT 11#define lpfc_eqcq_doorbell_cqid_hi_MASK 0x001F#define lpfc_eqcq_doorbell_cqid_hi_WORD word0#define lpfc_eqcq_doorbell_eqid_lo_SHIFT 0#define lpfc_eqcq_doorbell_eqid_lo_MASK 0x01FF#define lpfc_eqcq_doorbell_eqid_lo_WORD word0#define lpfc_eqcq_doorbell_eqid_hi_SHIFT 11#define lpfc_eqcq_doorbell_eqid_hi_MASK 0x001F#define lpfc_eqcq_doorbell_eqid_hi_WORD word0#define LPFC_CQID_HI_FIELD_SHIFT 10#define LPFC_EQID_HI_FIELD_SHIFT 9#define LPFC_IF6_CQ_DOORBELL 0x00C0#define lpfc_if6_cq_doorbell_se_SHIFT 31#define lpfc_if6_cq_doorbell_se_MASK 0x0001#define lpfc_if6_cq_doorbell_se_WORD word0#define LPFC_IF6_CQ_SOLICIT_ENABLE_OFF 0#define LPFC_IF6_CQ_SOLICIT_ENABLE_ON 1#define lpfc_if6_cq_doorbell_arm_SHIFT 29#define lpfc_if6_cq_doorbell_arm_MASK 0x0001#define lpfc_if6_cq_doorbell_arm_WORD word0#define lpfc_if6_cq_doorbell_num_released_SHIFT 16#define lpfc_if6_cq_doorbell_num_released_MASK 0x1FFF#define lpfc_if6_cq_doorbell_num_released_WORD word0#define lpfc_if6_cq_doorbell_cqid_SHIFT 0#define lpfc_if6_cq_doorbell_cqid_MASK 0xFFFF#define lpfc_if6_cq_doorbell_cqid_WORD word0#define LPFC_IF6_EQ_DOORBELL 0x0120#define lpfc_if6_eq_doorbell_io_SHIFT 31#define lpfc_if6_eq_doorbell_io_MASK 0x0001#define lpfc_if6_eq_doorbell_io_WORD word0#define LPFC_IF6_EQ_INTR_OVERRIDE_OFF 0#define LPFC_IF6_EQ_INTR_OVERRIDE_ON 1#define lpfc_if6_eq_doorbell_arm_SHIFT 29#define lpfc_if6_eq_doorbell_arm_MASK 0x0001#define lpfc_if6_eq_doorbell_arm_WORD word0#define lpfc_if6_eq_doorbell_num_released_SHIFT 16#define lpfc_if6_eq_doorbell_num_released_MASK 0x1FFF#define lpfc_if6_eq_doorbell_num_released_WORD word0#define lpfc_if6_eq_doorbell_eqid_SHIFT 0#define lpfc_if6_eq_doorbell_eqid_MASK 0x0FFF#define lpfc_if6_eq_doorbell_eqid_WORD word0#define LPFC_BMBX 0x0160#define lpfc_bmbx_addr_SHIFT 2#define lpfc_bmbx_addr_MASK 0x3FFFFFFF#define lpfc_bmbx_addr_WORD word0#define lpfc_bmbx_hi_SHIFT 1#define lpfc_bmbx_hi_MASK 0x0001#define lpfc_bmbx_hi_WORD word0#define lpfc_bmbx_rdy_SHIFT 0#define lpfc_bmbx_rdy_MASK 0x0001#define lpfc_bmbx_rdy_WORD word0#define LPFC_MQ_DOORBELL 0x0140#define LPFC_IF6_MQ_DOORBELL 0x0160#define lpfc_mq_doorbell_num_posted_SHIFT 16#define lpfc_mq_doorbell_num_posted_MASK 0x3FFF#define lpfc_mq_doorbell_num_posted_WORD word0#define lpfc_mq_doorbell_id_SHIFT 0#define lpfc_mq_doorbell_id_MASK 0xFFFF#define lpfc_mq_doorbell_id_WORD word0struct lpfc_sli4_cfg_mhdr {#define lpfc_mbox_hdr_emb_SHIFT 0#define lpfc_mbox_hdr_emb_MASK 0x00000001#define lpfc_mbox_hdr_emb_WORD word1#define lpfc_mbox_hdr_sge_cnt_SHIFT 3#define lpfc_mbox_hdr_sge_cnt_MASK 0x0000001F#define lpfc_mbox_hdr_sge_cnt_WORD word1union lpfc_sli4_cfg_shdr {struct {#define lpfc_mbox_hdr_opcode_SHIFT 0#define lpfc_mbox_hdr_opcode_MASK 0x000000FF#define lpfc_mbox_hdr_opcode_WORD word6#define lpfc_mbox_hdr_subsystem_SHIFT 8#define lpfc_mbox_hdr_subsystem_MASK 0x000000FF#define lpfc_mbox_hdr_subsystem_WORD word6#define lpfc_mbox_hdr_port_number_SHIFT 16#define lpfc_mbox_hdr_port_number_MASK 0x000000FF#define lpfc_mbox_hdr_port_number_WORD word6#define lpfc_mbox_hdr_domain_SHIFT 24#define lpfc_mbox_hdr_domain_MASK 0x000000FF#define lpfc_mbox_hdr_domain_WORD word6#define lpfc_mbox_hdr_version_SHIFT 0#define lpfc_mbox_hdr_version_MASK 0x000000FF#define lpfc_mbox_hdr_version_WORD word9#define lpfc_mbox_hdr_pf_num_SHIFT 16#define lpfc_mbox_hdr_pf_num_MASK 0x000000FF#define lpfc_mbox_hdr_pf_num_WORD word9#define lpfc_mbox_hdr_vh_num_SHIFT 24#define lpfc_mbox_hdr_vh_num_MASK 0x000000FF#define lpfc_mbox_hdr_vh_num_WORD word9#define LPFC_Q_CREATE_VERSION_2 2#define LPFC_Q_CREATE_VERSION_1 1#define LPFC_Q_CREATE_VERSION_0 0#define LPFC_OPCODE_VERSION_0 0#define LPFC_OPCODE_VERSION_1 1struct {#define lpfc_mbox_hdr_opcode_SHIFT 0#define lpfc_mbox_hdr_opcode_MASK 0x000000FF#define lpfc_mbox_hdr_opcode_WORD word6#define lpfc_mbox_hdr_subsystem_SHIFT 8#define lpfc_mbox_hdr_subsystem_MASK 0x000000FF#define lpfc_mbox_hdr_subsystem_WORD word6#define lpfc_mbox_hdr_domain_SHIFT 24#define lpfc_mbox_hdr_domain_MASK 0x000000FF#define lpfc_mbox_hdr_domain_WORD word6#define lpfc_mbox_hdr_status_SHIFT 0#define lpfc_mbox_hdr_status_MASK 0x000000FF#define lpfc_mbox_hdr_status_WORD word7#define lpfc_mbox_hdr_add_status_SHIFT 8#define lpfc_mbox_hdr_add_status_MASK 0x000000FF#define lpfc_mbox_hdr_add_status_WORD word7#define LPFC_ADD_STATUS_INCOMPAT_OBJ 0xA2#define lpfc_mbox_hdr_add_status_2_SHIFT 16#define lpfc_mbox_hdr_add_status_2_MASK 0x000000FF#define lpfc_mbox_hdr_add_status_2_WORD word7#define LPFC_ADD_STATUS_2_INCOMPAT_FLASH 0x01#define LPFC_ADD_STATUS_2_INCORRECT_ASIC 0x02/* Mailbox Header structures. * struct mbox_header is defined for first generation SLI4_CFG mailbox * calls deployed for BE-based ports. * * struct sli4_mbox_header is defined for second generation SLI4 * ports that don't deploy the SLI4_CFG mechanism. struct mbox_header {struct lpfc_sli4_cfg_mhdr cfg_mhdr;union lpfc_sli4_cfg_shdr cfg_shdr;#define LPFC_EXTENT_LOCAL 0#define LPFC_TIMEOUT_DEFAULT 0#define LPFC_EXTENT_VERSION_DEFAULT 0/* Subsystem Definitions */ #define LPFC_MBOX_SUBSYSTEM_NA 0x0#define LPFC_MBOX_SUBSYSTEM_COMMON 0x1#define LPFC_MBOX_SUBSYSTEM_LOWLEVEL 0xB#define LPFC_MBOX_SUBSYSTEM_FCOE 0xC/* Device Specific Definitions */ /* The HOST ENDIAN defines are in Big Endian format. */ #define HOST_ENDIAN_LOW_WORD0 0xFF3412FF#define HOST_ENDIAN_HIGH_WORD1 0xFF7856FF/* Common Opcodes */ #define LPFC_MBOX_OPCODE_NA 0x00#define LPFC_MBOX_OPCODE_CQ_CREATE 0x0C#define LPFC_MBOX_OPCODE_EQ_CREATE 0x0D#define LPFC_MBOX_OPCODE_MQ_CREATE 0x15#define LPFC_MBOX_OPCODE_GET_CNTL_ATTRIBUTES 0x20#define LPFC_MBOX_OPCODE_NOP 0x21#define LPFC_MBOX_OPCODE_MODIFY_EQ_DELAY 0x29#define LPFC_MBOX_OPCODE_MQ_DESTROY 0x35#define LPFC_MBOX_OPCODE_CQ_DESTROY 0x36#define LPFC_MBOX_OPCODE_EQ_DESTROY 0x37#define LPFC_MBOX_OPCODE_QUERY_FW_CFG 0x3A#define LPFC_MBOX_OPCODE_FUNCTION_RESET 0x3D#define LPFC_MBOX_OPCODE_SET_PHYSICAL_LINK_CONFIG 0x3E#define LPFC_MBOX_OPCODE_SET_BOOT_CONFIG 0x43#define LPFC_MBOX_OPCODE_SET_BEACON_CONFIG 0x45#define LPFC_MBOX_OPCODE_GET_BEACON_CONFIG 0x46#define LPFC_MBOX_OPCODE_GET_PORT_NAME 0x4D#define LPFC_MBOX_OPCODE_MQ_CREATE_EXT 0x5A#define LPFC_MBOX_OPCODE_GET_VPD_DATA 0x5B#define LPFC_MBOX_OPCODE_SET_HOST_DATA 0x5D#define LPFC_MBOX_OPCODE_SEND_ACTIVATION 0x73#define LPFC_MBOX_OPCODE_RESET_LICENSES 0x74#define LPFC_MBOX_OPCODE_REG_CONGESTION_BUF 0x8E#define LPFC_MBOX_OPCODE_GET_RSRC_EXTENT_INFO 0x9A#define LPFC_MBOX_OPCODE_GET_ALLOC_RSRC_EXTENT 0x9B#define LPFC_MBOX_OPCODE_ALLOC_RSRC_EXTENT 0x9C#define LPFC_MBOX_OPCODE_DEALLOC_RSRC_EXTENT 0x9D#define LPFC_MBOX_OPCODE_GET_FUNCTION_CONFIG 0xA0#define LPFC_MBOX_OPCODE_GET_PROFILE_CAPACITIES 0xA1#define LPFC_MBOX_OPCODE_GET_PROFILE_CONFIG 0xA4#define LPFC_MBOX_OPCODE_SET_PROFILE_CONFIG 0xA5#define LPFC_MBOX_OPCODE_GET_PROFILE_LIST 0xA6#define LPFC_MBOX_OPCODE_SET_ACT_PROFILE 0xA8#define LPFC_MBOX_OPCODE_GET_FACTORY_PROFILE_CONFIG 0xA9#define LPFC_MBOX_OPCODE_READ_OBJECT 0xAB#define LPFC_MBOX_OPCODE_WRITE_OBJECT 0xAC#define LPFC_MBOX_OPCODE_READ_OBJECT_LIST 0xAD#define LPFC_MBOX_OPCODE_DELETE_OBJECT 0xAE#define LPFC_MBOX_OPCODE_GET_SLI4_PARAMETERS 0xB5#define LPFC_MBOX_OPCODE_SET_FEATURES 0xBF/* FCoE Opcodes */ #define LPFC_MBOX_OPCODE_FCOE_WQ_CREATE 0x01#define LPFC_MBOX_OPCODE_FCOE_WQ_DESTROY 0x02#define LPFC_MBOX_OPCODE_FCOE_POST_SGL_PAGES 0x03#define LPFC_MBOX_OPCODE_FCOE_REMOVE_SGL_PAGES 0x04#define LPFC_MBOX_OPCODE_FCOE_RQ_CREATE 0x05#define LPFC_MBOX_OPCODE_FCOE_RQ_DESTROY 0x06#define LPFC_MBOX_OPCODE_FCOE_READ_FCF_TABLE 0x08#define LPFC_MBOX_OPCODE_FCOE_ADD_FCF 0x09#define LPFC_MBOX_OPCODE_FCOE_DELETE_FCF 0x0A#define LPFC_MBOX_OPCODE_FCOE_POST_HDR_TEMPLATE 0x0B#define LPFC_MBOX_OPCODE_FCOE_REDISCOVER_FCF 0x10#define LPFC_MBOX_OPCODE_FCOE_CQ_CREATE_SET 0x1D#define LPFC_MBOX_OPCODE_FCOE_SET_FCLINK_SETTINGS 0x21#define LPFC_MBOX_OPCODE_FCOE_LINK_DIAG_STATE 0x22#define LPFC_MBOX_OPCODE_FCOE_LINK_DIAG_LOOPBACK 0x23#define LPFC_MBOX_OPCODE_FCOE_FC_SET_TRUNK_MODE 0x42/* Low level Opcodes */ #define LPFC_MBOX_OPCODE_SET_DIAG_LOG_OPTION 0x37/* Mailbox command structures */ struct eq_context {#define lpfc_eq_context_size_SHIFT 31#define lpfc_eq_context_size_MASK 0x00000001#define lpfc_eq_context_size_WORD word0#define LPFC_EQE_SIZE_4 0x0#define LPFC_EQE_SIZE_16 0x1#define lpfc_eq_context_valid_SHIFT 29#define lpfc_eq_context_valid_MASK 0x00000001#define lpfc_eq_context_valid_WORD word0#define lpfc_eq_context_autovalid_SHIFT 28#define lpfc_eq_context_autovalid_MASK 0x00000001#define lpfc_eq_context_autovalid_WORD word0#define lpfc_eq_context_count_SHIFT 26#define lpfc_eq_context_count_MASK 0x00000003#define lpfc_eq_context_count_WORD word1#define LPFC_EQ_CNT_256 0x0#define LPFC_EQ_CNT_512 0x1#define LPFC_EQ_CNT_1024 0x2#define LPFC_EQ_CNT_2048 0x3#define LPFC_EQ_CNT_4096 0x4#define lpfc_eq_context_delay_multi_SHIFT 13#define lpfc_eq_context_delay_multi_MASK 0x000003FF#define lpfc_eq_context_delay_multi_WORD word2struct eq_delay_info {#define LPFC_MAX_EQ_DELAY_EQID_CNT 8struct sgl_page_pairs {struct lpfc_mbx_post_sgl_pages {struct mbox_header header;#define lpfc_post_sgl_pages_xri_SHIFT 0#define lpfc_post_sgl_pages_xri_MASK 0x0000FFFF#define lpfc_post_sgl_pages_xri_WORD word0#define lpfc_post_sgl_pages_xricnt_SHIFT 16#define lpfc_post_sgl_pages_xricnt_MASK 0x0000FFFF#define lpfc_post_sgl_pages_xricnt_WORD word0struct sgl_page_pairs sgl_pg_pairs[1];/* word0 of page-1 struct shares the same SHIFT/MASK/WORD defines as above */ struct lpfc_mbx_post_uembed_sgl_page1 {union lpfc_sli4_cfg_shdr cfg_shdr;struct sgl_page_pairs sgl_pg_pairs;struct lpfc_mbx_sge {struct lpfc_mbx_host_buf {struct lpfc_mbx_nembed_cmd {struct lpfc_sli4_cfg_mhdr cfg_mhdr;#define LPFC_SLI4_MBX_SGE_MAX_PAGES 19struct lpfc_mbx_sge sge[LPFC_SLI4_MBX_SGE_MAX_PAGES];struct lpfc_mbx_nembed_sge_virt {void *addr[LPFC_SLI4_MBX_SGE_MAX_PAGES];#define LPFC_MBX_OBJECT_NAME_LEN_DW 26struct lpfc_mbx_read_object { /* Version 0 */ struct mbox_header header;union {struct {#define lpfc_mbx_rd_object_rlen_SHIFT 0#define lpfc_mbx_rd_object_rlen_MASK 0x00FFFFFF#define lpfc_mbx_rd_object_rlen_WORD word0#define LPFC_OBJ_NAME_SZ 104 /* 26 x sizeof(uint32_t) is 104. */ struct lpfc_mbx_host_buf rd_object_hbuf[4];struct {#define lpfc_mbx_rd_object_eof_SHIFT 31#define lpfc_mbx_rd_object_eof_MASK 0x1#define lpfc_mbx_rd_object_eof_WORD word1struct lpfc_mbx_eq_create {struct mbox_header header;union {struct {#define lpfc_mbx_eq_create_num_pages_SHIFT 0#define lpfc_mbx_eq_create_num_pages_MASK 0x0000FFFF#define lpfc_mbx_eq_create_num_pages_WORD word0struct eq_context context;struct dma_address page[LPFC_MAX_EQ_PAGE];struct {#define lpfc_mbx_eq_create_q_id_SHIFT 0#define lpfc_mbx_eq_create_q_id_MASK 0x0000FFFF#define lpfc_mbx_eq_create_q_id_WORD word0struct lpfc_mbx_modify_eq_delay {struct mbox_header header;union {struct {struct eq_delay_info eq[LPFC_MAX_EQ_DELAY_EQID_CNT];struct {struct lpfc_mbx_eq_destroy {struct mbox_header header;union {struct {#define lpfc_mbx_eq_destroy_q_id_SHIFT 0#define lpfc_mbx_eq_destroy_q_id_MASK 0x0000FFFF#define lpfc_mbx_eq_destroy_q_id_WORD word0struct {struct lpfc_mbx_nop {struct mbox_header header;struct lpfc_mbx_set_ras_fwlog {struct mbox_header header;union {struct {#define lpfc_fwlog_enable_SHIFT 0#define lpfc_fwlog_enable_MASK 0x00000001#define lpfc_fwlog_enable_WORD word4#define lpfc_fwlog_loglvl_SHIFT 8#define lpfc_fwlog_loglvl_MASK 0x0000000F#define lpfc_fwlog_loglvl_WORD word4#define lpfc_fwlog_ra_SHIFT 15#define lpfc_fwlog_ra_WORD 0x00000008#define lpfc_fwlog_buffcnt_SHIFT 16#define lpfc_fwlog_buffcnt_MASK 0x000000FF#define lpfc_fwlog_buffcnt_WORD word4#define lpfc_fwlog_buffsz_SHIFT 24#define lpfc_fwlog_buffsz_MASK 0x000000FF#define lpfc_fwlog_buffsz_WORD word4#define lpfc_fwlog_acqe_SHIFT 0#define lpfc_fwlog_acqe_MASK 0x0000FFFF#define lpfc_fwlog_acqe_WORD word5#define lpfc_fwlog_cqid_SHIFT 16#define lpfc_fwlog_cqid_MASK 0x0000FFFF#define lpfc_fwlog_cqid_WORD word5#define LPFC_MAX_FWLOG_PAGE 16struct dma_address lwpd;struct dma_address buff_fwlog[LPFC_MAX_FWLOG_PAGE];struct {struct cq_context {#define lpfc_cq_context_event_SHIFT 31#define lpfc_cq_context_event_MASK 0x00000001#define lpfc_cq_context_event_WORD word0#define lpfc_cq_context_valid_SHIFT 29#define lpfc_cq_context_valid_MASK 0x00000001#define lpfc_cq_context_valid_WORD word0#define lpfc_cq_context_count_SHIFT 27#define lpfc_cq_context_count_MASK 0x00000003#define lpfc_cq_context_count_WORD word0#define LPFC_CQ_CNT_256 0x0#define LPFC_CQ_CNT_512 0x1#define LPFC_CQ_CNT_1024 0x2#define LPFC_CQ_CNT_WORD7 0x3#define lpfc_cq_context_cqe_sz_SHIFT 25#define lpfc_cq_context_cqe_sz_MASK 0x00000003#define lpfc_cq_context_cqe_sz_WORD word0#define lpfc_cq_context_autovalid_SHIFT 15#define lpfc_cq_context_autovalid_MASK 0x00000001#define lpfc_cq_context_autovalid_WORD word0#define lpfc_cq_eq_id_SHIFT 22 /* Version 0 Only */ #define lpfc_cq_eq_id_MASK 0x000000FF#define lpfc_cq_eq_id_WORD word1#define lpfc_cq_eq_id_2_SHIFT 0 /* Version 2 Only */ #define lpfc_cq_eq_id_2_MASK 0x0000FFFF#define lpfc_cq_eq_id_2_WORD word1/* Version 2 Only */ struct lpfc_mbx_cq_create {struct mbox_header header;union {struct {#define lpfc_mbx_cq_create_page_size_SHIFT 16 /* Version 2 Only */ #define lpfc_mbx_cq_create_page_size_MASK 0x000000FF#define lpfc_mbx_cq_create_page_size_WORD word0#define lpfc_mbx_cq_create_num_pages_SHIFT 0#define lpfc_mbx_cq_create_num_pages_MASK 0x0000FFFF#define lpfc_mbx_cq_create_num_pages_WORD word0struct cq_context context;struct dma_address page[LPFC_MAX_CQ_PAGE];struct {#define lpfc_mbx_cq_create_q_id_SHIFT 0#define lpfc_mbx_cq_create_q_id_MASK 0x0000FFFF#define lpfc_mbx_cq_create_q_id_WORD word0struct lpfc_mbx_cq_create_set {union lpfc_sli4_cfg_shdr cfg_shdr;union {struct {#define lpfc_mbx_cq_create_set_page_size_SHIFT 16 /* Version 2 Only */ #define lpfc_mbx_cq_create_set_page_size_MASK 0x000000FF#define lpfc_mbx_cq_create_set_page_size_WORD word0#define lpfc_mbx_cq_create_set_num_pages_SHIFT 0#define lpfc_mbx_cq_create_set_num_pages_MASK 0x0000FFFF#define lpfc_mbx_cq_create_set_num_pages_WORD word0#define lpfc_mbx_cq_create_set_evt_SHIFT 31#define lpfc_mbx_cq_create_set_evt_MASK 0x00000001#define lpfc_mbx_cq_create_set_evt_WORD word1#define lpfc_mbx_cq_create_set_valid_SHIFT 29#define lpfc_mbx_cq_create_set_valid_MASK 0x00000001#define lpfc_mbx_cq_create_set_valid_WORD word1#define lpfc_mbx_cq_create_set_cqecnt_SHIFT 27#define lpfc_mbx_cq_create_set_cqecnt_MASK 0x00000003#define lpfc_mbx_cq_create_set_cqecnt_WORD word1#define lpfc_mbx_cq_create_set_cqe_size_SHIFT 25#define lpfc_mbx_cq_create_set_cqe_size_MASK 0x00000003#define lpfc_mbx_cq_create_set_cqe_size_WORD word1#define lpfc_mbx_cq_create_set_autovalid_SHIFT 15#define lpfc_mbx_cq_create_set_autovalid_MASK 0x0000001#define lpfc_mbx_cq_create_set_autovalid_WORD word1#define lpfc_mbx_cq_create_set_nodelay_SHIFT 14#define lpfc_mbx_cq_create_set_nodelay_MASK 0x00000001#define lpfc_mbx_cq_create_set_nodelay_WORD word1#define lpfc_mbx_cq_create_set_clswm_SHIFT 12#define lpfc_mbx_cq_create_set_clswm_MASK 0x00000003#define lpfc_mbx_cq_create_set_clswm_WORD word1#define lpfc_mbx_cq_create_set_cqe_cnt_hi_SHIFT 0#define lpfc_mbx_cq_create_set_cqe_cnt_hi_MASK 0x0000001F#define lpfc_mbx_cq_create_set_cqe_cnt_hi_WORD word1#define lpfc_mbx_cq_create_set_arm_SHIFT 31#define lpfc_mbx_cq_create_set_arm_MASK 0x00000001#define lpfc_mbx_cq_create_set_arm_WORD word2#define lpfc_mbx_cq_create_set_cqe_cnt_lo_SHIFT 16#define lpfc_mbx_cq_create_set_cqe_cnt_lo_MASK 0x00007FFF#define lpfc_mbx_cq_create_set_cqe_cnt_lo_WORD word2#define lpfc_mbx_cq_create_set_num_cq_SHIFT 0#define lpfc_mbx_cq_create_set_num_cq_MASK 0x0000FFFF#define lpfc_mbx_cq_create_set_num_cq_WORD word2#define lpfc_mbx_cq_create_set_eq_id1_SHIFT 16#define lpfc_mbx_cq_create_set_eq_id1_MASK 0x0000FFFF#define lpfc_mbx_cq_create_set_eq_id1_WORD word3#define lpfc_mbx_cq_create_set_eq_id0_SHIFT 0#define lpfc_mbx_cq_create_set_eq_id0_MASK 0x0000FFFF#define lpfc_mbx_cq_create_set_eq_id0_WORD word3#define lpfc_mbx_cq_create_set_eq_id3_SHIFT 16#define lpfc_mbx_cq_create_set_eq_id3_MASK 0x0000FFFF#define lpfc_mbx_cq_create_set_eq_id3_WORD word4#define lpfc_mbx_cq_create_set_eq_id2_SHIFT 0#define lpfc_mbx_cq_create_set_eq_id2_MASK 0x0000FFFF#define lpfc_mbx_cq_create_set_eq_id2_WORD word4#define lpfc_mbx_cq_create_set_eq_id5_SHIFT 16#define lpfc_mbx_cq_create_set_eq_id5_MASK 0x0000FFFF#define lpfc_mbx_cq_create_set_eq_id5_WORD word5#define lpfc_mbx_cq_create_set_eq_id4_SHIFT 0#define lpfc_mbx_cq_create_set_eq_id4_MASK 0x0000FFFF#define lpfc_mbx_cq_create_set_eq_id4_WORD word5#define lpfc_mbx_cq_create_set_eq_id7_SHIFT 16#define lpfc_mbx_cq_create_set_eq_id7_MASK 0x0000FFFF#define lpfc_mbx_cq_create_set_eq_id7_WORD word6#define lpfc_mbx_cq_create_set_eq_id6_SHIFT 0#define lpfc_mbx_cq_create_set_eq_id6_MASK 0x0000FFFF#define lpfc_mbx_cq_create_set_eq_id6_WORD word6#define lpfc_mbx_cq_create_set_eq_id9_SHIFT 16#define lpfc_mbx_cq_create_set_eq_id9_MASK 0x0000FFFF#define lpfc_mbx_cq_create_set_eq_id9_WORD word7#define lpfc_mbx_cq_create_set_eq_id8_SHIFT 0#define lpfc_mbx_cq_create_set_eq_id8_MASK 0x0000FFFF#define lpfc_mbx_cq_create_set_eq_id8_WORD word7#define lpfc_mbx_cq_create_set_eq_id11_SHIFT 16#define lpfc_mbx_cq_create_set_eq_id11_MASK 0x0000FFFF#define lpfc_mbx_cq_create_set_eq_id11_WORD word8#define lpfc_mbx_cq_create_set_eq_id10_SHIFT 0#define lpfc_mbx_cq_create_set_eq_id10_MASK 0x0000FFFF#define lpfc_mbx_cq_create_set_eq_id10_WORD word8#define lpfc_mbx_cq_create_set_eq_id13_SHIFT 16#define lpfc_mbx_cq_create_set_eq_id13_MASK 0x0000FFFF#define lpfc_mbx_cq_create_set_eq_id13_WORD word9#define lpfc_mbx_cq_create_set_eq_id12_SHIFT 0#define lpfc_mbx_cq_create_set_eq_id12_MASK 0x0000FFFF#define lpfc_mbx_cq_create_set_eq_id12_WORD word9#define lpfc_mbx_cq_create_set_eq_id15_SHIFT 16#define lpfc_mbx_cq_create_set_eq_id15_MASK 0x0000FFFF#define lpfc_mbx_cq_create_set_eq_id15_WORD word10#define lpfc_mbx_cq_create_set_eq_id14_SHIFT 0#define lpfc_mbx_cq_create_set_eq_id14_MASK 0x0000FFFF#define lpfc_mbx_cq_create_set_eq_id14_WORD word10struct dma_address page[1];struct {#define lpfc_mbx_cq_create_set_num_alloc_SHIFT 16#define lpfc_mbx_cq_create_set_num_alloc_MASK 0x0000FFFF#define lpfc_mbx_cq_create_set_num_alloc_WORD word0#define lpfc_mbx_cq_create_set_base_id_SHIFT 0#define lpfc_mbx_cq_create_set_base_id_MASK 0x0000FFFF#define lpfc_mbx_cq_create_set_base_id_WORD word0struct lpfc_mbx_cq_destroy {struct mbox_header header;union {struct {#define lpfc_mbx_cq_destroy_q_id_SHIFT 0#define lpfc_mbx_cq_destroy_q_id_MASK 0x0000FFFF#define lpfc_mbx_cq_destroy_q_id_WORD word0struct {struct wq_context {struct lpfc_mbx_wq_create {struct mbox_header header;union {struct { /* Version 0 Request */ #define lpfc_mbx_wq_create_num_pages_SHIFT 0#define lpfc_mbx_wq_create_num_pages_MASK 0x000000FF#define lpfc_mbx_wq_create_num_pages_WORD word0#define lpfc_mbx_wq_create_dua_SHIFT 8#define lpfc_mbx_wq_create_dua_MASK 0x00000001#define lpfc_mbx_wq_create_dua_WORD word0#define lpfc_mbx_wq_create_cq_id_SHIFT 16#define lpfc_mbx_wq_create_cq_id_MASK 0x0000FFFF#define lpfc_mbx_wq_create_cq_id_WORD word0struct dma_address page[LPFC_MAX_WQ_PAGE_V0];#define lpfc_mbx_wq_create_bua_SHIFT 0#define lpfc_mbx_wq_create_bua_MASK 0x00000001#define lpfc_mbx_wq_create_bua_WORD word9#define lpfc_mbx_wq_create_ulp_num_SHIFT 8#define lpfc_mbx_wq_create_ulp_num_MASK 0x000000FF#define lpfc_mbx_wq_create_ulp_num_WORD word9struct { /* Version 1 Request */ /* Word 0 is the same as in v0 */ #define lpfc_mbx_wq_create_page_size_SHIFT 0#define lpfc_mbx_wq_create_page_size_MASK 0x000000FF#define lpfc_mbx_wq_create_page_size_WORD word1#define LPFC_WQ_PAGE_SIZE_4096 0x1#define lpfc_mbx_wq_create_dpp_req_SHIFT 15#define lpfc_mbx_wq_create_dpp_req_MASK 0x00000001#define lpfc_mbx_wq_create_dpp_req_WORD word1#define lpfc_mbx_wq_create_doe_SHIFT 14#define lpfc_mbx_wq_create_doe_MASK 0x00000001#define lpfc_mbx_wq_create_doe_WORD word1#define lpfc_mbx_wq_create_toe_SHIFT 13#define lpfc_mbx_wq_create_toe_MASK 0x00000001#define lpfc_mbx_wq_create_toe_WORD word1#define lpfc_mbx_wq_create_wqe_size_SHIFT 8#define lpfc_mbx_wq_create_wqe_size_MASK 0x0000000F#define lpfc_mbx_wq_create_wqe_size_WORD word1#define LPFC_WQ_WQE_SIZE_64 0x5#define LPFC_WQ_WQE_SIZE_128 0x6#define lpfc_mbx_wq_create_wqe_count_SHIFT 16#define lpfc_mbx_wq_create_wqe_count_MASK 0x0000FFFF#define lpfc_mbx_wq_create_wqe_count_WORD word1struct dma_address page[LPFC_MAX_WQ_PAGE-1];struct {#define lpfc_mbx_wq_create_q_id_SHIFT 0#define lpfc_mbx_wq_create_q_id_MASK 0x0000FFFF#define lpfc_mbx_wq_create_q_id_WORD word0#define lpfc_mbx_wq_create_bar_set_SHIFT 0#define lpfc_mbx_wq_create_bar_set_MASK 0x0000FFFF#define lpfc_mbx_wq_create_bar_set_WORD word2#define WQ_PCI_BAR_0_AND_1 0x00#define WQ_PCI_BAR_2_AND_3 0x01#define WQ_PCI_BAR_4_AND_5 0x02#define lpfc_mbx_wq_create_db_format_SHIFT 16#define lpfc_mbx_wq_create_db_format_MASK 0x0000FFFF#define lpfc_mbx_wq_create_db_format_WORD word2struct {#define lpfc_mbx_wq_create_dpp_rsp_SHIFT 31#define lpfc_mbx_wq_create_dpp_rsp_MASK 0x00000001#define lpfc_mbx_wq_create_dpp_rsp_WORD word0#define lpfc_mbx_wq_create_v1_q_id_SHIFT 0#define lpfc_mbx_wq_create_v1_q_id_MASK 0x0000FFFF#define lpfc_mbx_wq_create_v1_q_id_WORD word0#define lpfc_mbx_wq_create_v1_bar_set_SHIFT 0#define lpfc_mbx_wq_create_v1_bar_set_MASK 0x0000000F#define lpfc_mbx_wq_create_v1_bar_set_WORD word1#define lpfc_mbx_wq_create_dpp_id_SHIFT 16#define lpfc_mbx_wq_create_dpp_id_MASK 0x0000001F#define lpfc_mbx_wq_create_dpp_id_WORD word3#define lpfc_mbx_wq_create_dpp_bar_SHIFT 0#define lpfc_mbx_wq_create_dpp_bar_MASK 0x0000000F#define lpfc_mbx_wq_create_dpp_bar_WORD word3struct lpfc_mbx_wq_destroy {struct mbox_header header;union {struct {#define lpfc_mbx_wq_destroy_q_id_SHIFT 0#define lpfc_mbx_wq_destroy_q_id_MASK 0x0000FFFF#define lpfc_mbx_wq_destroy_q_id_WORD word0struct {#define LPFC_HDR_BUF_SIZE 128#define LPFC_DATA_BUF_SIZE 2048#define LPFC_NVMET_DATA_BUF_SIZE 128struct rq_context {#define lpfc_rq_context_rqe_count_SHIFT 16 /* Version 0 Only */ #define lpfc_rq_context_rqe_count_MASK 0x0000000F#define lpfc_rq_context_rqe_count_WORD word0#define LPFC_RQ_RING_SIZE_512 9 /* 512 entries */ #define LPFC_RQ_RING_SIZE_1024 10 /* 1024 entries */ #define LPFC_RQ_RING_SIZE_2048 11 /* 2048 entries */ #define LPFC_RQ_RING_SIZE_4096 12 /* 4096 entries */ #define lpfc_rq_context_rqe_count_1_SHIFT 16 /* Version 1-2 Only */ #define lpfc_rq_context_rqe_count_1_MASK 0x0000FFFF#define lpfc_rq_context_rqe_count_1_WORD word0#define lpfc_rq_context_rqe_size_SHIFT 8 /* Version 1-2 Only */ #define lpfc_rq_context_rqe_size_MASK 0x0000000F#define lpfc_rq_context_rqe_size_WORD word0#define LPFC_RQE_SIZE_8 2#define LPFC_RQE_SIZE_16 3#define LPFC_RQE_SIZE_32 4#define LPFC_RQE_SIZE_64 5#define LPFC_RQE_SIZE_128 6#define lpfc_rq_context_page_size_SHIFT 0 /* Version 1 Only */ #define lpfc_rq_context_page_size_MASK 0x000000FF#define lpfc_rq_context_page_size_WORD word0#define LPFC_RQ_PAGE_SIZE_4096 0x1#define lpfc_rq_context_data_size_SHIFT 16 /* Version 2 Only */ #define lpfc_rq_context_data_size_MASK 0x0000FFFF#define lpfc_rq_context_data_size_WORD word1#define lpfc_rq_context_hdr_size_SHIFT 0 /* Version 2 Only */ #define lpfc_rq_context_hdr_size_MASK 0x0000FFFF#define lpfc_rq_context_hdr_size_WORD word1#define lpfc_rq_context_cq_id_SHIFT 16#define lpfc_rq_context_cq_id_MASK 0x0000FFFF#define lpfc_rq_context_cq_id_WORD word2#define lpfc_rq_context_buf_size_SHIFT 0#define lpfc_rq_context_buf_size_MASK 0x0000FFFF#define lpfc_rq_context_buf_size_WORD word2#define lpfc_rq_context_base_cq_SHIFT 0 /* Version 2 Only */ #define lpfc_rq_context_base_cq_MASK 0x0000FFFF#define lpfc_rq_context_base_cq_WORD word2/* Version 1 Only */ struct lpfc_mbx_rq_create {struct mbox_header header;union {struct {#define lpfc_mbx_rq_create_num_pages_SHIFT 0#define lpfc_mbx_rq_create_num_pages_MASK 0x0000FFFF#define lpfc_mbx_rq_create_num_pages_WORD word0#define lpfc_mbx_rq_create_dua_SHIFT 16#define lpfc_mbx_rq_create_dua_MASK 0x00000001#define lpfc_mbx_rq_create_dua_WORD word0#define lpfc_mbx_rq_create_bqu_SHIFT 17#define lpfc_mbx_rq_create_bqu_MASK 0x00000001#define lpfc_mbx_rq_create_bqu_WORD word0#define lpfc_mbx_rq_create_ulp_num_SHIFT 24#define lpfc_mbx_rq_create_ulp_num_MASK 0x000000FF#define lpfc_mbx_rq_create_ulp_num_WORD word0struct rq_context context;struct dma_address page[LPFC_MAX_RQ_PAGE];struct {#define lpfc_mbx_rq_create_q_cnt_v2_SHIFT 16#define lpfc_mbx_rq_create_q_cnt_v2_MASK 0x0000FFFF#define lpfc_mbx_rq_create_q_cnt_v2_WORD word0#define lpfc_mbx_rq_create_q_id_SHIFT 0#define lpfc_mbx_rq_create_q_id_MASK 0x0000FFFF#define lpfc_mbx_rq_create_q_id_WORD word0#define lpfc_mbx_rq_create_bar_set_SHIFT 0#define lpfc_mbx_rq_create_bar_set_MASK 0x0000FFFF#define lpfc_mbx_rq_create_bar_set_WORD word2#define lpfc_mbx_rq_create_db_format_SHIFT 16#define lpfc_mbx_rq_create_db_format_MASK 0x0000FFFF#define lpfc_mbx_rq_create_db_format_WORD word2struct lpfc_mbx_rq_create_v2 {union lpfc_sli4_cfg_shdr cfg_shdr;union {struct {#define lpfc_mbx_rq_create_num_pages_SHIFT 0#define lpfc_mbx_rq_create_num_pages_MASK 0x0000FFFF#define lpfc_mbx_rq_create_num_pages_WORD word0#define lpfc_mbx_rq_create_rq_cnt_SHIFT 16#define lpfc_mbx_rq_create_rq_cnt_MASK 0x000000FF#define lpfc_mbx_rq_create_rq_cnt_WORD word0#define lpfc_mbx_rq_create_dua_SHIFT 16#define lpfc_mbx_rq_create_dua_MASK 0x00000001#define lpfc_mbx_rq_create_dua_WORD word0#define lpfc_mbx_rq_create_bqu_SHIFT 17#define lpfc_mbx_rq_create_bqu_MASK 0x00000001#define lpfc_mbx_rq_create_bqu_WORD word0#define lpfc_mbx_rq_create_ulp_num_SHIFT 24#define lpfc_mbx_rq_create_ulp_num_MASK 0x000000FF#define lpfc_mbx_rq_create_ulp_num_WORD word0#define lpfc_mbx_rq_create_dim_SHIFT 29#define lpfc_mbx_rq_create_dim_MASK 0x00000001#define lpfc_mbx_rq_create_dim_WORD word0#define lpfc_mbx_rq_create_dfd_SHIFT 30#define lpfc_mbx_rq_create_dfd_MASK 0x00000001#define lpfc_mbx_rq_create_dfd_WORD word0#define lpfc_mbx_rq_create_dnb_SHIFT 31#define lpfc_mbx_rq_create_dnb_MASK 0x00000001#define lpfc_mbx_rq_create_dnb_WORD word0struct rq_context context;struct dma_address page[1];struct {#define lpfc_mbx_rq_create_q_cnt_v2_SHIFT 16#define lpfc_mbx_rq_create_q_cnt_v2_MASK 0x0000FFFF#define lpfc_mbx_rq_create_q_cnt_v2_WORD word0#define lpfc_mbx_rq_create_q_id_SHIFT 0#define lpfc_mbx_rq_create_q_id_MASK 0x0000FFFF#define lpfc_mbx_rq_create_q_id_WORD word0#define lpfc_mbx_rq_create_bar_set_SHIFT 0#define lpfc_mbx_rq_create_bar_set_MASK 0x0000FFFF#define lpfc_mbx_rq_create_bar_set_WORD word2#define lpfc_mbx_rq_create_db_format_SHIFT 16#define lpfc_mbx_rq_create_db_format_MASK 0x0000FFFF#define lpfc_mbx_rq_create_db_format_WORD word2struct lpfc_mbx_rq_destroy {struct mbox_header header;union {struct {#define lpfc_mbx_rq_destroy_q_id_SHIFT 0#define lpfc_mbx_rq_destroy_q_id_MASK 0x0000FFFF#define lpfc_mbx_rq_destroy_q_id_WORD word0struct {struct mq_context {#define lpfc_mq_context_cq_id_SHIFT 22 /* Version 0 Only */ #define lpfc_mq_context_cq_id_MASK 0x000003FF#define lpfc_mq_context_cq_id_WORD word0#define lpfc_mq_context_ring_size_SHIFT 16#define lpfc_mq_context_ring_size_MASK 0x0000000F#define lpfc_mq_context_ring_size_WORD word0#define LPFC_MQ_RING_SIZE_16 0x5#define LPFC_MQ_RING_SIZE_32 0x6#define LPFC_MQ_RING_SIZE_64 0x7#define LPFC_MQ_RING_SIZE_128 0x8#define lpfc_mq_context_valid_SHIFT 31#define lpfc_mq_context_valid_MASK 0x00000001#define lpfc_mq_context_valid_WORD word1struct lpfc_mbx_mq_create {struct mbox_header header;union {struct {#define lpfc_mbx_mq_create_num_pages_SHIFT 0#define lpfc_mbx_mq_create_num_pages_MASK 0x0000FFFF#define lpfc_mbx_mq_create_num_pages_WORD word0struct mq_context context;struct dma_address page[LPFC_MAX_MQ_PAGE];struct {#define lpfc_mbx_mq_create_q_id_SHIFT 0#define lpfc_mbx_mq_create_q_id_MASK 0x0000FFFF#define lpfc_mbx_mq_create_q_id_WORD word0struct lpfc_mbx_mq_create_ext {struct mbox_header header;union {struct {#define lpfc_mbx_mq_create_ext_num_pages_SHIFT 0#define lpfc_mbx_mq_create_ext_num_pages_MASK 0x0000FFFF#define lpfc_mbx_mq_create_ext_num_pages_WORD word0#define lpfc_mbx_mq_create_ext_cq_id_SHIFT 16 /* Version 1 Only */ #define lpfc_mbx_mq_create_ext_cq_id_MASK 0x0000FFFF#define lpfc_mbx_mq_create_ext_cq_id_WORD word0#define lpfc_mbx_mq_create_ext_async_evt_link_SHIFT LPFC_TRAILER_CODE_LINK#define lpfc_mbx_mq_create_ext_async_evt_link_MASK 0x00000001#define lpfc_mbx_mq_create_ext_async_evt_link_WORD async_evt_bmap#define LPFC_EVT_CODE_LINK_NO_LINK 0x0#define LPFC_EVT_CODE_LINK_10_MBIT 0x1#define LPFC_EVT_CODE_LINK_100_MBIT 0x2#define LPFC_EVT_CODE_LINK_1_GBIT 0x3#define LPFC_EVT_CODE_LINK_10_GBIT 0x4#define lpfc_mbx_mq_create_ext_async_evt_fip_SHIFT LPFC_TRAILER_CODE_FCOE#define lpfc_mbx_mq_create_ext_async_evt_fip_MASK 0x00000001#define lpfc_mbx_mq_create_ext_async_evt_fip_WORD async_evt_bmap#define lpfc_mbx_mq_create_ext_async_evt_group5_SHIFT LPFC_TRAILER_CODE_GRP5#define lpfc_mbx_mq_create_ext_async_evt_group5_MASK 0x00000001#define lpfc_mbx_mq_create_ext_async_evt_group5_WORD async_evt_bmap#define lpfc_mbx_mq_create_ext_async_evt_fc_SHIFT LPFC_TRAILER_CODE_FC#define lpfc_mbx_mq_create_ext_async_evt_fc_MASK 0x00000001#define lpfc_mbx_mq_create_ext_async_evt_fc_WORD async_evt_bmap#define LPFC_EVT_CODE_FC_NO_LINK 0x0#define LPFC_EVT_CODE_FC_1_GBAUD 0x1#define LPFC_EVT_CODE_FC_2_GBAUD 0x2#define LPFC_EVT_CODE_FC_4_GBAUD 0x4#define LPFC_EVT_CODE_FC_8_GBAUD 0x8#define LPFC_EVT_CODE_FC_10_GBAUD 0xA#define LPFC_EVT_CODE_FC_16_GBAUD 0x10#define lpfc_mbx_mq_create_ext_async_evt_sli_SHIFT LPFC_TRAILER_CODE_SLI#define lpfc_mbx_mq_create_ext_async_evt_sli_MASK 0x00000001#define lpfc_mbx_mq_create_ext_async_evt_sli_WORD async_evt_bmapstruct mq_context context;struct dma_address page[LPFC_MAX_MQ_PAGE];struct {#define lpfc_mbx_mq_create_q_id_SHIFT 0#define lpfc_mbx_mq_create_q_id_MASK 0x0000FFFF#define lpfc_mbx_mq_create_q_id_WORD word0#define LPFC_ASYNC_EVENT_LINK_STATE 0x2
Messung V0.5 C=96 H=100 G=97
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