// SPDX-License-Identifier: GPL-2.0+ /* * Copyright (c) 2018 BayLibre, SAS * Author: Neil Armstrong <narmstrong@baylibre.com> #include <linux/of_address.h>#include <linux/platform_device.h>#include <linux/bitfield.h>#include <linux/seq_file.h>#include <linux/debugfs.h>#include <linux/regmap.h>#include <linux/module.h>static DEFINE_MUTEX(measure_lock);#define MSR_DURATION GENMASK(15, 0)#define MSR_ENABLE BIT(16)#define MSR_CONT BIT(17) /* continuous measurement */ #define MSR_INTR BIT(18) /* interrupts */ #define MSR_RUN BIT(19)#define MSR_CLK_SRC GENMASK(26, 20)#define MSR_BUSY BIT(31)#define MSR_VAL_MASK GENMASK(15, 0)#define DIV_MIN 32#define DIV_STEP 32#define DIV_MAX 640struct meson_msr_id {struct meson_msr *priv;unsigned int id;const char *name;struct msr_reg_offset {unsigned int duty_val;unsigned int freq_ctrl;unsigned int duty_ctrl;unsigned int freq_val;struct meson_msr_data {struct meson_msr_id *msr_table;unsigned int msr_count;const struct msr_reg_offset *reg;struct meson_msr {struct regmap *regmap;struct meson_msr_data data;#define CLK_MSR_ID(__id, __name) \static const struct meson_msr_id clk_msr_m8[] = {"ring_osc_out_ee0" ),"ring_osc_out_ee1" ),"ring_osc_out_ee2" ),"a9_ring_osck" ),"vid_pll" ),"clk81" ),"encp" ),"encl" ),"eth_rmii" ),"amclk" ),"fec_clk_0" ),"fec_clk_1" ),"fec_clk_2" ),"a9_clk_div16" ),"hdmi_sys" ),"rtc_osc_clk_out" ),"i2s_clk_in_src0" ),"clk_rmii_from_pad" ),"hdmi_ch0_tmds" ),"lvds_fifo" ),"sc_clk_int" ),"sar_adc" ),"mpll_clk_test_out" ),"audac_clkpi" ),"vdac" ),"sdhc_rx" ),"sdhc_sd" ),"mali" ),"hdmi_tx_pixel" ),"vdin_meas" ),"pcm_sclk" ),"pcm_mclk" ),"eth_rx_tx" ),"pwm_d" ),"pwm_c" ),"pwm_b" ),"pwm_a" ),"pcm2_sclk" ),"ddr_dpll_pt" ),"pwm_f" ),"pwm_e" ),"hcodec" ),"usb_32k_alt" ),"gpio" ),"vid2_pll" ),"mipi_csi_cfg" ),static const struct meson_msr_id clk_msr_gx[] = {"ring_osc_out_ee_0" ),"ring_osc_out_ee_1" ),"ring_osc_out_ee_2" ),"a53_ring_osc" ),"gp0_pll" ),"enci" ),"clk81" ),"encp" ),"encl" ),"vdac" ),"rgmii_tx" ),"pdm" ),"amclk" ),"fec_0" ),"fec_1" ),"fec_2" ),"sys_pll_div16" ),"sys_cpu_div16" ),"hdmitx_sys" ),"rtc_osc_out" ),"i2s_in_src0" ),"eth_phy_ref" ),"hdmi_todig" ),"sc_int" ),"sar_adc" ),"mpll_test_out" ),"vdec" ),"mali" ),"hdmi_tx_pixel" ),"i958" ),"vdin_meas" ),"pcm_sclk" ),"pcm_mclk" ),"eth_rx_or_rmii" ),"mp0_out" ),"fclk_div5" ),"pwm_b" ),"pwm_a" ),"vpu" ),"ddr_dpll_pt" ),"mp1_out" ),"mp2_out" ),"mp3_out" ),"nand_core" ),"sd_emmc_b" ),"sd_emmc_a" ),"vid_pll_div_out" ),"cci" ),"wave420l_c" ),"wave420l_b" ),"hcodec" ),"alt_32k" ),"gpio_msr" ),"hevc" ),"vid_lock" ),"pwm_f" ),"pwm_e" ),"pwm_d" ),"pwm_c" ),"aoclkx2_int" ),"aoclk_int" ),"rng_ring_osc_0" ),"rng_ring_osc_1" ),"rng_ring_osc_2" ),"rng_ring_osc_3" ),"vapb" ),"ge2d" ),static const struct meson_msr_id clk_msr_axg[] = {"ring_osc_out_ee_0" ),"ring_osc_out_ee_1" ),"ring_osc_out_ee_2" ),"a53_ring_osc" ),"gp0_pll" ),"gp1_pll" ),"clk81" ),"encl" ),"sys_pll_div16" ),"sys_cpu_div16" ),"rtc_osc_out" ),"mmc_clk" ),"sar_adc" ),"mpll_test_out" ),"mod_eth_tx_clk" ),"mod_eth_rx_clk_rmii" ),"mp0_out" ),"fclk_div5" ),"pwm_b" ),"pwm_a" ),"vpu" ),"ddr_dpll_pt" ),"mp1_out" ),"mp2_out" ),"mp3_out" ),"sd_emmm_c" ),"sd_emmc_b" ),"gpio_msr" ),"audio_slv_lrclk_c" ),"audio_slv_lrclk_b" ),"audio_slv_lrclk_a" ),"audio_slv_sclk_c" ),"audio_slv_sclk_b" ),"audio_slv_sclk_a" ),"pwm_d" ),"pwm_c" ),"wifi_beacon" ),"tdmin_lb_lrcl" ),"tdmin_lb_sclk" ),"rng_ring_osc_0" ),"rng_ring_osc_1" ),"rng_ring_osc_2" ),"rng_ring_osc_3" ),"vapb" ),"ge2d" ),"audio_resample" ),"audio_pdm_sys" ),"audio_spdifout" ),"audio_spdifin" ),"audio_lrclk_f" ),"audio_lrclk_e" ),"audio_lrclk_d" ),"audio_lrclk_c" ),"audio_lrclk_b" ),"audio_lrclk_a" ),"audio_sclk_f" ),"audio_sclk_e" ),"audio_sclk_d" ),"audio_sclk_c" ),"audio_sclk_b" ),"audio_sclk_a" ),"audio_mclk_f" ),"audio_mclk_e" ),"audio_mclk_d" ),"audio_mclk_c" ),"audio_mclk_b" ),"audio_mclk_a" ),"pcie_refclk_n" ),"pcie_refclk_p" ),"audio_locker_out" ),"audio_locker_in" ),static const struct meson_msr_id clk_msr_g12a[] = {"ring_osc_out_ee_0" ),"ring_osc_out_ee_1" ),"ring_osc_out_ee_2" ),"sys_cpu_ring_osc" ),"gp0_pll" ),"enci" ),"clk81" ),"encp" ),"encl" ),"vdac" ),"eth_tx" ),"hifi_pll" ),"mod_tcon" ),"fec_0" ),"fec_1" ),"fec_2" ),"sys_pll_div16" ),"sys_cpu_div16" ),"lcd_an_ph2" ),"rtc_osc_out" ),"lcd_an_ph3" ),"eth_phy_ref" ),"mpll_50m" ),"eth_125m" ),"eth_rmii" ),"sc_int" ),"in_mac" ),"sar_adc" ),"pcie_inp" ),"pcie_inn" ),"mpll_test_out" ),"vdec" ),"sys_cpu_ring_osc_1" ),"eth_mpll_50m" ),"mali" ),"hdmi_tx_pixel" ),"cdac" ),"vdin_meas" ),"bt656" ),"eth_rx_or_rmii" ),"mp0_out" ),"fclk_div5" ),"pwm_b" ),"pwm_a" ),"vpu" ),"ddr_dpll_pt" ),"mp1_out" ),"mp2_out" ),"mp3_out" ),"sd_emmc_c" ),"sd_emmc_b" ),"sd_emmc_a" ),"vpu_clkc" ),"vid_pll_div_out" ),"wave420l_a" ),"wave420l_c" ),"wave420l_b" ),"hcodec" ),"gpio_msr" ),"hevcb" ),"dsi_meas" ),"spicc_1" ),"spicc_0" ),"vid_lock" ),"dsi_phy" ),"hdcp22_esm" ),"hdcp22_skp" ),"pwm_f" ),"pwm_e" ),"pwm_d" ),"pwm_c" ),"hevcf" ),"rng_ring_osc_0" ),"rng_ring_osc_1" ),"rng_ring_osc_2" ),"rng_ring_osc_3" ),"vapb" ),"ge2d" ),"co_rx" ),"co_tx" ),"hdmi_todig" ),"hdmitx_sys" ),"sys_cpub_div16" ),"sys_pll_cpub_div16" ),"eth_phy_rx" ),"eth_phy_pll" ),"vpu_b" ),"cpu_b_tmp" ),"ts" ),"ring_osc_out_ee_3" ),"ring_osc_out_ee_4" ),"ring_osc_out_ee_5" ),"ring_osc_out_ee_6" ),"ring_osc_out_ee_7" ),"ring_osc_out_ee_8" ),"ring_osc_out_ee_9" ),"ephy_test" ),"au_dac_g128x" ),"audio_locker_out" ),"audio_locker_in" ),"audio_tdmout_c_sclk" ),"audio_tdmout_b_sclk" ),"audio_tdmout_a_sclk" ),"audio_tdmin_lb_sclk" ),"audio_tdmin_c_sclk" ),"audio_tdmin_b_sclk" ),"audio_tdmin_a_sclk" ),"audio_resample" ),"audio_pdm_sys" ),"audio_spdifout_b" ),"audio_spdifout" ),"audio_spdifin" ),"audio_pdm_dclk" ),static const struct meson_msr_id clk_msr_sm1[] = {"ring_osc_out_ee_0" ),"ring_osc_out_ee_1" ),"ring_osc_out_ee_2" ),"ring_osc_out_ee_3" ),"gp0_pll" ),"gp1_pll" ),"enci" ),"clk81" ),"encp" ),"encl" ),"vdac" ),"eth_tx" ),"hifi_pll" ),"mod_tcon" ),"fec_0" ),"fec_1" ),"fec_2" ),"sys_pll_div16" ),"sys_cpu_div16" ),"lcd_an_ph2" ),"rtc_osc_out" ),"lcd_an_ph3" ),"eth_phy_ref" ),"mpll_50m" ),"eth_125m" ),"eth_rmii" ),"sc_int" ),"in_mac" ),"sar_adc" ),"pcie_inp" ),"pcie_inn" ),"mpll_test_out" ),"vdec" ),"eth_mpll_50m" ),"mali" ),"hdmi_tx_pixel" ),"cdac" ),"vdin_meas" ),"bt656" ),"arm_ring_osc_out_4" ),"eth_rx_or_rmii" ),"mp0_out" ),"fclk_div5" ),"pwm_b" ),"pwm_a" ),"vpu" ),"ddr_dpll_pt" ),"mp1_out" ),"mp2_out" ),"mp3_out" ),"sd_emmc_c" ),"sd_emmc_b" ),"sd_emmc_a" ),"vpu_clkc" ),"vid_pll_div_out" ),"wave420l_a" ),"wave420l_c" ),"wave420l_b" ),"hcodec" ),"arm_ring_osc_out_5" ),"gpio_msr" ),"hevcb" ),"dsi_meas" ),"spicc_1" ),"spicc_0" ),"vid_lock" ),"dsi_phy" ),"hdcp22_esm" ),"hdcp22_skp" ),"pwm_f" ),"pwm_e" ),"pwm_d" ),"pwm_c" ),"arm_ring_osc_out_6" ),"hevcf" ),"arm_ring_osc_out_7" ),"rng_ring_osc_0" ),"rng_ring_osc_1" ),"rng_ring_osc_2" ),"rng_ring_osc_3" ),"vapb" ),"ge2d" ),"co_rx" ),"co_tx" ),"arm_ring_osc_out_8" ),"arm_ring_osc_out_9" ),"mipi_dsi_phy" ),"cis2_adapt" ),"hdmi_todig" ),"hdmitx_sys" ),"nna_core" ),"nna_axi" ),"vad" ),"eth_phy_rx" ),"eth_phy_pll" ),"vpu_b" ),"cpu_b_tmp" ),"ts" ),"arm_ring_osc_out_10" ),"arm_ring_osc_out_11" ),"arm_ring_osc_out_12" ),"arm_ring_osc_out_13" ),"arm_ring_osc_out_14" ),"arm_ring_osc_out_15" ),"arm_ring_osc_out_16" ),"ephy_test" ),"au_dac_g128x" ),"audio_locker_out" ),"audio_locker_in" ),"audio_tdmout_c_sclk" ),"audio_tdmout_b_sclk" ),"audio_tdmout_a_sclk" ),"audio_tdmin_lb_sclk" ),"audio_tdmin_c_sclk" ),"audio_tdmin_b_sclk" ),"audio_tdmin_a_sclk" ),"audio_resample" ),"audio_pdm_sys" ),"audio_spdifout_b" ),"audio_spdifout" ),"audio_spdifin" ),"audio_pdm_dclk" ),"audio_resampled" ),"earcrx_pll" ),"earcrx_pll_test" ),"csi_phy0" ),"csi2_data" ),static const struct meson_msr_id clk_msr_c3[] = {"sys_clk" ),"axi_clk" ),"rtc_clk" ),"p20_usb2_ckout" ),"eth_mpll_test" ),"sys_pll" ),"cpu_clk_div16" ),"ts_pll" ),"fclk_div2" ),"fclk_div2p5" ),"fclk_div3" ),"fclk_div4" ),"fclk_div5" ),"fclk_div7" ),"fclk_50m" ),"sys_oscin32k_i" ),"mclk_pll" ),"hifi_pll" ),"gp0_pll" ),"gp1_pll" ),"eth_mppll_50m_ckout" ),"sys_pll_div16" ),"ddr_dpll_pt_clk" ),"nna_core" ),"rtc_sec_pulse_out" ),"rtc_osc_clk_out" ),"debug_in_clk" ),"mod_eth_phy_ref_clk" ),"mod_eth_tx_clk" ),"eth_125m" ),"eth_rmii" ),"co_clkin_to_mac" ),"co_rx_clk" ),"co_tx_clk" ),"eth_phy_rxclk" ),"eth_phy_plltxclk" ),"ephy_test_clk" ),"vapb" ),"ge2d" ),"dewarpa" ),"mipi_dsi_meas" ),"dsi_phy" ),"rama" ),"vc9000e_core" ),"vc9000e_sys" ),"vc9000e_aclk" ),"hcodec" ),"deskew_pll_clk_div32_out" ),"mipi_csi_phy_clk_out[0]" ),"mipi_csi_phy_clk_out[1]" ),"spifc" ),"saradc" ),"ts" ),"sd_emmc_c" ),"sd_emmc_b" ),"sd_emmc_a" ),"gpio_msr_clk" ),"spicc_b" ),"spicc_a" ),"mod_audio_pdm_dclk_o" ),"o_earcrx_dmac_clk" ),"o_earcrx_cmdc_clk" ),"o_earctx_dmac_clk" ),"o_earctx_cmdc_clk" ),"o_tohdmitx_bclk" ),"o_tohdmitx_mclk" ),"o_tohdmitx_spdif_clk" ),"o_toacodec_bclk" ),"o_toacodec_mclk" ),"o_spdifout_b_mst_clk" ),"o_spdifout_mst_clk" ),"o_spdifin_mst_clk" ),"o_audio_mclk" ),"o_vad_clk" ),"o_tdmout_d_sclk" ),"o_tdmout_c_sclk" ),"o_tdmout_b_sclk" ),"o_tdmout_a_sclk" ),"o_tdminb_1b_sclk" ),"o_tdmin_1b_sclk" ),"o_tdmin_d_sclk" ),"o_tdmin_c_sclk" ),"o_tdmin_b_sclk" ),"o_tdmin_a_sclk" ),"o_resampleb_clk" ),"o_resamplea_clk" ),"o_pdmb_sysclk" ),"o_pdmb_dclk" ),"o_pdm_sysclk" ),"o_pdm_dclk" ),"c_alockerb_out_clk" ),"c_alockerb_in_clk" ),"c_alocker_out_clk" ),"c_alocker_in_clk" ),"audio_mst_clk[34]" ),"audio_mst_clk[35]" ),"pwm_n" ),"pwm_m" ),"pwm_l" ),"pwm_k" ),"pwm_j" ),"pwm_i" ),"pwm_h" ),"pwm_g" ),"pwm_f" ),"pwm_e" ),"pwm_d" ),"pwm_c" ),"pwm_b" ),"pwm_a" ),"AU_DAC1_CLK_TO_GPIO" ),"AU_ADC_CLK_TO_GPIO" ),"rng_ring_osc_clk[0]" ),"rng_ring_osc_clk[1]" ),"rng_ring_osc_clk[2]" ),"rng_ring_osc_clk[3]" ),"sys_cpu_ring_osc_clk[0]" ),"sys_cpu_ring_osc_clk[1]" ),"sys_cpu_ring_osc_clk[2]" ),"sys_cpu_ring_osc_clk[3]" ),"sys_cpu_ring_osc_clk[4]" ),"sys_cpu_ring_osc_clk[5]" ),"sys_cpu_ring_osc_clk[6]" ),"sys_cpu_ring_osc_clk[7]" ),"sys_cpu_ring_osc_clk[8]" ),"sys_cpu_ring_osc_clk[9]" ),"sys_cpu_ring_osc_clk[10]" ),"sys_cpu_ring_osc_clk[11]" ),"am_ring_osc_clk_out[12](dmc)" ),"am_ring_osc_clk_out[13](rama)" ),"am_ring_osc_clk_out[14](nna)" ),"am_ring_osc_clk_out[15](nna)" ),"rng_ring_osc_clk_1[0]" ),"rng_ring_osc_clk_1[1]" ),"rng_ring_osc_clk_1[2]" ),"rng_ring_osc_clk_1[3]" ),static const struct meson_msr_id clk_msr_s4[] = {"sys_clk" ),"axi_clk" ),"rtc_clk" ),"mali" ),"cpu_clk_div16" ),"ceca_clk" ),"cecb_clk" ),"fclk_div5" ),"mpll0" ),"mpll1" ),"mpll2" ),"mpll3" ),"fclk_50m" ),"pcie_clk_inp" ),"pcie_clk_inn" ),"mpll_clk_test_out" ),"hifi_pll" ),"gp0_pll" ),"gp1_pll" ),"eth_mppll_50m_ckout" ),"sys_pll_div16" ),"ddr_dpll_pt_clk" ),"mod_eth_phy_ref_clk" ),"mod_eth_tx_clk" ),"eth_125m" ),"eth_rmii" ),"co_clkin_to_mac" ),"mod_eth_rx_clk_rmii" ),"co_rx_clk" ),"co_tx_clk" ),"eth_phy_rxclk" ),"eth_phy_plltxclk" ),"ephy_test_clk" ),"vid_pll_div_clk_out" ),"enci" ),"encp" ),"encl" ),"vdac" ),"cdac_clk_c" ),"mod_tcon_clko" ),"lcd_an_clk_ph2" ),"lcd_an_clk_ph3" ),"hdmitx_pixel" ),"vdin_meas" ),"vpu" ),"vpu_clkb" ),"vpu_clkb_tmp" ),"vpu_clkc" ),"vid_lock" ),"vapb" ),"ge2d" ),"cts_hdcp22_esmclk" ),"cts_hdcp22_skpclk" ),"hdmitx_tmds" ),"hdmitx_sys_clk" ),"hdmitx_fe_clk" ),"rama" ),"vdec" ),"hevcf" ),"demod_core" ),"adc_extclk_in" ),"cts_demod_core_t2_clk" ),"adc_dpll_intclk" ),"adc_dpll_clk_b3" ),"s2_adc_clk" ),"deskew_pll_clk_div32_out" ),"sc" ),"sar_adc" ),"sd_emmc_c" ),"sd_emmc_b" ),"sd_emmc_a" ),"gpio_msr_clk" ),"spicc0" ),"ts" ),"audio_vad_clk" ),"acodec_dac_clk_x128" ),"audio_locker_in_clk" ),"audio_locker_out_clk" ),"audio_tdmout_c_sclk" ),"audio_tdmout_b_sclk" ),"audio_tdmout_a_sclk" ),"audio_tdmin_lb_sclk" ),"audio_tdmin_c_sclk" ),"audio_tdmin_b_sclk" ),"audio_tdmin_a_sclk" ),"audio_resamplea_clk" ),"audio_pdm_sysclk" ),"audio_spdifout_b_mst_clk" ),"audio_spdifout_mst_clk" ),"audio_spdifin_mst_clk" ),"audio_pdm_dclk" ),"audio_resampleb_clk" ),"pwm_j" ),"pwm_i" ),"pwm_h" ),"pwm_g" ),"pwm_f" ),"pwm_e" ),"pwm_d" ),"pwm_c" ),"pwm_b" ),"pwm_a" ),"rng_ring_0" ),"rng_ring_1" ),"rng_ring_2" ),"rng_ring_3" ),"dmc_osc_ring(LVT16)" ),"gpu_osc_ring0(LVT16)" ),"gpu_osc_ring1(ULVT16)" ),"gpu_osc_ring2(SLVT16)" ),"vpu_osc_ring0(SVT24)" ),"vpu_osc_ring1(LVT20)" ),"vpu_osc_ring2(LVT16)" ),"dos_osc_ring0(SVT24)" ),"dos_osc_ring1(SVT16)" ),"dos_osc_ring2(LVT16)" ),"dos_osc_ring3(ULVT20)" ),"axi_sram_osc_ring(SVT16)" ),"demod_osc_ring0" ),"demod_osc_ring1" ),"sar_osc_ring" ),"sys_cpu_osc_ring0" ),"sys_cpu_osc_ring1" ),"sys_cpu_osc_ring2" ),"sys_cpu_osc_ring3" ),"sys_cpu_osc_ring4" ),"sys_cpu_osc_ring5" ),"sys_cpu_osc_ring6" ),"sys_cpu_osc_ring7" ),"sys_cpu_osc_ring8" ),"sys_cpu_osc_ring9" ),"sys_cpu_osc_ring10" ),"sys_cpu_osc_ring11" ),"sys_cpu_osc_ring12" ),"sys_cpu_osc_ring13" ),"sys_cpu_osc_ring14" ),"sys_cpu_osc_ring15" ),"sys_cpu_osc_ring16" ),"sys_cpu_osc_ring17" ),"sys_cpu_osc_ring18" ),"sys_cpu_osc_ring19" ),"sys_cpu_osc_ring20" ),"sys_cpu_osc_ring21" ),"sys_cpu_osc_ring22" ),"sys_cpu_osc_ring23" ),"sys_cpu_osc_ring24" ),"sys_cpu_osc_ring25" ),"sys_cpu_osc_ring26" ),"sys_cpu_osc_ring27" ),static int meson_measure_id(struct meson_msr_id *clk_msr_id,unsigned int duration)struct meson_msr *priv = clk_msr_id->priv;const struct msr_reg_offset *reg = priv->data.reg;unsigned int val;int ret;if (ret)return ret;/* Set measurement duration */ /* Set ID */ /* Enable & Start */ if (ret) {return ret;/* Disable */ /* Get the value in multiple of gate time counts */ if (val >= MSR_VAL_MASK)return -EINVAL;return DIV_ROUND_CLOSEST_ULL((val & MSR_VAL_MASK) * 1000000ULL,static int meson_measure_best_id(struct meson_msr_id *clk_msr_id,unsigned int *precision)unsigned int duration = DIV_MAX;int ret;/* Start from max duration and down to min duration */ do {if (ret >= 0)else while (duration >= DIV_MIN && ret == -EINVAL);return ret;static int clk_msr_show(struct seq_file *s, void *data)struct meson_msr_id *clk_msr_id = s->private ;unsigned int precision = 0;int val;if (val < 0)return val;"%d\t+/-%dHz\n" , val, precision);return 0;static int clk_msr_summary_show(struct seq_file *s, void *data)struct meson_msr_id *msr_table = s->private ;unsigned int msr_count = msr_table->priv->data.msr_count;unsigned int precision = 0;int val, i;" clock rate precision\n" );"---------------------------------------------\n" );for (i = 0 ; i < msr_count ; ++i) {if (!msr_table[i].name)continue ;if (val < 0)return val;" %-20s %10d +/-%dHz\n" ,return 0;static struct regmap_config meson_clk_msr_regmap_config = {static int meson_msr_probe(struct platform_device *pdev)const struct meson_msr_data *match_data;struct meson_msr *priv;struct dentry *root, *clks;struct resource *res;void __iomem *base;int i;sizeof (struct meson_msr),if (!priv)return -ENOMEM;if (!match_data) {"failed to get match data\n" );return -ENODEV;sizeof (struct meson_msr_id),if (!priv->data.msr_table)return -ENOMEM;sizeof (struct meson_msr_id));if (IS_ERR(base))return PTR_ERR(base);if (IS_ERR(priv->regmap))return PTR_ERR(priv->regmap);sizeof (struct msr_reg_offset),if (!priv->data.reg)return -ENOMEM;void *)priv->data.reg, match_data->reg,sizeof (struct msr_reg_offset));"meson-clk-msr" , NULL);"clks" , root);"measure_summary" , 0444, root,for (i = 0 ; i < priv->data.msr_count ; ++i) {if (!priv->data.msr_table[i].name)continue ;return 0;static const struct msr_reg_offset msr_reg_offset = {static const struct meson_msr_data clk_msr_gx_data = {void *)clk_msr_gx,static const struct meson_msr_data clk_msr_m8_data = {void *)clk_msr_m8,static const struct meson_msr_data clk_msr_axg_data = {void *)clk_msr_axg,static const struct meson_msr_data clk_msr_g12a_data = {void *)clk_msr_g12a,static const struct meson_msr_data clk_msr_sm1_data = {void *)clk_msr_sm1,static const struct msr_reg_offset msr_reg_offset_v2 = {static const struct meson_msr_data clk_msr_c3_data = {void *)clk_msr_c3,static const struct meson_msr_data clk_msr_s4_data = {void *)clk_msr_s4,static const struct of_device_id meson_msr_match_table[] = {"amlogic,meson-gx-clk-measure" ,"amlogic,meson8-clk-measure" ,"amlogic,meson8b-clk-measure" ,"amlogic,meson-axg-clk-measure" ,"amlogic,meson-g12a-clk-measure" ,"amlogic,meson-sm1-clk-measure" ,"amlogic,c3-clk-measure" ,"amlogic,s4-clk-measure" ,/* sentinel */ } static struct platform_driver meson_msr_driver = {"meson_msr" ,"Amlogic Meson SoC Clock Measure driver" );"GPL v2" );
Messung V0.5 C=99 H=95 G=96
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