// SPDX-License-Identifier: GPL-1.0+ /* * OHCI HCD (Host Controller Driver) for USB. * * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at> * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net> * (C) Copyright 2002 Hewlett-Packard Company * * SA1111 Bus Glue * * Written by Christopher Hoover <ch@hpl.hp.com> * Based on fragments of previous driver by Russell King et al. * * This file is licenced under the GPL.
*/
dev_dbg(&dev->dev, "starting SA-1111 OHCI USB Controller\n");
if (machine_is_assabet())
usb_rst = USB_RESET_PWRSENSELOW | USB_RESET_PWRCTRLLOW;
/* * Configure the power sense and control lines. Place the USB * host controller in reset.
*/
writel_relaxed(usb_rst | USB_RESET_FORCEIFRESET | USB_RESET_FORCEHCRESET,
dev->mapbase + USB_RESET);
/* * Now, carefully enable the USB clock, and take * the USB host controller out of reset.
*/
ret = sa1111_enable_device(dev); if (ret == 0) {
udelay(11);
writel_relaxed(usb_rst, dev->mapbase + USB_RESET);
}
dev_dbg(&dev->dev, "stopping SA-1111 OHCI USB Controller\n");
/* * Put the USB host controller into reset.
*/
usb_rst = readl_relaxed(dev->mapbase + USB_RESET);
writel_relaxed(usb_rst | USB_RESET_FORCEIFRESET | USB_RESET_FORCEHCRESET,
dev->mapbase + USB_RESET);
/* * Stop the USB clock.
*/
sa1111_disable_device(dev);
}
/** * ohci_hcd_sa1111_probe - initialize SA-1111-based HCDs * * Allocates basic resources for this USB host controller, and * then invokes the start() method for the HCD associated with it.
*/ staticint ohci_hcd_sa1111_probe(struct sa1111_dev *dev)
{ struct usb_hcd *hcd; int ret, irq;
if (usb_disabled()) return -ENODEV;
/* * We don't call dma_set_mask_and_coherent() here because the * DMA mask has already been appropraitely setup by the core * SA-1111 bus code (which includes bug workarounds.)
*/
hcd = usb_create_hcd(&ohci_sa1111_hc_driver, &dev->dev, "sa1111"); if (!hcd) return -ENOMEM;
irq = sa1111_get_irq(dev, 1); if (irq <= 0) {
ret = irq ? : -ENXIO; goto err1;
}
/* * According to the "Intel StrongARM SA-1111 Microprocessor Companion * Chip Specification Update" (June 2000), erratum #7, there is a * significant bug in the SA1111 SDRAM shared memory controller. If * an access to a region of memory above 1MB relative to the bank base, * it is important that address bit 10 _NOT_ be asserted. Depending * on the configuration of the RAM, bit 10 may correspond to one * of several different (processor-relative) address bits. * * Section 4.6 of the "Intel StrongARM SA-1111 Development Module * User's Guide" mentions that jumpers R51 and R52 control the * target of SA-1111 DMA (either SDRAM bank 0 on Assabet, or * SDRAM bank 1 on Neponset). The default configuration selects * Assabet, so any address in bank 1 is necessarily invalid. * * As a workaround, use a bounce buffer in addressable memory * as local_mem, relying on ZONE_DMA to provide an area that * fits within the above constraints. * * SZ_64K is an estimate for what size this might need.
*/
ret = usb_hcd_setup_local_mem(hcd, 0, 0, SZ_64K); if (ret) goto err1;
if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) {
dev_dbg(&dev->dev, "request_mem_region failed\n");
ret = -EBUSY; goto err1;
}
hcd->regs = dev->mapbase;
ret = sa1111_start_hc(dev); if (ret) goto err2;
ret = usb_add_hcd(hcd, irq, 0); if (ret == 0) {
device_wakeup_enable(hcd->self.controller); return ret;
}
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