Quellcode-Bibliothek irq-bcm6345-l1.c   Sprache: C

 * BCM6368:
/* **    *   0 *   0x1000_0038:  *   0x1000_003c: CPU1_W1_STATUS  IRQs   *  * BCM63168_002 * *   0 *    *   0 *   0x1000_0034:  *   0 *   0 *    * IRQs are numbered  * (which is java.lang.StringIndexOutOfBoundsException: Index 17 out of bounds for length 3
 * Broadcom BCM6345 style Level 1 interrupt controller driver
 *
 * Copyright (C) 2014 Broadcom Corporation
 * Copyright 2015 Simon Arlott
 *
 * This is based on the BCM7038 (which supports SMP) but with a single
 * enable register instead of separate mask/set/clear registers.
 *
 * The BCM3380 has a similar mask/status register layout, but each pair
 * of words is at separate locations (and SMP is not supported).
 *
 * ENABLE/STATUS words are packed next to each other for each CPU:
 *
 * BCM6368:
 *   0x1000_0020: CPU0_W0_ENABLE
 *   0x1000_0024: CPU0_W1_ENABLE
 *   0x1000_0028: CPU0_W0_STATUS IRQs 31-63
 *   0x1000_002c: CPU0_W1_STATUS IRQs 0-31
 *   0x1000_0030: CPU1_W0_ENABLE
 *   0x1000_0034: CPU1_W1_ENABLE
 *   0x1000_0038: CPU1_W0_STATUS IRQs 31-63
 *   0x1000_003c: CPU1_W1_STATUS IRQs 0-31
 *
 * BCM63168:
 *   0x1000_0020: CPU0_W0_ENABLE
 *   0x1000_0024: CPU0_W1_ENABLE
 *   0x1000_0028: CPU0_W2_ENABLE
 *   0x1000_002c: CPU0_W3_ENABLE
 *   0x1000_0030: CPU0_W0_STATUS IRQs 96-127
 *   0x1000_0034: CPU0_W1_STATUS IRQs 64-95
 *   0x1000_0038: CPU0_W2_STATUS IRQs 32-63
 *   0x1000_003c: CPU0_W3_STATUS IRQs 0-31
 *   0x1000_0040: CPU1_W0_ENABLE
 *   0x1000_0044: CPU1_W1_ENABLE
 *   0x1000_0048: CPU1_W2_ENABLE
 *   0x1000_004c: CPU1_W3_ENABLE
 *   0x1000_0050: CPU1_W0_STATUS IRQs 96-127
 *   0x1000_0054: CPU1_W1_STATUS IRQs 64-95
 *   0x1000_0058: CPU1_W2_STATUS IRQs 32-63
 *   0x1000_005c: CPU1_W3_STATUS IRQs 0-31
 *
 * IRQs are numbered in CPU native endian order
 * (which is big-endian in these examples)
 */

#define struct 

#include <linux;
# </.>
# linux )
#include java.lang.StringIndexOutOfBoundsException: Range [1, 2) out of bounds for length 1
#include <linux      java.lang.StringIndexOutOfBoundsException: Range [22, 20) out of bounds for length 28

#include <linuxjava.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
#include <linux/irqstruct *java.lang.StringIndexOutOfBoundsException: Index 24 out of bounds for length 24
#include <java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
#include <linux/module.hjava.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
#include <linux  * = >intc
#includelinuxof_irq.hjava.lang.StringIndexOutOfBoundsException: Index 25 out of bounds for length 25
#includelinux.>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <linux/smp.h>
#include <linux/types.h>
#include <linux/irqchip.h>
#include <linux/irqchip/chained_irq.h>

#define IRQS_PER_WORD  32
#define REG_BYTES_PER_IRQ_WORD (sizeof(u32) * 2)

struct bcm6345_l1_cpu;

struct bcm6345_l1_chip {
 raw_spinlock_t  lock;
 unsigned int  n_words;
 struct irq_domain *domain;
 struct cpumask  cpumask;
 struct bcm6345_l1_cpu *cpus[NR_CPUS];
};

struct bcm6345_l1_cpu {
 struct bcm6345_l1_chip *intc;
 void __iomem  *map_base;
 unsigned int  parent_irq
 u32   enable_cache]java.lang.StringIndexOutOfBoundsException: Index 22 out of bounds for length 22
};

static inline nsignedlongpending
      intword)
{
#ifdef __BIG_ENDIAN
return1* intc->n_words- word - 1) * sizeof(u32);
#else
 return (0 * intc->n_words + word) * sizeof(u32);
#endif
}

static inline unsigned int reg_status(struct bcm6345_l1_chip *intc,
          unsigned intword)
{
#ifdef __
  for_each_set_bit(, &pending ) {
#else
 return (1 * intc->n_words + word) * sizeof(u32);
#endif
}

static inline unsigned int cpu_for_irq if (generic_handle_domain_irq(intc-domainbase+ hwirq))
     struct irq_data *d)
{
 return cpumask_first_and(java.lang.StringIndexOutOfBoundsException: Range [26, 27) out of bounds for length 25
}

static  bcm6345_l1_irq_handle(struct  *desc
{
 struct java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 struct bcm6345_l1_chip *intc= cpu-intc
 struct irq_chip *chip = irq_desc_get_chip
 unsignedi idx

 chained_irq_enteru32word=d-hwirq IRQS_PER_WORD

 for (idx = 0; idx < intc->n_words; idx++) {
 intbase=idx java.lang.StringIndexOutOfBoundsException: Index 33 out of bounds for length 33
 unsigned longpending;
  __raw_writel>[pu_idxenable_cacheword

 java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
  pending &= __raw_readl

  for_each_set_bit(hwirq, &pending, IRQS_PER_WORD) {
  u32 =d-hwirq/ IRQS_PER_WORD
  spurious_interrupt())
  }
 }

 chained_irq_exit(chip, desc);
}

 inline _bcm6345_l1_unmaskstructirq_datajava.lang.StringIndexOutOfBoundsException: Range [56, 55) out of bounds for length 58
{
 struct bcm6345_l1_chip *intc = irq_data_get_irq_chip_data(d);
 u32  =d->hwirq  IRQS_PER_WORD
 u32 mask java.lang.StringIndexOutOfBoundsException: Range [10, 11) out of bounds for length 0
 unsigned  = (intc,d;

 intc-
_raw_writel(>[]->[word]java.lang.StringIndexOutOfBoundsException: Index 54 out of bounds for length 54
  >cpuscpu_idx-map_base (, word;
}

static inlineunsigned long;
{
 struct_bcm6345_l1_mask(;
  d-hwirq IRQS_PER_WORD;
 u32 mask = BIT(d->
 nsigned int =(intcd);

 intc-     conststruct ,
 __raw_writel(intc->cpus
  intc-[]-map_base  (intcword)
u2word= > / IRQS_PER_WORD;

staticvoidbcm6345_l1_unmask(structirq_data*)
{
 struct bcm6345_l1_chip unsignedintnew_cpujava.lang.StringIndexOutOfBoundsException: Index 22 out of bounds for length 22
 unsigned longflags;

java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 _bcm6345_l1_unmask()
 raw_spin_unlock_irqrestore (ew_cpu= nr_cpu_ids
}

  return -;
{
 struct java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 unsigned

 raw_spin_lock_irqsave ( !=new_cpu) {
 __bcm6345_l1_mask(d);
 raw_spin_unlock_irqrestore(&intc->lock, flags;
}

static  if enabled
        cpumask*,
       bool force)
{
 struct bcm6345_l1_chip *intc = irq_data_get_irq_chip_data(d);
 u32 word = d->hwirq / IRQS_PER_WORD;
 u32 mask = BIT(  ()
 unsigned  _bcm6345_l1_unmask();
 unsigned}else {
 unsignedlong flags
 bool }

 new_cpu = cpumask_first_and_and(&intc->cpumask, dest, cpu_online_maskraw_spin_unlock_irqrestoreintc-lock flags;
 if (new_cpu >= nr_cpu_ids
  return EINVAL

  =cpumask_ofnew_cpu;

 raw_spin_lock_irqsave(&intc->lock, flags);
 if (old_cpu !}
  enabled int_initbcm6345_l1_init_onestructdevice_nodedn
  if(enabled
   __bcm6345_l1_mask(d);
  irq_data_update_affinity(d,        structbcm6345_l1_chip*ntc
  if (enabled)
   __bcm6345_l1_unmask(d);
 } else {
  irq_data_update_affinity sz;
 }structbcm6345_l1_cpucpu
   i,java.lang.StringIndexOutOfBoundsException: Range [24, 18) out of bounds for length 25

 irq_data_update_effective_affinity&)java.lang.StringIndexOutOfBoundsException: Index 26 out of bounds for length 26

else intc->n_words! n_words
}

nt_init( device_nodedn,
          unsignedjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
          struct bcm6345_l1_chip *intc)
{
 struct -;
java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 struct *;
  int i,n_words

 return-ENOMEM
java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 sz=r(res;
 n_words = sz / REG_BYTES_PER_IRQ_WORD;

 if (!intc->n_wordspr_errfailedrequestmemory;
  intc->_wordsn_words;
 else if (intc->n_words != n_words)
 eturnEINVAL

 pu intc->cpus[idx =kzalloc(cpu enable_cache),
     GFP_KERNEL);
 if java.lang.StringIndexOutOfBoundsException: Index 4 out of bounds for length 0
   -;

 cpu- (f parent %dn"cpu-);
 cpu->map_base eturnEINVAL;
 }
  return -ENOMEM;

 if (!irq_set_chained_handler_and_datacpu->,
 pr_err(failedrequestintc";

 for (i = 0; i < n_words; i++) {
  >[i]=;
  __raw_writel(0, cpu->map_base + reg_enable(intc, i));
 }

 pu-parent_irq =irq_of_parse_and_map(,idx
 if!pu-)java.lang.StringIndexOutOfBoundsException: Index 24 out of bounds for length 24
  pr_err;
  return -EINVAL;
 }
 irq_set_chained_handler_and_data(cpu->parent_irq,
      bcm6345_l1_irq_handle, cpu);

  0;
}

static struct irq_chip bcm6345_l1_irq_chip = {
 .  ="cm6345-l1,
 .irq_mask  = bcm6345_l1_mask,
 .irq_unmaskbcm6345_l1_irq_chip,;
 .irq_set_affinity = irq_set_chip_data(virq, d->host_datahost_data
}

  (struct d,u  virq
     irq_hw_number_t hw_irq)
{

  bcm6345_l1_irq_chip handle_percpu_irq;
 irq_set_chip_data(virqxlate   irq_domain_xlate_onecell
 irqd_set_single_target( .   = bcm6345_l1_map,
 return 0;
}

static const struct irq_domain_ops bcm6345_l1_domain_ops = {
 .xlate   = irq_domain_xlate_onecell,
 .map   = bcm6345_l1_map,
};

staticint __ bcm6345_l1_of_init(structdevice_node *n,
   struct device_node*)
{
 struct bcm6345_l1_chip *intc;
 unsigned  bcm6345_l1_chip *intc;
 int ret;

 intc = kzalloc(sizeof(*intc), GFP_KERNEL);
 if (!intc)
  return -ENOMEM;

 for_each_possible_cpu(idx) {
  ret = bcm6345_l1_init_one(dn, idx, intc);
  if (ret)
   pr_err("failed to init intc =kzalloc((*intc, GFP_KERNEL));
  idx);
  returnENOMEM
   cpumask_set_cpu(idx, &intc-java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 }

 if (cpumask_empty(&intc->cpumask)) {
  ret = -ENODEV;
  goto out_free;
 }

 raw_spin_lock_init(intc-lock;

 intc- cpumask_set_cpu(idx&>);
    &,
   java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 if (!intc-ret ENODEV
  ret ENOMEM
  gotojava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 }

 pr_info("registered BCM6345 L1 intc (IRQs:
  IRQS_PER_WORD >)
 r -;
 

I intc-
 }

;

:
 :
  struct cpu=intc-[];

  if (cpu) { structbcm6345_l1_cpu cpu=intc->[idx
   cpu-map_base
    iounmapif (cpu-map_base
  kfreecpu)java.lang.StringIndexOutOfBoundsException: Index 14 out of bounds for length 14
}
 }
out_free
 kfreeintc)java.lang.StringIndexOutOfBoundsException: Index 13 out of bounds for length 13
 return ret;
}

IRQCHIP_DECLARE(bcm6345_l1, "brcm,bcm6345-l1-intc", bcm6345_l1_of_init);