/* * Current version of this protocol * * TODO(crosbug.com/p/11223): This is effectively useless; protocol is * determined in other ways. Remove this once the kernel code no longer * depends on it.
*/ #define EC_PROTO_VERSION 0x00000002
/* Command version mask */ #define EC_VER_MASK(version) BIT(version)
/* I/O addresses for host command args and params */ /* Protocol version 2 */ #define EC_LPC_ADDR_HOST_ARGS 0x800 /* And 0x801, 0x802, 0x803 */ #define EC_LPC_ADDR_HOST_PARAM 0x804 /* For version 2 params; size is * EC_PROTO2_MAX_PARAM_SIZE
*/ /* Protocol version 3 */ #define EC_LPC_ADDR_HOST_PACKET 0x800 /* Offset of version 3 packet */ #define EC_LPC_HOST_PACKET_SIZE 0x100 /* Max size of version 3 packet */
/* * The actual block is 0x800-0x8ff, but some BIOSes think it's 0x880-0x8ff * and they tell the kernel that so we have to think of it as two parts. * * Other BIOSes report only the I/O port region spanned by the Microchip * MEC series EC; an attempt to address a larger region may fail.
*/ #define EC_HOST_CMD_REGION0 0x800 #define EC_HOST_CMD_REGION1 0x880 #define EC_HOST_CMD_REGION_SIZE 0x80 #define EC_HOST_CMD_MEC_REGION_SIZE 0x8
/* EC command register bit functions */ #define EC_LPC_CMDR_DATA BIT(0) /* Data ready for host to read */ #define EC_LPC_CMDR_PENDING BIT(1) /* Write pending to EC */ #define EC_LPC_CMDR_BUSY BIT(2) /* EC is busy processing a command */ #define EC_LPC_CMDR_CMD BIT(3) /* Last host write was a command */ #define EC_LPC_CMDR_ACPI_BRST BIT(4) /* Burst mode (not used) */ #define EC_LPC_CMDR_SCI BIT(5) /* SCI event is pending */ #define EC_LPC_CMDR_SMI BIT(6) /* SMI event is pending */
#define EC_LPC_ADDR_MEMMAP 0x900 #define EC_MEMMAP_SIZE 255 /* ACPI IO buffer max is 255 bytes */ #define EC_MEMMAP_TEXT_MAX 8 /* Size of a string in the memory map */
/* The offset address of each type of data in mapped memory. */ #define EC_MEMMAP_TEMP_SENSOR 0x00 /* Temp sensors 0x00 - 0x0f */ #define EC_MEMMAP_FAN 0x10 /* Fan speeds 0x10 - 0x17 */ #define EC_MEMMAP_TEMP_SENSOR_B 0x18 /* More temp sensors 0x18 - 0x1f */ #define EC_MEMMAP_ID 0x20 /* 0x20 == 'E', 0x21 == 'C' */ #define EC_MEMMAP_ID_VERSION 0x22 /* Version of data in 0x20 - 0x2f */ #define EC_MEMMAP_THERMAL_VERSION 0x23 /* Version of data in 0x00 - 0x1f */ #define EC_MEMMAP_BATTERY_VERSION 0x24 /* Version of data in 0x40 - 0x7f */ #define EC_MEMMAP_SWITCHES_VERSION 0x25 /* Version of data in 0x30 - 0x33 */ #define EC_MEMMAP_EVENTS_VERSION 0x26 /* Version of data in 0x34 - 0x3f */ #define EC_MEMMAP_HOST_CMD_FLAGS 0x27 /* Host cmd interface flags (8 bits) */ /* Unused 0x28 - 0x2f */ #define EC_MEMMAP_SWITCHES 0x30 /* 8 bits */ /* Unused 0x31 - 0x33 */ #define EC_MEMMAP_HOST_EVENTS 0x34 /* 64 bits */ /* Battery values are all 32 bits, unless otherwise noted. */ #define EC_MEMMAP_BATT_VOLT 0x40 /* Battery Present Voltage */ #define EC_MEMMAP_BATT_RATE 0x44 /* Battery Present Rate */ #define EC_MEMMAP_BATT_CAP 0x48 /* Battery Remaining Capacity */ #define EC_MEMMAP_BATT_FLAG 0x4c /* Battery State, see below (8-bit) */ #define EC_MEMMAP_BATT_COUNT 0x4d /* Battery Count (8-bit) */ #define EC_MEMMAP_BATT_INDEX 0x4e /* Current Battery Data Index (8-bit) */ /* Unused 0x4f */ #define EC_MEMMAP_BATT_DCAP 0x50 /* Battery Design Capacity */ #define EC_MEMMAP_BATT_DVLT 0x54 /* Battery Design Voltage */ #define EC_MEMMAP_BATT_LFCC 0x58 /* Battery Last Full Charge Capacity */ #define EC_MEMMAP_BATT_CCNT 0x5c /* Battery Cycle Count */ /* Strings are all 8 bytes (EC_MEMMAP_TEXT_MAX) */ #define EC_MEMMAP_BATT_MFGR 0x60 /* Battery Manufacturer String */ #define EC_MEMMAP_BATT_MODEL 0x68 /* Battery Model Number String */ #define EC_MEMMAP_BATT_SERIAL 0x70 /* Battery Serial Number String */ #define EC_MEMMAP_BATT_TYPE 0x78 /* Battery Type String */ #define EC_MEMMAP_ALS 0x80 /* ALS readings in lux (2 X 16 bits) */ /* Unused 0x84 - 0x8f */ #define EC_MEMMAP_ACC_STATUS 0x90 /* Accelerometer status (8 bits )*/ /* Unused 0x91 */ #define EC_MEMMAP_ACC_DATA 0x92 /* Accelerometers data 0x92 - 0x9f */ /* 0x92: Lid Angle if available, LID_ANGLE_UNRELIABLE otherwise */ /* 0x94 - 0x99: 1st Accelerometer */ /* 0x9a - 0x9f: 2nd Accelerometer */ #define EC_MEMMAP_GYRO_DATA 0xa0 /* Gyroscope data 0xa0 - 0xa5 */ /* Unused 0xa6 - 0xdf */
/* * ACPI is unable to access memory mapped data at or above this offset due to * limitations of the ACPI protocol. Do not place data in the range 0xe0 - 0xfe * which might be needed by ACPI.
*/ #define EC_MEMMAP_NO_ACPI 0xe0
/* Define the format of the accelerometer mapped memory status byte. */ #define EC_MEMMAP_ACC_STATUS_SAMPLE_ID_MASK 0x0f #define EC_MEMMAP_ACC_STATUS_BUSY_BIT BIT(4) #define EC_MEMMAP_ACC_STATUS_PRESENCE_BIT BIT(7)
/* Number of temp sensors at EC_MEMMAP_TEMP_SENSOR */ #define EC_TEMP_SENSOR_ENTRIES 16 /* * Number of temp sensors at EC_MEMMAP_TEMP_SENSOR_B. * * Valid only if EC_MEMMAP_THERMAL_VERSION returns >= 2.
*/ #define EC_TEMP_SENSOR_B_ENTRIES 8
/* Special values for mapped temperature sensors */ #define EC_TEMP_SENSOR_NOT_PRESENT 0xff #define EC_TEMP_SENSOR_ERROR 0xfe #define EC_TEMP_SENSOR_NOT_POWERED 0xfd #define EC_TEMP_SENSOR_NOT_CALIBRATED 0xfc /* * The offset of temperature value stored in mapped memory. This allows * reporting a temperature range of 200K to 454K = -73C to 181C.
*/ #define EC_TEMP_SENSOR_OFFSET 200
/* * Number of ALS readings at EC_MEMMAP_ALS
*/ #define EC_ALS_ENTRIES 2
/* * The default value a temperature sensor will return when it is present but * has not been read this boot. This is a reasonable number to avoid * triggering alarms on the host.
*/ #define EC_TEMP_SENSOR_DEFAULT (296 - EC_TEMP_SENSOR_OFFSET)
#define EC_FAN_SPEED_ENTRIES 4 /* Number of fans at EC_MEMMAP_FAN */ #define EC_FAN_SPEED_NOT_PRESENT 0xffff /* Entry not present */ #define EC_FAN_SPEED_STALLED 0xfffe /* Fan stalled */
/* Battery bit flags at EC_MEMMAP_BATT_FLAG. */ #define EC_BATT_FLAG_AC_PRESENT 0x01 #define EC_BATT_FLAG_BATT_PRESENT 0x02 #define EC_BATT_FLAG_DISCHARGING 0x04 #define EC_BATT_FLAG_CHARGING 0x08 #define EC_BATT_FLAG_LEVEL_CRITICAL 0x10 /* Set if some of the static/dynamic data is invalid (or outdated). */ #define EC_BATT_FLAG_INVALID_DATA 0x20
/* Switch flags at EC_MEMMAP_SWITCHES */ #define EC_SWITCH_LID_OPEN 0x01 #define EC_SWITCH_POWER_BUTTON_PRESSED 0x02 #define EC_SWITCH_WRITE_PROTECT_DISABLED 0x04 /* Was recovery requested via keyboard; now unused. */ #define EC_SWITCH_IGNORE1 0x08 /* Recovery requested via dedicated signal (from servo board) */ #define EC_SWITCH_DEDICATED_RECOVERY 0x10 /* Was fake developer mode switch; now unused. Remove in next refactor. */ #define EC_SWITCH_IGNORE0 0x20
/* Wireless switch flags */ #define EC_WIRELESS_SWITCH_ALL ~0x00 /* All flags */ #define EC_WIRELESS_SWITCH_WLAN 0x01 /* WLAN radio */ #define EC_WIRELESS_SWITCH_BLUETOOTH 0x02 /* Bluetooth radio */ #define EC_WIRELESS_SWITCH_WWAN 0x04 /* WWAN power */ #define EC_WIRELESS_SWITCH_WLAN_POWER 0x08 /* WLAN power */
/*****************************************************************************/ /* * ACPI commands * * These are valid ONLY on the ACPI command/data port.
*/
/* * ACPI Read Embedded Controller * * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*). * * Use the following sequence: * * - Write EC_CMD_ACPI_READ to EC_LPC_ADDR_ACPI_CMD * - Wait for EC_LPC_CMDR_PENDING bit to clear * - Write address to EC_LPC_ADDR_ACPI_DATA * - Wait for EC_LPC_CMDR_DATA bit to set * - Read value from EC_LPC_ADDR_ACPI_DATA
*/ #define EC_CMD_ACPI_READ 0x0080
/* * ACPI Write Embedded Controller * * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*). * * Use the following sequence: * * - Write EC_CMD_ACPI_WRITE to EC_LPC_ADDR_ACPI_CMD * - Wait for EC_LPC_CMDR_PENDING bit to clear * - Write address to EC_LPC_ADDR_ACPI_DATA * - Wait for EC_LPC_CMDR_PENDING bit to clear * - Write value to EC_LPC_ADDR_ACPI_DATA
*/ #define EC_CMD_ACPI_WRITE 0x0081
/* * ACPI Burst Enable Embedded Controller * * This enables burst mode on the EC to allow the host to issue several * commands back-to-back. While in this mode, writes to mapped multi-byte * data are locked out to ensure data consistency.
*/ #define EC_CMD_ACPI_BURST_ENABLE 0x0082
/* * ACPI Burst Disable Embedded Controller * * This disables burst mode on the EC and stops preventing EC writes to mapped * multi-byte data.
*/ #define EC_CMD_ACPI_BURST_DISABLE 0x0083
/* * ACPI Query Embedded Controller * * This clears the lowest-order bit in the currently pending host events, and * sets the result code to the 1-based index of the bit (event 0x00000001 = 1, * event 0x80000000 = 32), or 0 if no event was pending.
*/ #define EC_CMD_ACPI_QUERY_EVENT 0x0084
/* Valid addresses in ACPI memory space, for read/write commands */
/* Memory space version; set to EC_ACPI_MEM_VERSION_CURRENT */ #define EC_ACPI_MEM_VERSION 0x00 /* * Test location; writing value here updates test compliment byte to (0xff - * value).
*/ #define EC_ACPI_MEM_TEST 0x01 /* Test compliment; writes here are ignored. */ #define EC_ACPI_MEM_TEST_COMPLIMENT 0x02
/* * DPTF temp thresholds. Any of the EC's temp sensors can have up to two * independent thresholds attached to them. The current value of the ID * register determines which sensor is affected by the THRESHOLD and COMMIT * registers. The THRESHOLD register uses the same EC_TEMP_SENSOR_OFFSET scheme * as the memory-mapped sensors. The COMMIT register applies those settings. * * The spec does not mandate any way to read back the threshold settings * themselves, but when a threshold is crossed the AP needs a way to determine * which sensor(s) are responsible. Each reading of the ID register clears and * returns one sensor ID that has crossed one of its threshold (in either * direction) since the last read. A value of 0xFF means "no new thresholds * have tripped". Setting or enabling the thresholds for a sensor will clear * the unread event count for that sensor.
*/ #define EC_ACPI_MEM_TEMP_ID 0x05 #define EC_ACPI_MEM_TEMP_THRESHOLD 0x06 #define EC_ACPI_MEM_TEMP_COMMIT 0x07 /* * Here are the bits for the COMMIT register: * bit 0 selects the threshold index for the chosen sensor (0/1) * bit 1 enables/disables the selected threshold (0 = off, 1 = on) * Each write to the commit register affects one threshold.
*/ #define EC_ACPI_MEM_TEMP_COMMIT_SELECT_MASK BIT(0) #define EC_ACPI_MEM_TEMP_COMMIT_ENABLE_MASK BIT(1) /* * Example: * * Set the thresholds for sensor 2 to 50 C and 60 C: * write 2 to [0x05] -- select temp sensor 2 * write 0x7b to [0x06] -- C_TO_K(50) - EC_TEMP_SENSOR_OFFSET * write 0x2 to [0x07] -- enable threshold 0 with this value * write 0x85 to [0x06] -- C_TO_K(60) - EC_TEMP_SENSOR_OFFSET * write 0x3 to [0x07] -- enable threshold 1 with this value * * Disable the 60 C threshold, leaving the 50 C threshold unchanged: * write 2 to [0x05] -- select temp sensor 2 * write 0x1 to [0x07] -- disable threshold 1
*/
/* DPTF battery charging current limit */ #define EC_ACPI_MEM_CHARGING_LIMIT 0x08
/* Charging limit is specified in 64 mA steps */ #define EC_ACPI_MEM_CHARGING_LIMIT_STEP_MA 64 /* Value to disable DPTF battery charging limit */ #define EC_ACPI_MEM_CHARGING_LIMIT_DISABLED 0xff
/* * Report device orientation * Bits Definition * 3:1 Device DPTF Profile Number (DDPN) * 0 = Reserved for backward compatibility (indicates no valid * profile number. Host should fall back to using TBMD). * 1..7 = DPTF Profile number to indicate to host which table needs * to be loaded. * 0 Tablet Mode Device Indicator (TBMD)
*/ #define EC_ACPI_MEM_DEVICE_ORIENTATION 0x09 #define EC_ACPI_MEM_TBMD_SHIFT 0 #define EC_ACPI_MEM_TBMD_MASK 0x1 #define EC_ACPI_MEM_DDPN_SHIFT 1 #define EC_ACPI_MEM_DDPN_MASK 0x7
/* * Report device features. Uses the same format as the host command, except: * * bit 0 (EC_FEATURE_LIMITED) changes meaning from "EC code has a limited set * of features", which is of limited interest when the system is already * interpreting ACPI bytecode, to "EC_FEATURES[0-7] is not supported". Since * these are supported, it defaults to 0. * This allows detecting the presence of this field since older versions of * the EC codebase would simply return 0xff to that unknown address. Check * FEATURES0 != 0xff (or FEATURES0[0] == 0) to make sure that the other bits * are valid.
*/ #define EC_ACPI_MEM_DEVICE_FEATURES0 0x0a #define EC_ACPI_MEM_DEVICE_FEATURES1 0x0b #define EC_ACPI_MEM_DEVICE_FEATURES2 0x0c #define EC_ACPI_MEM_DEVICE_FEATURES3 0x0d #define EC_ACPI_MEM_DEVICE_FEATURES4 0x0e #define EC_ACPI_MEM_DEVICE_FEATURES5 0x0f #define EC_ACPI_MEM_DEVICE_FEATURES6 0x10 #define EC_ACPI_MEM_DEVICE_FEATURES7 0x11
#define EC_ACPI_MEM_BATTERY_INDEX 0x12
/* * USB Port Power. Each bit indicates whether the corresponding USB ports' power * is enabled (1) or disabled (0). * bit 0 USB port ID 0 * ... * bit 7 USB port ID 7
*/ #define EC_ACPI_MEM_USB_PORT_POWER 0x13
/* * ACPI addresses 0x20 - 0xff map to EC_MEMMAP offset 0x00 - 0xdf. This data * is read-only from the AP. Added in EC_ACPI_MEM_VERSION 2.
*/ #define EC_ACPI_MEM_MAPPED_BEGIN 0x20 #define EC_ACPI_MEM_MAPPED_SIZE 0xe0
/* Current version of ACPI memory address space */ #define EC_ACPI_MEM_VERSION_CURRENT 2
/* * This header file is used in coreboot both in C and ACPI code. The ACPI code * is pre-processed to handle constants but the ASL compiler is unable to * handle actual C code so keep it separate.
*/
/* * Attributes for EC request and response packets. Just defining __packed * results in inefficient assembly code on ARM, if the structure is actually * 32-bit aligned, as it should be for all buffers. * * Be very careful when adding these to existing structures. They will round * up the structure size to the specified boundary. * * Also be very careful to make that if a structure is included in some other * parent structure that the alignment will still be true given the packing of * the parent structure. This is particularly important if the sub-structure * will be passed as a pointer to another function, since that function will * not know about the misaligment caused by the parent structure's packing. * * Also be very careful using __packed - particularly when nesting non-packed * structures inside packed ones. In fact, DO NOT use __packed directly; * always use one of these attributes. * * Once everything is annotated properly, the following search strings should * not return ANY matches in this file other than right here: * * "__packed" - generates inefficient code; all sub-structs must also be packed * * "struct [^_]" - all structs should be annotated, except for structs that are * members of other structs/unions (and their original declarations should be * annotated).
*/
/* * Packed structures make no assumption about alignment, so they do inefficient * byte-wise reads.
*/ #define __ec_align1 __packed #define __ec_align2 __packed #define __ec_align4 __packed #define __ec_align_size1 __packed #define __ec_align_offset1 __packed #define __ec_align_offset2 __packed #define __ec_todo_packed __packed #define __ec_todo_unpacked
/* LPC command status byte masks */ /* EC has written a byte in the data register and host hasn't read it yet */ #define EC_LPC_STATUS_TO_HOST 0x01 /* Host has written a command/data byte and the EC hasn't read it yet */ #define EC_LPC_STATUS_FROM_HOST 0x02 /* EC is processing a command */ #define EC_LPC_STATUS_PROCESSING 0x04 /* Last write to EC was a command, not data */ #define EC_LPC_STATUS_LAST_CMD 0x08 /* EC is in burst mode */ #define EC_LPC_STATUS_BURST_MODE 0x10 /* SCI event is pending (requesting SCI query) */ #define EC_LPC_STATUS_SCI_PENDING 0x20 /* SMI event is pending (requesting SMI query) */ #define EC_LPC_STATUS_SMI_PENDING 0x40 /* (reserved) */ #define EC_LPC_STATUS_RESERVED 0x80
/* * EC is busy. This covers both the EC processing a command, and the host has * written a new command but the EC hasn't picked it up yet.
*/ #define EC_LPC_STATUS_BUSY_MASK \
(EC_LPC_STATUS_FROM_HOST | EC_LPC_STATUS_PROCESSING)
/* * Host command response codes (16-bit). Note that response codes should be * stored in a uint16_t rather than directly in a value of this type.
*/ enum ec_status {
EC_RES_SUCCESS = 0,
EC_RES_INVALID_COMMAND = 1,
EC_RES_ERROR = 2,
EC_RES_INVALID_PARAM = 3,
EC_RES_ACCESS_DENIED = 4,
EC_RES_INVALID_RESPONSE = 5,
EC_RES_INVALID_VERSION = 6,
EC_RES_INVALID_CHECKSUM = 7,
EC_RES_IN_PROGRESS = 8, /* Accepted, command in progress */
EC_RES_UNAVAILABLE = 9, /* No response available */
EC_RES_TIMEOUT = 10, /* We got a timeout */
EC_RES_OVERFLOW = 11, /* Table / data overflow */
EC_RES_INVALID_HEADER = 12, /* Header contains invalid data */
EC_RES_REQUEST_TRUNCATED = 13, /* Didn't get the entire request */
EC_RES_RESPONSE_TOO_BIG = 14, /* Response was too big to handle */
EC_RES_BUS_ERROR = 15, /* Communications bus error */
EC_RES_BUSY = 16, /* Up but too busy. Should retry */
EC_RES_INVALID_HEADER_VERSION = 17, /* Header version invalid */
EC_RES_INVALID_HEADER_CRC = 18, /* Header CRC invalid */
EC_RES_INVALID_DATA_CRC = 19, /* Data CRC invalid */
EC_RES_DUP_UNAVAILABLE = 20, /* Can't resend response */
};
/* * Host event codes. Note these are 1-based, not 0-based, because ACPI query * EC command uses code 0 to mean "no event pending". We explicitly specify * each value in the enum listing so they won't change if we delete/insert an * item or rearrange the list (it needs to be stable across platforms, not * just within a single compiled instance).
*/ enum host_event_code {
EC_HOST_EVENT_LID_CLOSED = 1,
EC_HOST_EVENT_LID_OPEN = 2,
EC_HOST_EVENT_POWER_BUTTON = 3,
EC_HOST_EVENT_AC_CONNECTED = 4,
EC_HOST_EVENT_AC_DISCONNECTED = 5,
EC_HOST_EVENT_BATTERY_LOW = 6,
EC_HOST_EVENT_BATTERY_CRITICAL = 7,
EC_HOST_EVENT_BATTERY = 8,
EC_HOST_EVENT_THERMAL_THRESHOLD = 9, /* Event generated by a device attached to the EC */
EC_HOST_EVENT_DEVICE = 10,
EC_HOST_EVENT_THERMAL = 11,
EC_HOST_EVENT_USB_CHARGER = 12,
EC_HOST_EVENT_KEY_PRESSED = 13, /* * EC has finished initializing the host interface. The host can check * for this event following sending a EC_CMD_REBOOT_EC command to * determine when the EC is ready to accept subsequent commands.
*/
EC_HOST_EVENT_INTERFACE_READY = 14, /* Keyboard recovery combo has been pressed */
EC_HOST_EVENT_KEYBOARD_RECOVERY = 15,
/* Shutdown due to thermal overload */
EC_HOST_EVENT_THERMAL_SHUTDOWN = 16, /* Shutdown due to battery level too low */
EC_HOST_EVENT_BATTERY_SHUTDOWN = 17,
/* Suggest that the AP throttle itself */
EC_HOST_EVENT_THROTTLE_START = 18, /* Suggest that the AP resume normal speed */
EC_HOST_EVENT_THROTTLE_STOP = 19,
/* Hang detect logic detected a hang and host event timeout expired */
EC_HOST_EVENT_HANG_DETECT = 20, /* Hang detect logic detected a hang and warm rebooted the AP */
EC_HOST_EVENT_HANG_REBOOT = 21,
/* * The high bit of the event mask is not used as a host event code. If * it reads back as set, then the entire event mask should be * considered invalid by the host. This can happen when reading the * raw event status via EC_MEMMAP_HOST_EVENTS but the LPC interface is * not initialized on the EC, or improperly configured on the host.
*/
EC_HOST_EVENT_INVALID = 32
}; /* Host event mask */ #define EC_HOST_EVENT_MASK(event_code) BIT_ULL((event_code) - 1)
/** * struct ec_lpc_host_args - Arguments at EC_LPC_ADDR_HOST_ARGS * @flags: The host argument flags. * @command_version: Command version. * @data_size: The length of data. * @checksum: Checksum; sum of command + flags + command_version + data_size + * all params/response data bytes.
*/ struct ec_lpc_host_args {
uint8_t flags;
uint8_t command_version;
uint8_t data_size;
uint8_t checksum;
} __ec_align4;
/* Flags for ec_lpc_host_args.flags */ /* * Args are from host. Data area at EC_LPC_ADDR_HOST_PARAM contains command * params. * * If EC gets a command and this flag is not set, this is an old-style command. * Command version is 0 and params from host are at EC_LPC_ADDR_OLD_PARAM with * unknown length. EC must respond with an old-style response (that is, * without setting EC_HOST_ARGS_FLAG_TO_HOST).
*/ #define EC_HOST_ARGS_FLAG_FROM_HOST 0x01 /* * Args are from EC. Data area at EC_LPC_ADDR_HOST_PARAM contains response. * * If EC responds to a command and this flag is not set, this is an old-style * response. Command version is 0 and response data from EC is at * EC_LPC_ADDR_OLD_PARAM with unknown length.
*/ #define EC_HOST_ARGS_FLAG_TO_HOST 0x02
/*****************************************************************************/ /* * Byte codes returned by EC over SPI interface. * * These can be used by the AP to debug the EC interface, and to determine * when the EC is not in a state where it will ever get around to responding * to the AP. * * Example of sequence of bytes read from EC for a current good transfer: * 1. - - AP asserts chip select (CS#) * 2. EC_SPI_OLD_READY - AP sends first byte(s) of request * 3. - - EC starts handling CS# interrupt * 4. EC_SPI_RECEIVING - AP sends remaining byte(s) of request * 5. EC_SPI_PROCESSING - EC starts processing request; AP is clocking in * bytes looking for EC_SPI_FRAME_START * 6. - - EC finishes processing and sets up response * 7. EC_SPI_FRAME_START - AP reads frame byte * 8. (response packet) - AP reads response packet * 9. EC_SPI_PAST_END - Any additional bytes read by AP * 10 - - AP deasserts chip select * 11 - - EC processes CS# interrupt and sets up DMA for * next request * * If the AP is waiting for EC_SPI_FRAME_START and sees any value other than * the following byte values: * EC_SPI_OLD_READY * EC_SPI_RX_READY * EC_SPI_RECEIVING * EC_SPI_PROCESSING * * Then the EC found an error in the request, or was not ready for the request * and lost data. The AP should give up waiting for EC_SPI_FRAME_START, * because the EC is unable to tell when the AP is done sending its request.
*/
/* * Framing byte which precedes a response packet from the EC. After sending a * request, the AP will clock in bytes until it sees the framing byte, then * clock in the response packet.
*/ #define EC_SPI_FRAME_START 0xec
/* * Padding bytes which are clocked out after the end of a response packet.
*/ #define EC_SPI_PAST_END 0xed
/* * EC is ready to receive, and has ignored the byte sent by the AP. EC expects * that the AP will send a valid packet header (starting with * EC_COMMAND_PROTOCOL_3) in the next 32 bytes.
*/ #define EC_SPI_RX_READY 0xf8
/* * EC has started receiving the request from the AP, but hasn't started * processing it yet.
*/ #define EC_SPI_RECEIVING 0xf9
/* EC has received the entire request from the AP and is processing it. */ #define EC_SPI_PROCESSING 0xfa
/* * EC received bad data from the AP, such as a packet header with an invalid * length. EC will ignore all data until chip select deasserts.
*/ #define EC_SPI_RX_BAD_DATA 0xfb
/* * EC received data from the AP before it was ready. That is, the AP asserted * chip select and started clocking data before the EC was ready to receive it. * EC will ignore all data until chip select deasserts.
*/ #define EC_SPI_NOT_READY 0xfc
/* * EC was ready to receive a request from the AP. EC has treated the byte sent * by the AP as part of a request packet, or (for old-style ECs) is processing * a fully received packet but is not ready to respond yet.
*/ #define EC_SPI_OLD_READY 0xfd
/* * Protocol version 2 for I2C and SPI send a request this way: * * 0 EC_CMD_VERSION0 + (command version) * 1 Command number * 2 Length of params = N * 3..N+2 Params, if any * N+3 8-bit checksum of bytes 0..N+2 * * The corresponding response is: * * 0 Result code (EC_RES_*) * 1 Length of params = M * 2..M+1 Params, if any * M+2 8-bit checksum of bytes 0..M+1
*/ #define EC_PROTO2_REQUEST_HEADER_BYTES 3 #define EC_PROTO2_REQUEST_TRAILER_BYTES 1 #define EC_PROTO2_REQUEST_OVERHEAD (EC_PROTO2_REQUEST_HEADER_BYTES + \
EC_PROTO2_REQUEST_TRAILER_BYTES)
/* * Value written to legacy command port / prefix byte to indicate protocol * 3+ structs are being used. Usage is bus-dependent.
*/ #define EC_COMMAND_PROTOCOL_3 0xda
#define EC_HOST_REQUEST_VERSION 3
/** * struct ec_host_request - Version 3 request from host. * @struct_version: Should be 3. The EC will return EC_RES_INVALID_HEADER if it * receives a header with a version it doesn't know how to * parse. * @checksum: Checksum of request and data; sum of all bytes including checksum * should total to 0. * @command: Command to send (EC_CMD_...) * @command_version: Command version. * @reserved: Unused byte in current protocol version; set to 0. * @data_len: Length of data which follows this header.
*/ struct ec_host_request {
uint8_t struct_version;
uint8_t checksum;
uint16_t command;
uint8_t command_version;
uint8_t reserved;
uint16_t data_len;
} __ec_align4;
#define EC_HOST_RESPONSE_VERSION 3
/** * struct ec_host_response - Version 3 response from EC. * @struct_version: Struct version (=3). * @checksum: Checksum of response and data; sum of all bytes including * checksum should total to 0. * @result: EC's response to the command (separate from communication failure) * @data_len: Length of data which follows this header. * @reserved: Unused bytes in current protocol version; set to 0.
*/ struct ec_host_response {
uint8_t struct_version;
uint8_t checksum;
uint16_t result;
uint16_t data_len;
uint16_t reserved;
} __ec_align4;
/* * Host command protocol V4. * * Packets always start with a request or response header. They are followed * by data_len bytes of data. If the data_crc_present flag is set, the data * bytes are followed by a CRC-8 of that data, using x^8 + x^2 + x + 1 * polynomial. * * Host algorithm when sending a request q: * * 101) tries_left=(some value, e.g. 3); * 102) q.seq_num++ * 103) q.seq_dup=0 * 104) Calculate q.header_crc. * 105) Send request q to EC. * 106) Wait for response r. Go to 201 if received or 301 if timeout. * * 201) If r.struct_version != 4, go to 301. * 202) If r.header_crc mismatches calculated CRC for r header, go to 301. * 203) If r.data_crc_present and r.data_crc mismatches, go to 301. * 204) If r.seq_num != q.seq_num, go to 301. * 205) If r.seq_dup == q.seq_dup, return success. * 207) If r.seq_dup == 1, go to 301. * 208) Return error. * * 301) If --tries_left <= 0, return error. * 302) If q.seq_dup == 1, go to 105. * 303) q.seq_dup = 1 * 304) Go to 104. * * EC algorithm when receiving a request q. * EC has response buffer r, error buffer e. * * 101) If q.struct_version != 4, set e.result = EC_RES_INVALID_HEADER_VERSION * and go to 301 * 102) If q.header_crc mismatches calculated CRC, set e.result = * EC_RES_INVALID_HEADER_CRC and go to 301 * 103) If q.data_crc_present, calculate data CRC. If that mismatches the CRC * byte at the end of the packet, set e.result = EC_RES_INVALID_DATA_CRC * and go to 301. * 104) If q.seq_dup == 0, go to 201. * 105) If q.seq_num != r.seq_num, go to 201. * 106) If q.seq_dup == r.seq_dup, go to 205, else go to 203. * * 201) Process request q into response r. * 202) r.seq_num = q.seq_num * 203) r.seq_dup = q.seq_dup * 204) Calculate r.header_crc * 205) If r.data_len > 0 and data is no longer available, set e.result = * EC_RES_DUP_UNAVAILABLE and go to 301. * 206) Send response r. * * 301) e.seq_num = q.seq_num * 302) e.seq_dup = q.seq_dup * 303) Calculate e.header_crc. * 304) Send error response e.
*/
/* Version 4 request from host */ struct ec_host_request4 { /* * bits 0-3: struct_version: Structure version (=4) * bit 4: is_response: Is response (=0) * bits 5-6: seq_num: Sequence number * bit 7: seq_dup: Sequence duplicate flag
*/
uint8_t fields0;
/* * bits 0-4: command_version: Command version * bits 5-6: Reserved (set 0, ignore on read) * bit 7: data_crc_present: Is data CRC present after data
*/
uint8_t fields1;
/* Command code (EC_CMD_*) */
uint16_t command;
/* Length of data which follows this header (not including data CRC) */
uint16_t data_len;
/* Reserved (set 0, ignore on read) */
uint8_t reserved;
/* CRC-8 of above fields, using x^8 + x^2 + x + 1 polynomial */
uint8_t header_crc;
} __ec_align4;
/* Version 4 response from EC */ struct ec_host_response4 { /* * bits 0-3: struct_version: Structure version (=4) * bit 4: is_response: Is response (=1) * bits 5-6: seq_num: Sequence number * bit 7: seq_dup: Sequence duplicate flag
*/
uint8_t fields0;
/* * bits 0-6: Reserved (set 0, ignore on read) * bit 7: data_crc_present: Is data CRC present after data
*/
uint8_t fields1;
/* Result code (EC_RES_*) */
uint16_t result;
/* Length of data which follows this header (not including data CRC) */
uint16_t data_len;
/* Reserved (set 0, ignore on read) */
uint8_t reserved;
/* CRC-8 of above fields, using x^8 + x^2 + x + 1 polynomial */
uint8_t header_crc;
} __ec_align4;
/*****************************************************************************/ /* * Notes on commands: * * Each command is an 16-bit command value. Commands which take params or * return response data specify structures for that data. If no structure is * specified, the command does not input or output data, respectively. * Parameter/response length is implicit in the structs. Some underlying * communication protocols (I2C, SPI) may add length or checksum headers, but * those are implementation-dependent and not defined here. * * All commands MUST be #defined to be 4-digit UPPER CASE hex values * (e.g., 0x00AB, not 0xab) for CONFIG_HOSTCMD_SECTION_SORTED to work.
*/
/*****************************************************************************/ /* General / test commands */
/* * Get protocol version, used to deal with non-backward compatible protocol * changes.
*/ #define EC_CMD_PROTO_VERSION 0x0000
/** * struct ec_response_proto_version - Response to the proto version command. * @version: The protocol version.
*/ struct ec_response_proto_version {
uint32_t version;
} __ec_align4;
/* * Hello. This is a simple command to test the EC is responsive to * commands.
*/ #define EC_CMD_HELLO 0x0001
/** * struct ec_response_get_version - Response to the get version command. * @version_string_ro: Null-terminated RO firmware version string. * @version_string_rw: Null-terminated RW firmware version string. * @reserved: Unused bytes; was previously RW-B firmware version string. * @current_image: One of ec_current_image.
*/ struct ec_response_get_version { char version_string_ro[32]; char version_string_rw[32]; char reserved[32];
uint32_t current_image;
} __ec_align4;
/* Read test */ #define EC_CMD_READ_TEST 0x0003
/** * struct ec_params_read_test - Parameters for the read test command. * @offset: Starting value for read buffer. * @size: Size to read in bytes.
*/ struct ec_params_read_test {
uint32_t offset;
uint32_t size;
} __ec_align4;
/** * struct ec_response_read_test - Response to the read test command. * @data: Data returned by the read test command.
*/ struct ec_response_read_test {
uint32_t data[32];
} __ec_align4;
/* * Get build information * * Response is null-terminated string.
*/ #define EC_CMD_GET_BUILD_INFO 0x0004
/* Get chip info */ #define EC_CMD_GET_CHIP_INFO 0x0005
/** * struct ec_response_get_chip_info - Response to the get chip info command. * @vendor: Null-terminated string for chip vendor. * @name: Null-terminated string for chip name. * @revision: Null-terminated string for chip mask version.
*/ struct ec_response_get_chip_info { char vendor[32]; char name[32]; char revision[32];
} __ec_align4;
/* Get board HW version */ #define EC_CMD_GET_BOARD_VERSION 0x0006
/** * struct ec_response_board_version - Response to the board version command. * @board_version: A monotonously incrementing number.
*/ struct ec_response_board_version {
uint16_t board_version;
} __ec_align2;
/* * Read memory-mapped data. * * This is an alternate interface to memory-mapped data for bus protocols * which don't support direct-mapped memory - I2C, SPI, etc. * * Response is params.size bytes of data.
*/ #define EC_CMD_READ_MEMMAP 0x0007
/** * struct ec_params_read_memmap - Parameters for the read memory map command. * @offset: Offset in memmap (EC_MEMMAP_*). * @size: Size to read in bytes.
*/ struct ec_params_read_memmap {
uint8_t offset;
uint8_t size;
} __ec_align1;
/* Read versions supported for a command */ #define EC_CMD_GET_CMD_VERSIONS 0x0008
/** * struct ec_params_get_cmd_versions - Parameters for the get command versions. * @cmd: Command to check.
*/ struct ec_params_get_cmd_versions {
uint8_t cmd;
} __ec_align1;
/** * struct ec_params_get_cmd_versions_v1 - Parameters for the get command * versions (v1) * @cmd: Command to check.
*/ struct ec_params_get_cmd_versions_v1 {
uint16_t cmd;
} __ec_align2;
/** * struct ec_response_get_cmd_versions - Response to the get command versions. * @version_mask: Mask of supported versions; use EC_VER_MASK() to compare with * a desired version.
*/ struct ec_response_get_cmd_versions {
uint32_t version_mask;
} __ec_align4;
/* * Check EC communications status (busy). This is needed on i2c/spi but not * on lpc since it has its own out-of-band busy indicator. * * lpc must read the status from the command register. Attempting this on * lpc will overwrite the args/parameter space and corrupt its data.
*/ #define EC_CMD_GET_COMMS_STATUS 0x0009
/* Avoid using ec_status which is for return values */ enum ec_comms_status {
EC_COMMS_STATUS_PROCESSING = BIT(0), /* Processing cmd */
};
/** * struct ec_response_get_comms_status - Response to the get comms status * command. * @flags: Mask of enum ec_comms_status.
*/ struct ec_response_get_comms_status {
uint32_t flags; /* Mask of enum ec_comms_status */
} __ec_align4;
/* Fake a variety of responses, purely for testing purposes. */ #define EC_CMD_TEST_PROTOCOL 0x000A
/* Tell the EC what to send back to us. */ struct ec_params_test_protocol {
uint32_t ec_result;
uint32_t ret_len;
uint8_t buf[32];
} __ec_align4;
/* Here it comes... */ struct ec_response_test_protocol {
uint8_t buf[32];
} __ec_align4;
/* Get protocol information */ #define EC_CMD_GET_PROTOCOL_INFO 0x000B
/* Flags for ec_response_get_protocol_info.flags */ /* EC_RES_IN_PROGRESS may be returned if a command is slow */ #define EC_PROTOCOL_INFO_IN_PROGRESS_SUPPORTED BIT(0)
/** * struct ec_response_get_protocol_info - Response to the get protocol info. * @protocol_versions: Bitmask of protocol versions supported (1 << n means * version n). * @max_request_packet_size: Maximum request packet size in bytes. * @max_response_packet_size: Maximum response packet size in bytes. * @flags: see EC_PROTOCOL_INFO_*
*/ struct ec_response_get_protocol_info { /* Fields which exist if at least protocol version 3 supported */
uint32_t protocol_versions;
uint16_t max_request_packet_size;
uint16_t max_response_packet_size;
uint32_t flags;
} __ec_align4;
/* The upper byte of .flags tells what to do (nothing means "get") */ #define EC_GSV_SET 0x80000000
/* * The lower three bytes of .flags identifies the parameter, if that has * meaning for an individual command.
*/ #define EC_GSV_PARAM_MASK 0x00ffffff
/* More than one command can use these structs to get/set parameters. */ #define EC_CMD_GSV_PAUSE_IN_S5 0x000C
/*****************************************************************************/ /* List the features supported by the firmware */ #define EC_CMD_GET_FEATURES 0x000D
/* Supported features */ enum ec_feature_code { /* * This image contains a limited set of features. Another image * in RW partition may support more features.
*/
EC_FEATURE_LIMITED = 0, /* * Commands for probing/reading/writing/erasing the flash in the * EC are present.
*/
EC_FEATURE_FLASH = 1, /* * Can control the fan speed directly.
*/
EC_FEATURE_PWM_FAN = 2, /* * Can control the intensity of the keyboard backlight.
*/
EC_FEATURE_PWM_KEYB = 3, /* * Support Google lightbar, introduced on Pixel.
*/
EC_FEATURE_LIGHTBAR = 4, /* Control of LEDs */
EC_FEATURE_LED = 5, /* Exposes an interface to control gyro and sensors. * The host goes through the EC to access these sensors. * In addition, the EC may provide composite sensors, like lid angle.
*/
EC_FEATURE_MOTION_SENSE = 6, /* The keyboard is controlled by the EC */
EC_FEATURE_KEYB = 7, /* The AP can use part of the EC flash as persistent storage. */
EC_FEATURE_PSTORE = 8, /* The EC monitors BIOS port 80h, and can return POST codes. */
EC_FEATURE_PORT80 = 9, /* * Thermal management: include TMP specific commands. * Higher level than direct fan control.
*/
EC_FEATURE_THERMAL = 10, /* Can switch the screen backlight on/off */
EC_FEATURE_BKLIGHT_SWITCH = 11, /* Can switch the wifi module on/off */
EC_FEATURE_WIFI_SWITCH = 12, /* Monitor host events, through for example SMI or SCI */
EC_FEATURE_HOST_EVENTS = 13, /* The EC exposes GPIO commands to control/monitor connected devices. */
EC_FEATURE_GPIO = 14, /* The EC can send i2c messages to downstream devices. */
EC_FEATURE_I2C = 15, /* Command to control charger are included */
EC_FEATURE_CHARGER = 16, /* Simple battery support. */
EC_FEATURE_BATTERY = 17, /* * Support Smart battery protocol * (Common Smart Battery System Interface Specification)
*/
EC_FEATURE_SMART_BATTERY = 18, /* EC can detect when the host hangs. */
EC_FEATURE_HANG_DETECT = 19, /* Report power information, for pit only */
EC_FEATURE_PMU = 20, /* Another Cros EC device is present downstream of this one */
EC_FEATURE_SUB_MCU = 21, /* Support USB Power delivery (PD) commands */
EC_FEATURE_USB_PD = 22, /* Control USB multiplexer, for audio through USB port for instance. */
EC_FEATURE_USB_MUX = 23, /* Motion Sensor code has an internal software FIFO */
EC_FEATURE_MOTION_SENSE_FIFO = 24, /* Support temporary secure vstore */
EC_FEATURE_VSTORE = 25, /* EC decides on USB-C SS mux state, muxes configured by host */
EC_FEATURE_USBC_SS_MUX_VIRTUAL = 26, /* EC has RTC feature that can be controlled by host commands */
EC_FEATURE_RTC = 27, /* The MCU exposes a Fingerprint sensor */
EC_FEATURE_FINGERPRINT = 28, /* The MCU exposes a Touchpad */
EC_FEATURE_TOUCHPAD = 29, /* The MCU has RWSIG task enabled */
EC_FEATURE_RWSIG = 30, /* EC has device events support */
EC_FEATURE_DEVICE_EVENT = 31, /* EC supports the unified wake masks for LPC/eSPI systems */
EC_FEATURE_UNIFIED_WAKE_MASKS = 32, /* EC supports 64-bit host events */
EC_FEATURE_HOST_EVENT64 = 33, /* EC runs code in RAM (not in place, a.k.a. XIP) */
EC_FEATURE_EXEC_IN_RAM = 34, /* EC supports CEC commands */
EC_FEATURE_CEC = 35, /* EC supports tight sensor timestamping. */
EC_FEATURE_MOTION_SENSE_TIGHT_TIMESTAMPS = 36, /* * EC supports tablet mode detection aligned to Chrome and allows * setting of threshold by host command using * MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE.
*/
EC_FEATURE_REFINED_TABLET_MODE_HYSTERESIS = 37, /* The MCU is a System Companion Processor (SCP). */
EC_FEATURE_SCP = 39, /* The MCU is an Integrated Sensor Hub */
EC_FEATURE_ISH = 40, /* New TCPMv2 TYPEC_ prefaced commands supported */
EC_FEATURE_TYPEC_CMD = 41, /* * The EC will wait for direction from the AP to enter Type-C alternate * modes or USB4.
*/
EC_FEATURE_TYPEC_REQUIRE_AP_MODE_ENTRY = 42, /* * The EC will wait for an acknowledge from the AP after setting the * mux.
*/
EC_FEATURE_TYPEC_MUX_REQUIRE_AP_ACK = 43, /* * The EC supports entering and residing in S4.
*/
EC_FEATURE_S4_RESIDENCY = 44, /* * The EC supports the AP directing mux sets for the board.
*/
EC_FEATURE_TYPEC_AP_MUX_SET = 45, /* * The EC supports the AP composing VDMs for us to send.
*/
EC_FEATURE_TYPEC_AP_VDM_SEND = 46, /* * The EC supports system safe mode panic recovery.
*/
EC_FEATURE_SYSTEM_SAFE_MODE = 47, /* * The EC will reboot on runtime assertion failures.
*/
EC_FEATURE_ASSERT_REBOOTS = 48, /* * The EC image is built with tokenized logging enabled.
*/
EC_FEATURE_TOKENIZED_LOGGING = 49, /* * The EC supports triggering an STB dump.
*/
EC_FEATURE_AMD_STB_DUMP = 50, /* * The EC supports memory dump commands.
*/
EC_FEATURE_MEMORY_DUMP = 51, /* * The EC supports DP2.1 capability
*/
EC_FEATURE_TYPEC_DP2_1 = 52, /* * The MCU is System Companion Processor Core 1
*/
EC_FEATURE_SCP_C1 = 53, /* * The EC supports UCSI PPM.
*/
EC_FEATURE_UCSI_PPM = 54,
};
/* Get flash info */ #define EC_CMD_FLASH_INFO 0x0010 #define EC_VER_FLASH_INFO 2
/** * struct ec_response_flash_info - Response to the flash info command. * @flash_size: Usable flash size in bytes. * @write_block_size: Write block size. Write offset and size must be a * multiple of this. * @erase_block_size: Erase block size. Erase offset and size must be a * multiple of this. * @protect_block_size: Protection block size. Protection offset and size * must be a multiple of this. * * Version 0 returns these fields.
*/ struct ec_response_flash_info {
uint32_t flash_size;
uint32_t write_block_size;
uint32_t erase_block_size;
uint32_t protect_block_size;
} __ec_align4;
/* * Flags for version 1+ flash info command * EC flash erases bits to 0 instead of 1.
*/ #define EC_FLASH_INFO_ERASE_TO_0 BIT(0)
/* * Flash must be selected for read/write/erase operations to succeed. This may * be necessary on a chip where write/erase can be corrupted by other board * activity, or where the chip needs to enable some sort of programming voltage, * or where the read/write/erase operations require cleanly suspending other * chip functionality.
*/ #define EC_FLASH_INFO_SELECT_REQUIRED BIT(1)
/** * struct ec_response_flash_info_1 - Response to the flash info v1 command. * @flash_size: Usable flash size in bytes. * @write_block_size: Write block size. Write offset and size must be a * multiple of this. * @erase_block_size: Erase block size. Erase offset and size must be a * multiple of this. * @protect_block_size: Protection block size. Protection offset and size * must be a multiple of this. * @write_ideal_size: Ideal write size in bytes. Writes will be fastest if * size is exactly this and offset is a multiple of this. * For example, an EC may have a write buffer which can do * half-page operations if data is aligned, and a slower * word-at-a-time write mode. * @flags: Flags; see EC_FLASH_INFO_* * * Version 1 returns the same initial fields as version 0, with additional * fields following. * * gcc anonymous structs don't seem to get along with the __packed directive; * if they did we'd define the version 0 structure as a sub-structure of this * one. * * Version 2 supports flash banks of different sizes: * The caller specified the number of banks it has preallocated * (num_banks_desc) * The EC returns the number of banks describing the flash memory. * It adds banks descriptions up to num_banks_desc.
*/ struct ec_response_flash_info_1 { /* Version 0 fields; see above for description */
uint32_t flash_size;
uint32_t write_block_size;
uint32_t erase_block_size;
uint32_t protect_block_size;
/* Version 1 adds these fields: */
uint32_t write_ideal_size;
uint32_t flags;
} __ec_align4;
struct ec_params_flash_info_2 { /* Number of banks to describe */
uint16_t num_banks_desc; /* Reserved; set 0; ignore on read */
uint8_t reserved[2];
} __ec_align4;
struct ec_flash_bank { /* Number of sector is in this bank. */
uint16_t count; /* Size in power of 2 of each sector (8 --> 256 bytes) */
uint8_t size_exp; /* Minimal write size for the sectors in this bank */
uint8_t write_size_exp; /* Erase size for the sectors in this bank */
uint8_t erase_size_exp; /* Size for write protection, usually identical to erase size. */
uint8_t protect_size_exp; /* Reserved; set 0; ignore on read */
uint8_t reserved[2];
};
struct ec_response_flash_info_2 { /* Total flash in the EC. */
uint32_t flash_size; /* Flags; see EC_FLASH_INFO_* */
uint32_t flags; /* Maximum size to use to send data to write to the EC. */
uint32_t write_ideal_size; /* Number of banks present in the EC. */
uint16_t num_banks_total; /* Number of banks described in banks array. */
uint16_t num_banks_desc; struct ec_flash_bank banks[];
} __ec_align4;
/* * Read flash * * Response is params.size bytes of data.
*/ #define EC_CMD_FLASH_READ 0x0011
/** * struct ec_params_flash_read - Parameters for the flash read command. * @offset: Byte offset to read. * @size: Size to read in bytes.
*/ struct ec_params_flash_read {
uint32_t offset;
uint32_t size;
} __ec_align4;
/* Version 0 of the flash command supported only 64 bytes of data */ #define EC_FLASH_WRITE_VER0_SIZE 64
/** * struct ec_params_flash_write - Parameters for the flash write command. * @offset: Byte offset to write. * @size: Size to write in bytes.
*/ struct ec_params_flash_write {
uint32_t offset;
uint32_t size; /* Followed by data to write */
} __ec_align4;
/** * struct ec_params_flash_erase - Parameters for the flash erase command, v0. * @offset: Byte offset to erase. * @size: Size to erase in bytes.
*/ struct ec_params_flash_erase {
uint32_t offset;
uint32_t size;
} __ec_align4;
/* * v1 add async erase: * subcommands can returns: * EC_RES_SUCCESS : erased (see ERASE_SECTOR_ASYNC case below). * EC_RES_INVALID_PARAM : offset/size are not aligned on a erase boundary. * EC_RES_ERROR : other errors. * EC_RES_BUSY : an existing erase operation is in progress. * EC_RES_ACCESS_DENIED: Trying to erase running image. * * When ERASE_SECTOR_ASYNC returns EC_RES_SUCCESS, the operation is just * properly queued. The user must call ERASE_GET_RESULT subcommand to get * the proper result. * When ERASE_GET_RESULT returns EC_RES_BUSY, the caller must wait and send * ERASE_GET_RESULT again to get the result of ERASE_SECTOR_ASYNC. * ERASE_GET_RESULT command may timeout on EC where flash access is not * permitted while erasing. (For instance, STM32F4).
*/ enum ec_flash_erase_cmd {
FLASH_ERASE_SECTOR, /* Erase and wait for result */
FLASH_ERASE_SECTOR_ASYNC, /* Erase and return immediately. */
FLASH_ERASE_GET_RESULT, /* Ask for last erase result */
};
/** * struct ec_params_flash_erase_v1 - Parameters for the flash erase command, v1. * @cmd: One of ec_flash_erase_cmd. * @reserved: Pad byte; currently always contains 0. * @flag: No flags defined yet; set to 0. * @params: Same as v0 parameters.
*/ struct ec_params_flash_erase_v1 {
uint8_t cmd;
uint8_t reserved;
uint16_t flag; struct ec_params_flash_erase params;
} __ec_align4;
/* * Get/set flash protection. * * If mask!=0, sets/clear the requested bits of flags. Depending on the * firmware write protect GPIO, not all flags will take effect immediately; * some flags require a subsequent hard reset to take effect. Check the * returned flags bits to see what actually happened. * * If mask=0, simply returns the current flags state.
*/ #define EC_CMD_FLASH_PROTECT 0x0015 #define EC_VER_FLASH_PROTECT 1 /* Command version 1 */
/* Flags for flash protection */ /* RO flash code protected when the EC boots */ #define EC_FLASH_PROTECT_RO_AT_BOOT BIT(0) /* * RO flash code protected now. If this bit is set, at-boot status cannot * be changed.
*/ #define EC_FLASH_PROTECT_RO_NOW BIT(1) /* Entire flash code protected now, until reboot. */ #define EC_FLASH_PROTECT_ALL_NOW BIT(2) /* Flash write protect GPIO is asserted now */ #define EC_FLASH_PROTECT_GPIO_ASSERTED BIT(3) /* Error - at least one bank of flash is stuck locked, and cannot be unlocked */ #define EC_FLASH_PROTECT_ERROR_STUCK BIT(4) /* * Error - flash protection is in inconsistent state. At least one bank of * flash which should be protected is not protected. Usually fixed by * re-requesting the desired flags, or by a hard reset if that fails.
*/ #define EC_FLASH_PROTECT_ERROR_INCONSISTENT BIT(5) /* Entire flash code protected when the EC boots */ #define EC_FLASH_PROTECT_ALL_AT_BOOT BIT(6) /* RW flash code protected when the EC boots */ #define EC_FLASH_PROTECT_RW_AT_BOOT BIT(7) /* RW flash code protected now. */ #define EC_FLASH_PROTECT_RW_NOW BIT(8) /* Rollback information flash region protected when the EC boots */ #define EC_FLASH_PROTECT_ROLLBACK_AT_BOOT BIT(9) /* Rollback information flash region protected now */ #define EC_FLASH_PROTECT_ROLLBACK_NOW BIT(10)
/** * struct ec_params_flash_protect - Parameters for the flash protect command. * @mask: Bits in flags to apply. * @flags: New flags to apply.
*/ struct ec_params_flash_protect {
uint32_t mask;
uint32_t flags;
} __ec_align4;
/** * struct ec_response_flash_protect - Response to the flash protect command. * @flags: Current value of flash protect flags. * @valid_flags: Flags which are valid on this platform. This allows the * caller to distinguish between flags which aren't set vs. flags * which can't be set on this platform. * @writable_flags: Flags which can be changed given the current protection * state.
*/ struct ec_response_flash_protect {
uint32_t flags;
uint32_t valid_flags;
uint32_t writable_flags;
} __ec_align4;
/* * Note: commands 0x14 - 0x19 version 0 were old commands to get/set flash * write protect. These commands may be reused with version > 0.
*/
/* Get the region offset/size */ #define EC_CMD_FLASH_REGION_INFO 0x0016 #define EC_VER_FLASH_REGION_INFO 1
enum ec_flash_region { /* Region which holds read-only EC image */
EC_FLASH_REGION_RO = 0, /* * Region which holds active RW image. 'Active' is different from * 'running'. Active means 'scheduled-to-run'. Since RO image always * scheduled to run, active/non-active applies only to RW images (for * the same reason 'update' applies only to RW images. It's a state of * an image on a flash. Running image can be RO, RW_A, RW_B but active * image can only be RW_A or RW_B. In recovery mode, an active RW image * doesn't enter 'running' state but it's still active on a flash.
*/
EC_FLASH_REGION_ACTIVE, /* * Region which should be write-protected in the factory (a superset of * EC_FLASH_REGION_RO)
*/
EC_FLASH_REGION_WP_RO, /* Region which holds updatable (non-active) RW image */
EC_FLASH_REGION_UPDATE, /* Number of regions */
EC_FLASH_REGION_COUNT,
}; /* * 'RW' is vague if there are multiple RW images; we mean the active one, * so the old constant is deprecated.
*/ #define EC_FLASH_REGION_RW EC_FLASH_REGION_ACTIVE
/** * struct ec_params_flash_region_info - Parameters for the flash region info * command. * @region: Flash region; see EC_FLASH_REGION_*
*/ struct ec_params_flash_region_info {
uint32_t region;
} __ec_align4;
/*****************************************************************************/ /* * Lightbar commands. This looks worse than it is. Since we only use one HOST * command to say "talk to the lightbar", we put the "and tell it to do X" part * into a subcommand. We'll make separate structs for subcommands with * different input args, so that we know how much to expect.
*/ #define EC_CMD_LIGHTBAR_CMD 0x0028
/* * List of tweakable parameters. NOTE: It's __packed so it can be sent in a * host command, but the alignment is the same regardless. Keep it that way.
*/ struct lightbar_params_v0 { /* Timing */
int32_t google_ramp_up;
int32_t google_ramp_down;
int32_t s3s0_ramp_up;
int32_t s0_tick_delay[2]; /* AC=0/1 */
int32_t s0a_tick_delay[2]; /* AC=0/1 */
int32_t s0s3_ramp_down;
int32_t s3_sleep_for;
int32_t s3_ramp_up;
int32_t s3_ramp_down;
/* Map [AC][battery_level] to color index */
uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */
uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */
/* Color palette */ struct rgb_s color[8]; /* 0-3 are Google colors */
} __ec_todo_packed;
/* Map [AC][battery_level] to color index */
uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */
uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */
/* s5: single color pulse on inhibited power-up */
uint8_t s5_idx;
/* Color palette */ struct rgb_s color[8]; /* 0-3 are Google colors */
} __ec_todo_packed;
/* Lightbar command params v2 * crbug.com/467716 * * lightbar_parms_v1 was too big for i2c, therefore in v2, we split them up by * logical groups to make it more manageable ( < 120 bytes). * * NOTE: Each of these groups must be less than 120 bytes.
*/
struct lightbar_params_v2_colors { /* Map [AC][battery_level] to color index */
uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */
uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */
/* s5: single color pulse on inhibited power-up */
uint8_t s5_idx;
/* Color palette */ struct rgb_s color[8]; /* 0-3 are Google colors */
} __ec_todo_packed;
struct ec_params_lightbar {
uint8_t cmd; /* Command (see enum lightbar_command) */ union { /* * The following commands have no args: *
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