// SPDX-License-Identifier: GPL-2.0-only // // Cirrus Logic Madera class codecs common support // // Copyright (C) 2015-2019 Cirrus Logic, Inc. and // Cirrus Logic International Semiconductor Ltd. //
/* Skip this if the chip is down */ if (pm_runtime_suspended(madera->dev)) return;
/* * Just read a register a few times to ensure the internal * oscillator sends out a few clocks.
*/ for (i = 0; i < 4; i++) {
ret = regmap_read(madera->regmap, MADERA_SOFTWARE_RESET, &val); if (ret)
dev_err(madera->dev, "Failed to read sysclk spin %d: %d\n", i, ret);
}
udelay(300);
}
int madera_sysclk_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event)
{ struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); struct madera_priv *priv = snd_soc_component_get_drvdata(component);
switch (event) { case SND_SOC_DAPM_POST_PMU: case SND_SOC_DAPM_PRE_PMD:
madera_spin_sysclk(priv); break; default: break;
}
ret = madera_check_speaker_overheat(madera, &warn, &shutdown); if (ret || shutdown) { /* for safety attempt to shutdown on error */
dev_crit(madera->dev, "Thermal shutdown\n");
ret = regmap_update_bits(madera->regmap,
MADERA_OUTPUT_ENABLES_1,
MADERA_OUT4L_ENA |
MADERA_OUT4R_ENA, 0); if (ret != 0)
dev_crit(madera->dev, "Failed to disable speaker outputs: %d\n",
ret);
} elseif (warn) {
dev_alert(madera->dev, "Thermal warning\n");
} else {
dev_info(madera->dev, "Spurious thermal warning\n"); return IRQ_NONE;
}
return IRQ_HANDLED;
}
int madera_init_overheat(struct madera_priv *priv)
{ struct madera *madera = priv->madera; struct device *dev = madera->dev; int ret;
ret = madera_request_irq(madera, MADERA_IRQ_SPK_OVERHEAT_WARN, "Thermal warning", madera_thermal_warn,
madera); if (ret)
dev_err(dev, "Failed to get thermal warning IRQ: %d\n", ret);
ret = madera_request_irq(madera, MADERA_IRQ_SPK_OVERHEAT, "Thermal shutdown", madera_thermal_warn,
madera); if (ret)
dev_err(dev, "Failed to get thermal shutdown IRQ: %d\n", ret);
staticvoid madera_prop_get_pdata(struct madera_priv *priv)
{ struct madera *madera = priv->madera; struct madera_codec_pdata *pdata = &madera->pdata.codec;
u32 out_mono[ARRAY_SIZE(pdata->out_mono)]; int i, n;
madera_prop_get_inmode(priv);
n = madera_get_variable_u32_array(madera->dev, "cirrus,out-mono",
out_mono, ARRAY_SIZE(out_mono), 1); if (n > 0) for (i = 0; i < n; ++i)
pdata->out_mono[i] = !!out_mono[i];
/* * We can't rely on the DAPM mutex for locking because we need a lock * that can safely be called in hw_params
*/
mutex_lock(&priv->rate_lock);
switch (event) { case SND_SOC_DAPM_PRE_PMU:
dev_dbg(priv->madera->dev, "Inc ref on domain group %d\n",
dom_grp);
++priv->domain_group_ref[dom_grp]; break; case SND_SOC_DAPM_POST_PMD:
dev_dbg(priv->madera->dev, "Dec ref on domain group %d\n",
dom_grp);
--priv->domain_group_ref[dom_grp]; break; default: break;
}
if (ucontrol->value.enumerated.item[0] > e->items - 1) return -EINVAL;
mux = ucontrol->value.enumerated.item[0];
snd_soc_dapm_mutex_lock(dapm);
ep_sel = mux << MADERA_EP_SEL_SHIFT;
change = snd_soc_component_test_bits(component, MADERA_OUTPUT_ENABLES_1,
MADERA_EP_SEL_MASK,
ep_sel); if (!change) goto end;
/* EP_SEL should not be modified while HP or EP driver is enabled */
ret = regmap_update_bits(madera->regmap, MADERA_OUTPUT_ENABLES_1,
MADERA_OUT1L_ENA | MADERA_OUT1R_ENA, 0); if (ret)
dev_warn(madera->dev, "Failed to disable outputs: %d\n", ret);
usleep_range(2000, 3000); /* wait for wseq to complete */
/* change demux setting */
ret = 0; if (madera->out_clamp[0])
ret = regmap_update_bits(madera->regmap,
MADERA_OUTPUT_ENABLES_1,
MADERA_EP_SEL_MASK, ep_sel); if (ret) {
dev_err(madera->dev, "Failed to set OUT1 demux: %d\n", ret);
} else { /* apply correct setting for mono mode */ if (!ep_sel && !madera->pdata.codec.out_mono[0])
out_mono = false; /* stereo HP */ else
out_mono = true; /* EP or mono HP */
ret = madera_set_output_mode(component, 1, out_mono); if (ret)
dev_warn(madera->dev, "Failed to set output mode: %d\n", ret);
}
/* * if HPDET has disabled the clamp while switching to HPOUT * OUT1 should remain disabled
*/ if (ep_sel ||
(madera->out_clamp[0] && !madera->out_shorted[0])) {
ret = regmap_update_bits(madera->regmap,
MADERA_OUTPUT_ENABLES_1,
MADERA_OUT1L_ENA | MADERA_OUT1R_ENA,
madera->hp_ena); if (ret)
dev_warn(madera->dev, "Failed to restore earpiece outputs: %d\n",
ret); elseif (madera->hp_ena)
msleep(34); /* wait for enable wseq */ else
usleep_range(2000, 3000); /* wait for disable wseq */
}
end:
snd_soc_dapm_mutex_unlock(dapm);
ret = snd_soc_dapm_mux_update_power(dapm, kcontrol, mux, e, NULL); if (ret < 0) {
dev_err(madera->dev, "Failed to update demux power state: %d\n", ret); return ret;
}
val = snd_soc_component_read(component, MADERA_OUTPUT_ENABLES_1);
val &= MADERA_EP_SEL_MASK;
val >>= MADERA_EP_SEL_SHIFT;
ucontrol->value.enumerated.item[0] = val;
staticbool madera_can_change_grp_rate(conststruct madera_priv *priv, unsignedint reg)
{ int count;
switch (reg) { case MADERA_FX_CTRL1:
count = priv->domain_group_ref[MADERA_DOM_GRP_FX]; break; case MADERA_ASRC1_RATE1: case MADERA_ASRC1_RATE2:
count = priv->domain_group_ref[MADERA_DOM_GRP_ASRC1]; break; case MADERA_ASRC2_RATE1: case MADERA_ASRC2_RATE2:
count = priv->domain_group_ref[MADERA_DOM_GRP_ASRC2]; break; case MADERA_ISRC_1_CTRL_1: case MADERA_ISRC_1_CTRL_2:
count = priv->domain_group_ref[MADERA_DOM_GRP_ISRC1]; break; case MADERA_ISRC_2_CTRL_1: case MADERA_ISRC_2_CTRL_2:
count = priv->domain_group_ref[MADERA_DOM_GRP_ISRC2]; break; case MADERA_ISRC_3_CTRL_1: case MADERA_ISRC_3_CTRL_2:
count = priv->domain_group_ref[MADERA_DOM_GRP_ISRC3]; break; case MADERA_ISRC_4_CTRL_1: case MADERA_ISRC_4_CTRL_2:
count = priv->domain_group_ref[MADERA_DOM_GRP_ISRC4]; break; case MADERA_OUTPUT_RATE_1:
count = priv->domain_group_ref[MADERA_DOM_GRP_OUT]; break; case MADERA_SPD1_TX_CONTROL:
count = priv->domain_group_ref[MADERA_DOM_GRP_SPD]; break; case MADERA_DSP1_CONFIG_1: case MADERA_DSP1_CONFIG_2:
count = priv->domain_group_ref[MADERA_DOM_GRP_DSP1]; break; case MADERA_DSP2_CONFIG_1: case MADERA_DSP2_CONFIG_2:
count = priv->domain_group_ref[MADERA_DOM_GRP_DSP2]; break; case MADERA_DSP3_CONFIG_1: case MADERA_DSP3_CONFIG_2:
count = priv->domain_group_ref[MADERA_DOM_GRP_DSP3]; break; case MADERA_DSP4_CONFIG_1: case MADERA_DSP4_CONFIG_2:
count = priv->domain_group_ref[MADERA_DOM_GRP_DSP4]; break; case MADERA_DSP5_CONFIG_1: case MADERA_DSP5_CONFIG_2:
count = priv->domain_group_ref[MADERA_DOM_GRP_DSP5]; break; case MADERA_DSP6_CONFIG_1: case MADERA_DSP6_CONFIG_2:
count = priv->domain_group_ref[MADERA_DOM_GRP_DSP6]; break; case MADERA_DSP7_CONFIG_1: case MADERA_DSP7_CONFIG_2:
count = priv->domain_group_ref[MADERA_DOM_GRP_DSP7]; break; case MADERA_AIF1_RATE_CTRL:
count = priv->domain_group_ref[MADERA_DOM_GRP_AIF1]; break; case MADERA_AIF2_RATE_CTRL:
count = priv->domain_group_ref[MADERA_DOM_GRP_AIF2]; break; case MADERA_AIF3_RATE_CTRL:
count = priv->domain_group_ref[MADERA_DOM_GRP_AIF3]; break; case MADERA_AIF4_RATE_CTRL:
count = priv->domain_group_ref[MADERA_DOM_GRP_AIF4]; break; case MADERA_SLIMBUS_RATES_1: case MADERA_SLIMBUS_RATES_2: case MADERA_SLIMBUS_RATES_3: case MADERA_SLIMBUS_RATES_4: case MADERA_SLIMBUS_RATES_5: case MADERA_SLIMBUS_RATES_6: case MADERA_SLIMBUS_RATES_7: case MADERA_SLIMBUS_RATES_8:
count = priv->domain_group_ref[MADERA_DOM_GRP_SLIMBUS]; break; case MADERA_PWM_DRIVE_1:
count = priv->domain_group_ref[MADERA_DOM_GRP_PWM]; break; default: returnfalse;
}
dev_dbg(priv->madera->dev, "Rate reg 0x%x group ref %d\n", reg, count);
/* * We don't directly write the rate register here but we want to * maintain consistent behaviour that rate domains cannot be changed * while in use since this is a hardware requirement
*/
mutex_lock(&priv->rate_lock);
if (!madera_can_change_grp_rate(priv, priv->adsp[adsp_num].cs_dsp.base)) {
dev_warn(priv->madera->dev, "Cannot change '%s' while in use by active audio paths\n",
kcontrol->id.name);
ret = -EBUSY;
} elseif (priv->adsp_rate_cache[adsp_num] != e->values[item]) { /* Volatile register so defer until the codec is powered up */
priv->adsp_rate_cache[adsp_num] = e->values[item];
ret = 1;
}
val = priv->adsp_rate_cache[dsp->cs_dsp.num - 1] << MADERA_DSP_RATE_SHIFT;
switch (priv->madera->type) { case CS47L35: case CS47L85: case WM1840: /* use legacy frequency registers */
mask |= MADERA_DSP_CLK_SEL_MASK;
val |= (freq << MADERA_DSP_CLK_SEL_SHIFT); break; default: /* Configure exact dsp frequency */
dev_dbg(priv->madera->dev, "Set DSP frequency to 0x%x\n", freq);
ret = regmap_write(dsp->cs_dsp.regmap,
dsp->cs_dsp.base + MADERA_DSP_CONFIG_2_OFFS, freq); if (ret) goto err; break;
}
ret = regmap_update_bits(dsp->cs_dsp.regmap,
dsp->cs_dsp.base + MADERA_DSP_CONFIG_1_OFFS,
mask, val); if (ret) goto err;
dev_dbg(priv->madera->dev, "Set DSP clocking to 0x%x\n", val);
return 0;
err:
dev_err(dsp->cs_dsp.dev, "Failed to set DSP%d clock: %d\n", dsp->cs_dsp.num, ret);
return ret;
}
int madera_set_adsp_clk(struct madera_priv *priv, int dsp_num, unsignedint freq)
{ struct wm_adsp *dsp = &priv->adsp[dsp_num]; struct madera *madera = priv->madera; unsignedint cur, new; int ret;
/* * This is called at a higher DAPM priority than the mux widgets so * the muxes are still off at this point and it's safe to change * the rate domain control. * Also called at a lower DAPM priority than the domain group widgets * so locking the reads of adsp_rate_cache is not necessary as we know * changes are locked out by the domain_group_ref reference count.
*/
ret = regmap_read(dsp->cs_dsp.regmap, dsp->cs_dsp.base, &cur); if (ret) {
dev_err(madera->dev, "Failed to read current DSP rate: %d\n", ret); return ret;
}
cur &= MADERA_DSP_RATE_MASK;
new = priv->adsp_rate_cache[dsp->cs_dsp.num - 1] << MADERA_DSP_RATE_SHIFT;
if (new == cur) {
dev_dbg(madera->dev, "DSP rate not changed\n"); return madera_write_adsp_clk_setting(priv, dsp, freq);
} else {
dev_dbg(madera->dev, "DSP rate changed\n");
/* The write must be guarded by a number of SYSCLK cycles */
madera_spin_sysclk(priv);
ret = madera_write_adsp_clk_setting(priv, dsp, freq);
madera_spin_sysclk(priv); return ret;
}
}
EXPORT_SYMBOL_GPL(madera_set_adsp_clk);
/* * Prevent the domain powering up while we're checking whether it's * safe to change rate domain
*/
mutex_lock(&priv->rate_lock);
val = snd_soc_component_read(component, e->reg);
val >>= e->shift_l;
val &= e->mask; if (snd_soc_enum_item_to_val(e, item) == val) {
ret = 0; goto out;
}
if (!madera_can_change_grp_rate(priv, e->reg)) {
dev_warn(priv->madera->dev, "Cannot change '%s' while in use by active audio paths\n",
kcontrol->id.name);
ret = -EBUSY;
} else { /* The write must be guarded by a number of SYSCLK cycles */
madera_spin_sysclk(priv);
ret = snd_soc_put_enum_double(kcontrol, ucontrol);
madera_spin_sysclk(priv);
}
out:
mutex_unlock(&priv->rate_lock);
switch (madera->type) { case CS47L15:
max_analogue_inputs = 1;
max_dmic_sup = 2; break; case CS47L35:
max_analogue_inputs = 2;
max_dmic_sup = 2; break; case CS47L85: case WM1840:
max_analogue_inputs = 3;
max_dmic_sup = 3; break; case CS47L90: case CS47L91:
max_analogue_inputs = 2;
max_dmic_sup = 2; break; default:
max_analogue_inputs = 2;
max_dmic_sup = 4; break;
}
/* * Initialize input modes from the A settings. For muxed inputs the * B settings will be applied if the mux is changed
*/ for (i = 0; i < max_dmic_sup; i++) {
dev_dbg(madera->dev, "IN%d mode %u:%u:%u:%u\n", i + 1,
madera->pdata.codec.inmode[i][0],
madera->pdata.codec.inmode[i][1],
madera->pdata.codec.inmode[i][2],
madera->pdata.codec.inmode[i][3]);
int madera_init_outputs(struct snd_soc_component *component, conststruct snd_soc_dapm_route *routes, int n_mono_routes, int n_real)
{ struct snd_soc_dapm_context *dapm =
snd_soc_component_get_dapm(component); struct madera_priv *priv = snd_soc_component_get_drvdata(component); struct madera *madera = priv->madera; conststruct madera_codec_pdata *pdata = &madera->pdata.codec; unsignedint val; int i;
if (n_mono_routes > MADERA_MAX_OUTPUT) {
dev_warn(madera->dev, "Requested %d mono outputs, using maximum allowed %d\n",
n_mono_routes, MADERA_MAX_OUTPUT);
n_mono_routes = MADERA_MAX_OUTPUT;
}
if (!routes)
routes = madera_mono_routes;
for (i = 0; i < n_mono_routes; i++) { /* Default is 0 so noop with defaults */ if (pdata->out_mono[i]) {
val = MADERA_OUT1_MONO;
snd_soc_dapm_add_routes(dapm, &routes[i], 1);
} else {
val = 0;
}
if (i >= n_real) continue;
regmap_update_bits(madera->regmap,
MADERA_OUTPUT_PATH_CONFIG_1L + (i * 8),
MADERA_OUT1_MONO, val);
dev_dbg(madera->dev, "OUT%d mono=0x%x\n", i + 1, val);
}
for (i = 0; i < MADERA_MAX_PDM_SPK; i++) {
dev_dbg(madera->dev, "PDM%d fmt=0x%x mute=0x%x\n", i + 1,
pdata->pdm_fmt[i], pdata->pdm_mute[i]);
if (pdata->pdm_mute[i])
regmap_update_bits(madera->regmap,
MADERA_PDM_SPK1_CTRL_1 + (i * 2),
MADERA_SPK1_MUTE_ENDIAN_MASK |
MADERA_SPK1_MUTE_SEQ1_MASK,
pdata->pdm_mute[i]);
if (pdata->pdm_fmt[i])
regmap_update_bits(madera->regmap,
MADERA_PDM_SPK1_CTRL_2 + (i * 2),
MADERA_SPK1_FMT_MASK,
pdata->pdm_fmt[i]);
}
int madera_init_bus_error_irq(struct madera_priv *priv, int dsp_num,
irq_handler_t handler)
{ struct madera *madera = priv->madera; int ret;
ret = madera_request_irq(madera,
madera_dsp_bus_error_irqs[dsp_num], "ADSP2 bus error",
handler,
&priv->adsp[dsp_num]); if (ret)
dev_err(madera->dev, "Failed to request DSP Lock region IRQ: %d\n", ret);
val = snd_soc_component_read(component, reg); if (val & MADERA_DFC1_ENA) {
ret = -EBUSY;
dev_err(component->dev, "Can't change mode on an active DFC\n"); gotoexit;
}
ret = snd_soc_put_enum_double(kcontrol, ucontrol); exit:
snd_soc_dapm_mutex_unlock(dapm);
/* Cannot change lp mode on an active input */
val = snd_soc_component_read(component, MADERA_INPUT_ENABLES);
mask = (mc->reg - MADERA_ADC_DIGITAL_VOLUME_1L) / 4;
mask ^= 0x1; /* Flip bottom bit for channel order */
if (val & (1 << mask)) {
ret = -EBUSY;
dev_err(component->dev, "Can't change lp mode on an active input\n"); gotoexit;
}
staticvoid madera_in_set_vu(struct madera_priv *priv, bool enable)
{ unsignedint val; int i, ret;
if (enable)
val = MADERA_IN_VU; else
val = 0;
for (i = 0; i < priv->num_inputs; i++) {
ret = regmap_update_bits(priv->madera->regmap,
MADERA_ADC_DIGITAL_VOLUME_1L + (i * 4),
MADERA_IN_VU, val); if (ret)
dev_warn(priv->madera->dev, "Failed to modify VU bits: %d\n", ret);
}
}
switch (event) { case SND_SOC_DAPM_PRE_PMU:
priv->in_pending++; break; case SND_SOC_DAPM_POST_PMU:
priv->in_pending--;
snd_soc_component_update_bits(component, reg,
MADERA_IN1L_MUTE, 0);
/* If this is the last input pending then allow VU */ if (priv->in_pending == 0) {
usleep_range(1000, 3000);
madera_in_set_vu(priv, true);
} break; case SND_SOC_DAPM_PRE_PMD:
snd_soc_component_update_bits(component, reg,
MADERA_IN1L_MUTE | MADERA_IN_VU,
MADERA_IN1L_MUTE | MADERA_IN_VU); break; case SND_SOC_DAPM_POST_PMD: /* Disable volume updates if no inputs are enabled */
val = snd_soc_component_read(component, MADERA_INPUT_ENABLES); if (!val)
madera_in_set_vu(priv, false); break; default: break;
}
return 0;
}
EXPORT_SYMBOL_GPL(madera_in_ev);
int madera_out_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event)
{ struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); struct madera_priv *priv = snd_soc_component_get_drvdata(component); struct madera *madera = priv->madera; int out_up_delay;
switch (madera->type) { case CS47L90: case CS47L91: case CS42L92: case CS47L92: case CS47L93:
out_up_delay = 6000; break; default:
out_up_delay = 17000; break;
}
switch (event) { case SND_SOC_DAPM_PRE_PMU: switch (w->shift) { case MADERA_OUT1L_ENA_SHIFT: case MADERA_OUT1R_ENA_SHIFT: case MADERA_OUT2L_ENA_SHIFT: case MADERA_OUT2R_ENA_SHIFT: case MADERA_OUT3L_ENA_SHIFT: case MADERA_OUT3R_ENA_SHIFT:
priv->out_up_pending++;
priv->out_up_delay += out_up_delay; break; default: break;
} break;
case SND_SOC_DAPM_POST_PMU: switch (w->shift) { case MADERA_OUT1L_ENA_SHIFT: case MADERA_OUT1R_ENA_SHIFT: case MADERA_OUT2L_ENA_SHIFT: case MADERA_OUT2R_ENA_SHIFT: case MADERA_OUT3L_ENA_SHIFT: case MADERA_OUT3R_ENA_SHIFT:
priv->out_up_pending--; if (!priv->out_up_pending) {
fsleep(priv->out_up_delay);
priv->out_up_delay = 0;
} break;
default: break;
} break;
case SND_SOC_DAPM_PRE_PMD: switch (w->shift) { case MADERA_OUT1L_ENA_SHIFT: case MADERA_OUT1R_ENA_SHIFT: case MADERA_OUT2L_ENA_SHIFT: case MADERA_OUT2R_ENA_SHIFT: case MADERA_OUT3L_ENA_SHIFT: case MADERA_OUT3R_ENA_SHIFT:
priv->out_down_pending++;
priv->out_down_delay += 1000; break; default: break;
} break;
case SND_SOC_DAPM_POST_PMD: switch (w->shift) { case MADERA_OUT1L_ENA_SHIFT: case MADERA_OUT1R_ENA_SHIFT: case MADERA_OUT2L_ENA_SHIFT: case MADERA_OUT2R_ENA_SHIFT: case MADERA_OUT3L_ENA_SHIFT: case MADERA_OUT3R_ENA_SHIFT:
priv->out_down_pending--; if (!priv->out_down_pending) {
fsleep(priv->out_down_delay);
priv->out_down_delay = 0;
} break; default: break;
} break; default: break;
}
return 0;
}
EXPORT_SYMBOL_GPL(madera_out_ev);
int madera_hp_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event)
{ struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
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