// SPDX-License-Identifier: GPL-2.0 /* * mt8195-audsys-clk.h -- Mediatek 8195 audsys clock control * * Copyright (c) 2021 MediaTek Inc. * Author: Trevor Wu <trevor.wu@mediatek.com> #include <linux/clk.h>#include <linux/clk-provider.h>#include <linux/clkdev.h>#include "mt8195-afe-common.h" #include "mt8195-audsys-clk.h" #include "mt8195-audsys-clkid.h" #include "mt8195-reg.h" struct afe_gate {int id;const char *name;const char *parent_name;int reg;const struct clk_ops *ops;unsigned long flags;#define GATE_AFE_FLAGS(_id, _name, _parent, _reg, _bit, _flags, _cgflags) {\#define GATE_AFE(_id, _name, _parent, _reg, _bit) \#define GATE_AUD0(_id, _name, _parent, _bit) \#define GATE_AUD1(_id, _name, _parent, _bit) \#define GATE_AUD3(_id, _name, _parent, _bit) \#define GATE_AUD4(_id, _name, _parent, _bit) \#define GATE_AUD5(_id, _name, _parent, _bit) \#define GATE_AUD6(_id, _name, _parent, _bit) \static const struct afe_gate aud_clks[CLK_AUD_NR_CLK] = {/* AUD0 */ "aud_afe" , "top_a1sys_hp" , 2),"aud_lrck_cnt" , "top_a1sys_hp" , 4),"aud_spdifin_tuner_apll" , "top_apll4" , 10),"aud_spdifin_tuner_dbg" , "top_apll4" , 11),"aud_ul_tml" , "top_a1sys_hp" , 18),"aud_apll1_tuner" , "top_apll1" , 19),"aud_apll2_tuner" , "top_apll2" , 20),"aud_top0_spdf" , "top_aud_iec_clk" , 21),"aud_apll" , "top_apll1" , 23),"aud_apll2" , "top_apll2" , 24),"aud_dac" , "top_a1sys_hp" , 25),"aud_dac_predis" , "top_a1sys_hp" , 26),"aud_tml" , "top_a1sys_hp" , 27),"aud_adc" , "top_a1sys_hp" , 28),"aud_dac_hires" , "top_audio_h" , 31),/* AUD1 */ "aud_a1sys_hp" , "top_a1sys_hp" , 2),"aud_afe_dmic1" , "top_a1sys_hp" , 10),"aud_afe_dmic2" , "top_a1sys_hp" , 11),"aud_afe_dmic3" , "top_a1sys_hp" , 12),"aud_afe_dmic4" , "top_a1sys_hp" , 13),"aud_afe_26m_dmic_tm" , "top_a1sys_hp" , 14),"aud_ul_tml_hires" , "top_audio_h" , 16),"aud_adc_hires" , "top_audio_h" , 17),"aud_adda6_adc" , "top_a1sys_hp" , 18),"aud_adda6_adc_hires" , "top_audio_h" , 19),/* AUD3 */ "aud_linein_tuner" , "top_apll5" , 5),"aud_earc_tuner" , "top_apll3" , 7),/* AUD4 */ "aud_i2sin" , "top_a1sys_hp" , 0),"aud_tdm_in" , "top_a1sys_hp" , 1),"aud_i2s_out" , "top_a1sys_hp" , 6),"aud_tdm_out" , "top_a1sys_hp" , 7),"aud_hdmi_out" , "top_a1sys_hp" , 8),"aud_asrc11" , "top_a1sys_hp" , 16),"aud_asrc12" , "top_a1sys_hp" , 17),"aud_multi_in" , "mphone_slave_b" , 19),"aud_intdir" , "top_intdir" , 20),"aud_a1sys" , "top_a1sys_hp" , 21),"aud_a2sys" , "top_a2sys_hf" , 22),"aud_pcmif" , "top_a1sys_hp" , 24),"aud_a3sys" , "top_a3sys_hf" , 30),"aud_a4sys" , "top_a4sys_hf" , 31),/* AUD5 */ "aud_memif_ul1" , "top_a1sys_hp" , 0),"aud_memif_ul2" , "top_a1sys_hp" , 1),"aud_memif_ul3" , "top_a1sys_hp" , 2),"aud_memif_ul4" , "top_a1sys_hp" , 3),"aud_memif_ul5" , "top_a1sys_hp" , 4),"aud_memif_ul6" , "top_a1sys_hp" , 5),"aud_memif_ul8" , "top_a1sys_hp" , 7),"aud_memif_ul9" , "top_a1sys_hp" , 8),"aud_memif_ul10" , "top_a1sys_hp" , 9),"aud_memif_dl2" , "top_a1sys_hp" , 18),"aud_memif_dl3" , "top_a1sys_hp" , 19),"aud_memif_dl6" , "top_a1sys_hp" , 22),"aud_memif_dl7" , "top_a1sys_hp" , 23),"aud_memif_dl8" , "top_a1sys_hp" , 24),"aud_memif_dl10" , "top_a1sys_hp" , 26),"aud_memif_dl11" , "top_a1sys_hp" , 27),/* AUD6 */ "aud_gasrc0" , "top_asm_h" , 0),"aud_gasrc1" , "top_asm_h" , 1),"aud_gasrc2" , "top_asm_h" , 2),"aud_gasrc3" , "top_asm_h" , 3),"aud_gasrc4" , "top_asm_h" , 4),"aud_gasrc5" , "top_asm_h" , 5),"aud_gasrc6" , "top_asm_h" , 6),"aud_gasrc7" , "top_asm_h" , 7),"aud_gasrc8" , "top_asm_h" , 8),"aud_gasrc9" , "top_asm_h" , 9),"aud_gasrc10" , "top_asm_h" , 10),"aud_gasrc11" , "top_asm_h" , 11),"aud_gasrc12" , "top_asm_h" , 12),"aud_gasrc13" , "top_asm_h" , 13),"aud_gasrc14" , "top_asm_h" , 14),"aud_gasrc15" , "top_asm_h" , 15),"aud_gasrc16" , "top_asm_h" , 16),"aud_gasrc17" , "top_asm_h" , 17),"aud_gasrc18" , "top_asm_h" , 18),"aud_gasrc19" , "top_asm_h" , 19),static void mt8195_audsys_clk_unregister(void *data)struct mtk_base_afe *afe = data;struct mt8195_afe_private *afe_priv = afe->platform_priv;struct clk *clk;struct clk_lookup *cl;int i;if (!afe_priv)return ;for (i = 0; i < CLK_AUD_NR_CLK; i++) {if (!cl)continue ;int mt8195_audsys_clk_register(struct mtk_base_afe *afe)struct mt8195_afe_private *afe_priv = afe->platform_priv;struct clk *clk;struct clk_lookup *cl;int i;sizeof (*afe_priv->lookup),if (!afe_priv->lookup)return -ENOMEM;for (i = 0; i < ARRAY_SIZE(aud_clks); i++) {const struct afe_gate *gate = &aud_clks[i];if (IS_ERR(clk)) {"Failed to register clk %s: %ld\n" ,continue ;/* add clk_lookup for devm_clk_get(SND_SOC_DAPM_CLOCK_SUPPLY) */ sizeof (*cl), GFP_KERNEL);if (!cl)return -ENOMEM;return devm_add_action_or_reset(afe->dev, mt8195_audsys_clk_unregister, afe);
Messung V0.5 C=95 H=97 G=95
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