/* SPDX-License-Identifier: GPL-2.0-only */ /* * vlock.S - simple voting lock implementation for ARM * * Created by: Dave Martin, 2012-08-16 * Copyright: (C) 2012-2013 Linaro Limited * * This algorithm is described in more detail in * Documentation/arch/arm/vlocks.rst.
*/
#include <linux/linkage.h>
#include "vlock.h"
.arch armv7-a
/* Select different code if voting flags can fit in a single word. */
#if VLOCK_VOTING_SIZE > 4
#define FEW(x...)
#define MANY(x...) x
#else
#define FEW(x...) x
#define MANY(x...)
#endif
.macro voting_end rbase:req, rcpu:req, rscratch:req
dmb
mov \rscratch, #0
strb \rscratch, [\rbase, \rcpu]
dsb st
sev
.endm
/* * The vlock structure must reside in Strongly-Ordered or Device memory. * This implementation deliberately eliminates most of the barriers which * would be required for other memory types, and assumes that independent * writes to neighbouring locations within a cacheline do not interfere * with one another.
*/
@ r0: lock structure base
@ r1: CPU ID (0-based index within cluster)
ENTRY(vlock_trylock)
add r1, r1, #VLOCK_VOTING_OFFSET
voting_begin r0, r1, r2
ldrb r2, [r0, #VLOCK_OWNER_OFFSET] @ check whether lock is held
cmp r2, #VLOCK_OWNER_NONE
bne trylock_fail @ fail if so
@ Control dependency implies strb not observable before previous ldrb.
strb r1, [r0, #VLOCK_OWNER_OFFSET] @ submit my vote
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