/* * Test case structures. * * The arguments given to test cases can be one of three types. * * ARG_TYPE_REG * Load a register with the given value. * * ARG_TYPE_PTR * Load a register with a pointer into the stack buffer (SP + given value). * * ARG_TYPE_MEM * Store the given value into the stack buffer at [SP+index]. *
*/
#define ARG_FLAG_UNSUPPORTED 0x01 #define ARG_FLAG_SUPPORTED 0x02 #define ARG_FLAG_THUMB 0x10 /* Must be 16 so TEST_ISA can be used */ #define ARG_FLAG_ARM 0x20 /* Must be 32 so TEST_ISA can be used */
/* * Building blocks for test cases. * * Each test case is wrapped between TESTCASE_START and TESTCASE_END. * * To specify arguments for a test case the TEST_ARG_{REG,PTR,MEM} macros are * used followed by a terminating TEST_ARG_END. * * After this, the instruction to be tested is defined with TEST_INSTRUCTION. * Or for branches, TEST_BRANCH_B and TEST_BRANCH_F (branch forwards/backwards). * * Some specific test cases may make use of other custom constructs.
*/
/* * Macros to define test cases. * * Those of the form TEST_{R,P,M}* can be used to define test cases * which take combinations of the three basic types of arguments. E.g. * * TEST_R One register argument * TEST_RR Two register arguments * TEST_RPR A register, a pointer, then a register argument * * For testing instructions which may branch, there are macros TEST_BF_* * and TEST_BB_* for branching forwards and backwards. * * TEST_SUPPORTED and TEST_UNSUPPORTED don't cause the code to be executed, * the just verify that a kprobe is or is not allowed on the given instruction.
*/
/* * We ignore the state of the imprecise abort disable flag (CPSR.A) because this * can change randomly as the kernel doesn't take care to preserve or initialise * this across context switches. Also, with Security Extensions, the flag may * not be under control of the kernel; for this reason we ignore the state of * the FIQ disable flag CPSR.F as well.
*/ #define PSR_IGNORE_BITS (PSR_A_BIT | PSR_F_BIT)
/* * Macros for defining space directives spread over multiple lines. * These are required so the compiler guesses better the length of inline asm * code and will spill the literal pool early enough to avoid generating PC * relative loads with out of range offsets.
*/ #define TWICE(x) x x #define SPACE_0x8 TWICE(".space 4\n\t") #define SPACE_0x10 TWICE(SPACE_0x8) #define SPACE_0x20 TWICE(SPACE_0x10) #define SPACE_0x40 TWICE(SPACE_0x20) #define SPACE_0x80 TWICE(SPACE_0x40) #define SPACE_0x100 TWICE(SPACE_0x80) #define SPACE_0x200 TWICE(SPACE_0x100) #define SPACE_0x400 TWICE(SPACE_0x200) #define SPACE_0x800 TWICE(SPACE_0x400) #define SPACE_0x1000 TWICE(SPACE_0x800)
/* Various values used in test cases... */ #define N(val) (val ^ 0xffffffff) #define VAL1 0x12345678 #define VAL2 N(VAL1) #define VAL3 0xa5f801 #define VAL4 N(VAL3) #define VALM 0x456789ab #define VALR 0xdeaddead #define HH1 0x0123fecb #define HH2 0xa9874567
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