Quelle  imx8mp-nominal.dtsi   Sprache: unbekannt

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (C) 2024 Pengutronix, Ahmad Fatoum <kernel@pengutronix.de>
 */

&clk {
 assigned-clocks = <&clk IMX8MP_CLK_A53_SRC>,
     <&clk IMX8MP_CLK_A53_CORE>,
     <&clk IMX8MP_SYS_PLL3>,
     <&clk IMX8MP_CLK_NOC>,
     <&clk IMX8MP_CLK_NOC_IO>,
     <&clk IMX8MP_CLK_GIC>;
 assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>,
     <&clk IMX8MP_ARM_PLL_OUT>,
     <0>,
     <&clk IMX8MP_SYS_PLL1_800M>,
     <&clk IMX8MP_SYS_PLL3_OUT>,
     <&clk IMX8MP_SYS_PLL1_800M>;
 assigned-clock-rates = <0>, <0>,
          <600000000>,
          <800000000>,
          <600000000>,
          <400000000>;
 fsl,operating-mode = "nominal";
};

&gpu2d {
 assigned-clocks = <&clk IMX8MP_CLK_GPU2D_CORE>;
 assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>;
 assigned-clock-rates = <800000000>;
};

&gpu3d {
 assigned-clocks = <&clk IMX8MP_CLK_GPU3D_CORE>,
     <&clk IMX8MP_CLK_GPU3D_SHADER_CORE>;
 assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>,
     <&clk IMX8MP_SYS_PLL1_800M>;
 assigned-clock-rates = <800000000>, <800000000>;
};

&pgc_hdmimix {
 assigned-clocks = <&clk IMX8MP_CLK_HDMI_AXI>,
     <&clk IMX8MP_CLK_HDMI_APB>;
 assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>,
     <&clk IMX8MP_SYS_PLL1_133M>;
 assigned-clock-rates = <400000000>, <133000000>;
};

&pgc_hsiomix {
 assigned-clocks = <&clk IMX8MP_CLK_HSIO_AXI>;
 assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>;
 assigned-clock-rates = <400000000>;
};

&pgc_gpumix {
 assigned-clocks = <&clk IMX8MP_CLK_GPU_AXI>,
     <&clk IMX8MP_CLK_GPU_AHB>;
 assigned-clock-parents = <&clk IMX8MP_SYS_PLL3_OUT>,
     <&clk IMX8MP_SYS_PLL3_OUT>;
 assigned-clock-rates = <600000000>, <300000000>;
};

&pgc_mlmix {
 assigned-clocks = <&clk IMX8MP_CLK_ML_CORE>,
     <&clk IMX8MP_CLK_ML_AXI>,
     <&clk IMX8MP_CLK_ML_AHB>;
 assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>,
     <&clk IMX8MP_SYS_PLL1_800M>,
     <&clk IMX8MP_SYS_PLL1_800M>;
 assigned-clock-rates = <800000000>,
          <800000000>,
          <300000000>;
};

&media_blk_ctrl {
 assigned-clocks = <&clk IMX8MP_CLK_MEDIA_AXI>,
     <&clk IMX8MP_CLK_MEDIA_APB>,
     <&clk IMX8MP_CLK_MEDIA_DISP1_PIX>,
     <&clk IMX8MP_CLK_MEDIA_DISP2_PIX>,
     <&clk IMX8MP_CLK_MEDIA_ISP>,
     <&clk IMX8MP_VIDEO_PLL1>;
 assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>,
     <&clk IMX8MP_SYS_PLL1_800M>,
     <&clk IMX8MP_VIDEO_PLL1_OUT>,
     <&clk IMX8MP_VIDEO_PLL1_OUT>,
     <&clk IMX8MP_SYS_PLL1_800M>;
 assigned-clock-rates = <400000000>, <200000000>,
          <0>, <0>, <400000000>,
          <1039500000>;
};

&vpu_g1 {
 assigned-clocks = <&clk IMX8MP_CLK_VPU_G1>;
 assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>;
 assigned-clock-rates = <600000000>;
};

&vpu_g2 {
 assigned-clocks = <&clk IMX8MP_CLK_VPU_G2>;
 assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>;
 assigned-clock-rates = <500000000>;
};

&vpumix_blk_ctrl {
 assigned-clocks = <&clk IMX8MP_VPU_PLL>, <&clk IMX8MP_CLK_VPU_BUS>;
 assigned-clock-parents = <0>, <&clk IMX8MP_VPU_PLL_OUT>;
 assigned-clock-rates = <600000000>, <600000000>;
};

/delete-node/ &{noc_opp_table/opp-1000000000};