/* * Mapping of threads to cores * * Note: This implementation is limited to a power of 2 number of * threads per core and the same number for each core in the system * (though it would work if some processors had less threads as long * as the CPU numbers are still allocated, just not brought online). * * However, the API allows for a different implementation in the future * if needed, as long as you only use the functions and not the variables * directly.
*/
/* * tlb_thread_siblings are siblings which share a TLB. This is not * architected, is not something a hypervisor could emulate and a future * CPU may change behaviour even in compat mode, so this should only be * used on PowerNV, and only with care.
*/ staticinlineint cpu_first_tlb_thread_sibling(int cpu)
{ if (cpu_has_feature(CPU_FTR_ARCH_300) && (threads_per_core == 8)) return cpu & ~0x6; /* Big Core */ else return cpu_first_thread_sibling(cpu);
}
staticinlineint cpu_last_tlb_thread_sibling(int cpu)
{ if (cpu_has_feature(CPU_FTR_ARCH_300) && (threads_per_core == 8)) return cpu | 0x6; /* Big Core */ else return cpu_last_thread_sibling(cpu);
}
staticinlineint cpu_tlb_thread_sibling_step(void)
{ if (cpu_has_feature(CPU_FTR_ARCH_300) && (threads_per_core == 8)) return 2; /* Big Core */ else return 1;
}
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