/* This decides where the kernel will search for a free chunk of vm * space during mmap's.
*/ #define TASK_UNMAPPED_BASE PAGE_ALIGN(TASK_SIZE / 3)
/* * Bit of SR register * * FD-bit: * When it's set, it means the processor doesn't have right to use FPU, * and it results exception when the floating operation is executed. * * IMASK-bit: * Interrupt level mask
*/ #define SR_DSP 0x00001000 #define SR_IMASK 0x000000f0 #define SR_FD 0x00008000 #define SR_MD 0x40000000
#define SR_USER_MASK 0x00000303 // M, Q, S, T bits /* * DSP structure and data
*/ struct sh_dsp_struct { unsignedlong dsp_regs[14]; long status;
};
union thread_xstate { struct sh_fpu_hard_struct hardfpu; struct sh_fpu_soft_struct softfpu;
};
struct thread_struct { /* Saved registers when thread is descheduled */ unsignedlong sp; unsignedlong pc;
/* Various thread flags, see SH_THREAD_xxx */ unsignedlong flags;
/* Save middle states of ptrace breakpoints */ struct perf_event *ptrace_bps[HBP_NUM];
#ifdef CONFIG_SH_DSP /* Dsp status information */ struct sh_dsp_struct dsp_status; #endif
/* Extended processor state */ union thread_xstate *xstate;
/* * fpu_counter contains the number of consecutive context switches * that the FPU is used. If this is over a threshold, the lazy fpu * saving becomes unlazy to save the trap. This is an unsigned char * so that after 256 times the counter wraps and the behavior turns * lazy again; this to deal with bursty apps that only use FPU for * a short time
*/ unsignedchar fpu_counter;
};
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