/** * asix_soft_reset - software reset the PHY via BMCR_RESET bit * @phydev: target phy_device struct * * Description: Perform a software PHY reset using the standard * BMCR_RESET bit and poll for the reset bit to be cleared. * Toggle BMCR_RESET bit off to accommodate broken AX8796B PHY implementation * such as used on the Individual Computers' X-Surf 100 Zorro card. * * Returns: 0 on success, < 0 on failure
*/ staticint asix_soft_reset(struct phy_device *phydev)
{ int ret;
/* Asix PHY won't reset unless reset bit toggles */
ret = phy_write(phydev, MII_BMCR, 0); if (ret < 0) return ret;
return genphy_soft_reset(phydev);
}
/* AX88772A is not working properly with some old switches (NETGEAR EN 108TP): * after autoneg is done and the link status is reported as active, the MII_LPA * register is 0. This issue is not reproducible on AX88772C.
*/ staticint asix_ax88772a_read_status(struct phy_device *phydev)
{ int ret, val;
ret = genphy_update_link(phydev); if (ret) return ret;
if (!phydev->link) return 0;
/* If MII_LPA is 0, phy_resolve_aneg_linkmode() will fail to resolve * linkmode so use MII_BMCR as default values.
*/
val = phy_read(phydev, MII_BMCR); if (val < 0) return val;
ret = genphy_read_lpa(phydev); if (ret < 0) return ret;
if (phydev->autoneg == AUTONEG_ENABLE && phydev->autoneg_complete)
phy_resolve_aneg_linkmode(phydev);
return 0;
}
staticvoid asix_ax88772a_link_change_notify(struct phy_device *phydev)
{ /* Reset PHY, otherwise MII_LPA will provide outdated information. * This issue is reproducible only with some link partner PHYs
*/ if (phydev->state == PHY_NOLINK) {
phy_init_hw(phydev);
_phy_start_aneg(phydev);
}
}
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