/* SPDX-License-Identifier: GPL-2.0-or-later */ /* * wm8996.h - WM8996 audio codec interface * * Copyright 2011 Wolfson Microelectronics PLC. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> #ifndef _WM8996_H#define _WM8996_H#define WM8996_SYSCLK_MCLK1 1#define WM8996_SYSCLK_MCLK2 2#define WM8996_SYSCLK_FLL 3#define WM8996_FLL_MCLK1 1#define WM8996_FLL_MCLK2 2#define WM8996_FLL_DACLRCLK1 3#define WM8996_FLL_BCLK1 4typedef void (*wm8996_polarity_fn)(struct snd_soc_component *component, int polarity);int wm8996_detect(struct snd_soc_component *component, struct snd_soc_jack *jack,/* * Register values. #define WM8996_SOFTWARE_RESET 0x00#define WM8996_POWER_MANAGEMENT_1 0x01#define WM8996_POWER_MANAGEMENT_2 0x02#define WM8996_POWER_MANAGEMENT_3 0x03#define WM8996_POWER_MANAGEMENT_4 0x04#define WM8996_POWER_MANAGEMENT_5 0x05#define WM8996_POWER_MANAGEMENT_6 0x06#define WM8996_POWER_MANAGEMENT_7 0x07#define WM8996_POWER_MANAGEMENT_8 0x08#define WM8996_LEFT_LINE_INPUT_VOLUME 0x10#define WM8996_RIGHT_LINE_INPUT_VOLUME 0x11#define WM8996_LINE_INPUT_CONTROL 0x12#define WM8996_DAC1_HPOUT1_VOLUME 0x15#define WM8996_DAC2_HPOUT2_VOLUME 0x16#define WM8996_DAC1_LEFT_VOLUME 0x18#define WM8996_DAC1_RIGHT_VOLUME 0x19#define WM8996_DAC2_LEFT_VOLUME 0x1A#define WM8996_DAC2_RIGHT_VOLUME 0x1B#define WM8996_OUTPUT1_LEFT_VOLUME 0x1C#define WM8996_OUTPUT1_RIGHT_VOLUME 0x1D#define WM8996_OUTPUT2_LEFT_VOLUME 0x1E#define WM8996_OUTPUT2_RIGHT_VOLUME 0x1F#define WM8996_MICBIAS_1 0x20#define WM8996_MICBIAS_2 0x21#define WM8996_LDO_1 0x28#define WM8996_LDO_2 0x29#define WM8996_ACCESSORY_DETECT_MODE_1 0x30#define WM8996_ACCESSORY_DETECT_MODE_2 0x31#define WM8996_HEADPHONE_DETECT_1 0x34#define WM8996_HEADPHONE_DETECT_2 0x35#define WM8996_MIC_DETECT_1 0x38#define WM8996_MIC_DETECT_2 0x39#define WM8996_MIC_DETECT_3 0x3A#define WM8996_CHARGE_PUMP_1 0x40#define WM8996_CHARGE_PUMP_2 0x41#define WM8996_DC_SERVO_1 0x50#define WM8996_DC_SERVO_2 0x51#define WM8996_DC_SERVO_3 0x52#define WM8996_DC_SERVO_5 0x54#define WM8996_DC_SERVO_6 0x55#define WM8996_DC_SERVO_7 0x56#define WM8996_DC_SERVO_READBACK_0 0x57#define WM8996_ANALOGUE_HP_1 0x60#define WM8996_ANALOGUE_HP_2 0x61#define WM8996_CHIP_REVISION 0x100#define WM8996_CONTROL_INTERFACE_1 0x101#define WM8996_WRITE_SEQUENCER_CTRL_1 0x110#define WM8996_WRITE_SEQUENCER_CTRL_2 0x111#define WM8996_AIF_CLOCKING_1 0x200#define WM8996_AIF_CLOCKING_2 0x201#define WM8996_CLOCKING_1 0x208#define WM8996_CLOCKING_2 0x209#define WM8996_AIF_RATE 0x210#define WM8996_FLL_CONTROL_1 0x220#define WM8996_FLL_CONTROL_2 0x221#define WM8996_FLL_CONTROL_3 0x222#define WM8996_FLL_CONTROL_4 0x223#define WM8996_FLL_CONTROL_5 0x224#define WM8996_FLL_CONTROL_6 0x225#define WM8996_FLL_EFS_1 0x226#define WM8996_FLL_EFS_2 0x227#define WM8996_AIF1_CONTROL 0x300#define WM8996_AIF1_BCLK 0x301#define WM8996_AIF1_TX_LRCLK_1 0x302#define WM8996_AIF1_TX_LRCLK_2 0x303#define WM8996_AIF1_RX_LRCLK_1 0x304#define WM8996_AIF1_RX_LRCLK_2 0x305#define WM8996_AIF1TX_DATA_CONFIGURATION_1 0x306#define WM8996_AIF1TX_DATA_CONFIGURATION_2 0x307#define WM8996_AIF1RX_DATA_CONFIGURATION 0x308#define WM8996_AIF1TX_CHANNEL_0_CONFIGURATION 0x309#define WM8996_AIF1TX_CHANNEL_1_CONFIGURATION 0x30A#define WM8996_AIF1TX_CHANNEL_2_CONFIGURATION 0x30B#define WM8996_AIF1TX_CHANNEL_3_CONFIGURATION 0x30C#define WM8996_AIF1TX_CHANNEL_4_CONFIGURATION 0x30D#define WM8996_AIF1TX_CHANNEL_5_CONFIGURATION 0x30E#define WM8996_AIF1RX_CHANNEL_0_CONFIGURATION 0x30F#define WM8996_AIF1RX_CHANNEL_1_CONFIGURATION 0x310#define WM8996_AIF1RX_CHANNEL_2_CONFIGURATION 0x311#define WM8996_AIF1RX_CHANNEL_3_CONFIGURATION 0x312#define WM8996_AIF1RX_CHANNEL_4_CONFIGURATION 0x313#define WM8996_AIF1RX_CHANNEL_5_CONFIGURATION 0x314#define WM8996_AIF1RX_MONO_CONFIGURATION 0x315#define WM8996_AIF1TX_TEST 0x31A#define WM8996_AIF2_CONTROL 0x320#define WM8996_AIF2_BCLK 0x321#define WM8996_AIF2_TX_LRCLK_1 0x322#define WM8996_AIF2_TX_LRCLK_2 0x323#define WM8996_AIF2_RX_LRCLK_1 0x324#define WM8996_AIF2_RX_LRCLK_2 0x325#define WM8996_AIF2TX_DATA_CONFIGURATION_1 0x326#define WM8996_AIF2TX_DATA_CONFIGURATION_2 0x327#define WM8996_AIF2RX_DATA_CONFIGURATION 0x328#define WM8996_AIF2TX_CHANNEL_0_CONFIGURATION 0x329#define WM8996_AIF2TX_CHANNEL_1_CONFIGURATION 0x32A#define WM8996_AIF2RX_CHANNEL_0_CONFIGURATION 0x32B#define WM8996_AIF2RX_CHANNEL_1_CONFIGURATION 0x32C#define WM8996_AIF2RX_MONO_CONFIGURATION 0x32D#define WM8996_AIF2TX_TEST 0x32F#define WM8996_DSP1_TX_LEFT_VOLUME 0x400#define WM8996_DSP1_TX_RIGHT_VOLUME 0x401#define WM8996_DSP1_RX_LEFT_VOLUME 0x402#define WM8996_DSP1_RX_RIGHT_VOLUME 0x403#define WM8996_DSP1_TX_FILTERS 0x410#define WM8996_DSP1_RX_FILTERS_1 0x420#define WM8996_DSP1_RX_FILTERS_2 0x421#define WM8996_DSP1_DRC_1 0x440#define WM8996_DSP1_DRC_2 0x441#define WM8996_DSP1_DRC_3 0x442#define WM8996_DSP1_DRC_4 0x443#define WM8996_DSP1_DRC_5 0x444#define WM8996_DSP1_RX_EQ_GAINS_1 0x480#define WM8996_DSP1_RX_EQ_GAINS_2 0x481#define WM8996_DSP1_RX_EQ_BAND_1_A 0x482#define WM8996_DSP1_RX_EQ_BAND_1_B 0x483#define WM8996_DSP1_RX_EQ_BAND_1_PG 0x484#define WM8996_DSP1_RX_EQ_BAND_2_A 0x485#define WM8996_DSP1_RX_EQ_BAND_2_B 0x486#define WM8996_DSP1_RX_EQ_BAND_2_C 0x487#define WM8996_DSP1_RX_EQ_BAND_2_PG 0x488#define WM8996_DSP1_RX_EQ_BAND_3_A 0x489#define WM8996_DSP1_RX_EQ_BAND_3_B 0x48A#define WM8996_DSP1_RX_EQ_BAND_3_C 0x48B#define WM8996_DSP1_RX_EQ_BAND_3_PG 0x48C#define WM8996_DSP1_RX_EQ_BAND_4_A 0x48D#define WM8996_DSP1_RX_EQ_BAND_4_B 0x48E#define WM8996_DSP1_RX_EQ_BAND_4_C 0x48F#define WM8996_DSP1_RX_EQ_BAND_4_PG 0x490#define WM8996_DSP1_RX_EQ_BAND_5_A 0x491#define WM8996_DSP1_RX_EQ_BAND_5_B 0x492#define WM8996_DSP1_RX_EQ_BAND_5_PG 0x493#define WM8996_DSP2_TX_LEFT_VOLUME 0x500#define WM8996_DSP2_TX_RIGHT_VOLUME 0x501#define WM8996_DSP2_RX_LEFT_VOLUME 0x502#define WM8996_DSP2_RX_RIGHT_VOLUME 0x503#define WM8996_DSP2_TX_FILTERS 0x510#define WM8996_DSP2_RX_FILTERS_1 0x520#define WM8996_DSP2_RX_FILTERS_2 0x521#define WM8996_DSP2_DRC_1 0x540#define WM8996_DSP2_DRC_2 0x541#define WM8996_DSP2_DRC_3 0x542#define WM8996_DSP2_DRC_4 0x543#define WM8996_DSP2_DRC_5 0x544#define WM8996_DSP2_RX_EQ_GAINS_1 0x580#define WM8996_DSP2_RX_EQ_GAINS_2 0x581#define WM8996_DSP2_RX_EQ_BAND_1_A 0x582#define WM8996_DSP2_RX_EQ_BAND_1_B 0x583#define WM8996_DSP2_RX_EQ_BAND_1_PG 0x584#define WM8996_DSP2_RX_EQ_BAND_2_A 0x585#define WM8996_DSP2_RX_EQ_BAND_2_B 0x586#define WM8996_DSP2_RX_EQ_BAND_2_C 0x587#define WM8996_DSP2_RX_EQ_BAND_2_PG 0x588#define WM8996_DSP2_RX_EQ_BAND_3_A 0x589#define WM8996_DSP2_RX_EQ_BAND_3_B 0x58A#define WM8996_DSP2_RX_EQ_BAND_3_C 0x58B#define WM8996_DSP2_RX_EQ_BAND_3_PG 0x58C#define WM8996_DSP2_RX_EQ_BAND_4_A 0x58D#define WM8996_DSP2_RX_EQ_BAND_4_B 0x58E#define WM8996_DSP2_RX_EQ_BAND_4_C 0x58F#define WM8996_DSP2_RX_EQ_BAND_4_PG 0x590#define WM8996_DSP2_RX_EQ_BAND_5_A 0x591#define WM8996_DSP2_RX_EQ_BAND_5_B 0x592#define WM8996_DSP2_RX_EQ_BAND_5_PG 0x593#define WM8996_DAC1_MIXER_VOLUMES 0x600#define WM8996_DAC1_LEFT_MIXER_ROUTING 0x601#define WM8996_DAC1_RIGHT_MIXER_ROUTING 0x602#define WM8996_DAC2_MIXER_VOLUMES 0x603#define WM8996_DAC2_LEFT_MIXER_ROUTING 0x604#define WM8996_DAC2_RIGHT_MIXER_ROUTING 0x605#define WM8996_DSP1_TX_LEFT_MIXER_ROUTING 0x606#define WM8996_DSP1_TX_RIGHT_MIXER_ROUTING 0x607#define WM8996_DSP2_TX_LEFT_MIXER_ROUTING 0x608#define WM8996_DSP2_TX_RIGHT_MIXER_ROUTING 0x609#define WM8996_DSP_TX_MIXER_SELECT 0x60A#define WM8996_DAC_SOFTMUTE 0x610#define WM8996_OVERSAMPLING 0x620#define WM8996_SIDETONE 0x621#define WM8996_GPIO_1 0x700#define WM8996_GPIO_2 0x701#define WM8996_GPIO_3 0x702#define WM8996_GPIO_4 0x703#define WM8996_GPIO_5 0x704#define WM8996_PULL_CONTROL_1 0x720#define WM8996_PULL_CONTROL_2 0x721#define WM8996_INTERRUPT_STATUS_1 0x730#define WM8996_INTERRUPT_STATUS_2 0x731#define WM8996_INTERRUPT_RAW_STATUS_2 0x732#define WM8996_INTERRUPT_STATUS_1_MASK 0x738#define WM8996_INTERRUPT_STATUS_2_MASK 0x739#define WM8996_INTERRUPT_CONTROL 0x740#define WM8996_LEFT_PDM_SPEAKER 0x800#define WM8996_RIGHT_PDM_SPEAKER 0x801#define WM8996_PDM_SPEAKER_MUTE_SEQUENCE 0x802#define WM8996_PDM_SPEAKER_VOLUME 0x803#define WM8996_WRITE_SEQUENCER_0 0x3000#define WM8996_WRITE_SEQUENCER_1 0x3001#define WM8996_WRITE_SEQUENCER_2 0x3002#define WM8996_WRITE_SEQUENCER_3 0x3003#define WM8996_WRITE_SEQUENCER_4 0x3004#define WM8996_WRITE_SEQUENCER_5 0x3005#define WM8996_WRITE_SEQUENCER_6 0x3006#define WM8996_WRITE_SEQUENCER_7 0x3007#define WM8996_WRITE_SEQUENCER_8 0x3008#define WM8996_WRITE_SEQUENCER_9 0x3009#define WM8996_WRITE_SEQUENCER_10 0x300A#define WM8996_WRITE_SEQUENCER_11 0x300B#define WM8996_WRITE_SEQUENCER_12 0x300C#define WM8996_WRITE_SEQUENCER_13 0x300D#define WM8996_WRITE_SEQUENCER_14 0x300E#define WM8996_WRITE_SEQUENCER_15 0x300F#define WM8996_WRITE_SEQUENCER_16 0x3010#define WM8996_WRITE_SEQUENCER_17 0x3011#define WM8996_WRITE_SEQUENCER_18 0x3012#define WM8996_WRITE_SEQUENCER_19 0x3013#define WM8996_WRITE_SEQUENCER_20 0x3014#define WM8996_WRITE_SEQUENCER_21 0x3015#define WM8996_WRITE_SEQUENCER_22 0x3016#define WM8996_WRITE_SEQUENCER_23 0x3017#define WM8996_WRITE_SEQUENCER_24 0x3018#define WM8996_WRITE_SEQUENCER_25 0x3019#define WM8996_WRITE_SEQUENCER_26 0x301A#define WM8996_WRITE_SEQUENCER_27 0x301B#define WM8996_WRITE_SEQUENCER_28 0x301C#define WM8996_WRITE_SEQUENCER_29 0x301D#define WM8996_WRITE_SEQUENCER_30 0x301E#define WM8996_WRITE_SEQUENCER_31 0x301F#define WM8996_WRITE_SEQUENCER_32 0x3020#define WM8996_WRITE_SEQUENCER_33 0x3021#define WM8996_WRITE_SEQUENCER_34 0x3022#define WM8996_WRITE_SEQUENCER_35 0x3023#define WM8996_WRITE_SEQUENCER_36 0x3024#define WM8996_WRITE_SEQUENCER_37 0x3025#define WM8996_WRITE_SEQUENCER_38 0x3026#define WM8996_WRITE_SEQUENCER_39 0x3027#define WM8996_WRITE_SEQUENCER_40 0x3028#define WM8996_WRITE_SEQUENCER_41 0x3029#define WM8996_WRITE_SEQUENCER_42 0x302A#define WM8996_WRITE_SEQUENCER_43 0x302B#define WM8996_WRITE_SEQUENCER_44 0x302C#define WM8996_WRITE_SEQUENCER_45 0x302D#define WM8996_WRITE_SEQUENCER_46 0x302E#define WM8996_WRITE_SEQUENCER_47 0x302F#define WM8996_WRITE_SEQUENCER_48 0x3030#define WM8996_WRITE_SEQUENCER_49 0x3031#define WM8996_WRITE_SEQUENCER_50 0x3032#define WM8996_WRITE_SEQUENCER_51 0x3033#define WM8996_WRITE_SEQUENCER_52 0x3034#define WM8996_WRITE_SEQUENCER_53 0x3035#define WM8996_WRITE_SEQUENCER_54 0x3036#define WM8996_WRITE_SEQUENCER_55 0x3037#define WM8996_WRITE_SEQUENCER_56 0x3038#define WM8996_WRITE_SEQUENCER_57 0x3039#define WM8996_WRITE_SEQUENCER_58 0x303A#define WM8996_WRITE_SEQUENCER_59 0x303B#define WM8996_WRITE_SEQUENCER_60 0x303C#define WM8996_WRITE_SEQUENCER_61 0x303D#define WM8996_WRITE_SEQUENCER_62 0x303E#define WM8996_WRITE_SEQUENCER_63 0x303F#define WM8996_WRITE_SEQUENCER_64 0x3040#define WM8996_WRITE_SEQUENCER_65 0x3041#define WM8996_WRITE_SEQUENCER_66 0x3042#define WM8996_WRITE_SEQUENCER_67 0x3043#define WM8996_WRITE_SEQUENCER_68 0x3044#define WM8996_WRITE_SEQUENCER_69 0x3045#define WM8996_WRITE_SEQUENCER_70 0x3046#define WM8996_WRITE_SEQUENCER_71 0x3047#define WM8996_WRITE_SEQUENCER_72 0x3048#define WM8996_WRITE_SEQUENCER_73 0x3049#define WM8996_WRITE_SEQUENCER_74 0x304A#define WM8996_WRITE_SEQUENCER_75 0x304B#define WM8996_WRITE_SEQUENCER_76 0x304C#define WM8996_WRITE_SEQUENCER_77 0x304D#define WM8996_WRITE_SEQUENCER_78 0x304E#define WM8996_WRITE_SEQUENCER_79 0x304F#define WM8996_WRITE_SEQUENCER_80 0x3050#define WM8996_WRITE_SEQUENCER_81 0x3051#define WM8996_WRITE_SEQUENCER_82 0x3052#define WM8996_WRITE_SEQUENCER_83 0x3053#define WM8996_WRITE_SEQUENCER_84 0x3054#define WM8996_WRITE_SEQUENCER_85 0x3055#define WM8996_WRITE_SEQUENCER_86 0x3056#define WM8996_WRITE_SEQUENCER_87 0x3057#define WM8996_WRITE_SEQUENCER_88 0x3058#define WM8996_WRITE_SEQUENCER_89 0x3059#define WM8996_WRITE_SEQUENCER_90 0x305A#define WM8996_WRITE_SEQUENCER_91 0x305B#define WM8996_WRITE_SEQUENCER_92 0x305C#define WM8996_WRITE_SEQUENCER_93 0x305D#define WM8996_WRITE_SEQUENCER_94 0x305E#define WM8996_WRITE_SEQUENCER_95 0x305F#define WM8996_WRITE_SEQUENCER_96 0x3060#define WM8996_WRITE_SEQUENCER_97 0x3061#define WM8996_WRITE_SEQUENCER_98 0x3062#define WM8996_WRITE_SEQUENCER_99 0x3063#define WM8996_WRITE_SEQUENCER_100 0x3064#define WM8996_WRITE_SEQUENCER_101 0x3065#define WM8996_WRITE_SEQUENCER_102 0x3066#define WM8996_WRITE_SEQUENCER_103 0x3067#define WM8996_WRITE_SEQUENCER_104 0x3068#define WM8996_WRITE_SEQUENCER_105 0x3069#define WM8996_WRITE_SEQUENCER_106 0x306A#define WM8996_WRITE_SEQUENCER_107 0x306B#define WM8996_WRITE_SEQUENCER_108 0x306C#define WM8996_WRITE_SEQUENCER_109 0x306D#define WM8996_WRITE_SEQUENCER_110 0x306E#define WM8996_WRITE_SEQUENCER_111 0x306F#define WM8996_WRITE_SEQUENCER_112 0x3070#define WM8996_WRITE_SEQUENCER_113 0x3071#define WM8996_WRITE_SEQUENCER_114 0x3072#define WM8996_WRITE_SEQUENCER_115 0x3073#define WM8996_WRITE_SEQUENCER_116 0x3074#define WM8996_WRITE_SEQUENCER_117 0x3075#define WM8996_WRITE_SEQUENCER_118 0x3076#define WM8996_WRITE_SEQUENCER_119 0x3077#define WM8996_WRITE_SEQUENCER_120 0x3078#define WM8996_WRITE_SEQUENCER_121 0x3079#define WM8996_WRITE_SEQUENCER_122 0x307A#define WM8996_WRITE_SEQUENCER_123 0x307B#define WM8996_WRITE_SEQUENCER_124 0x307C#define WM8996_WRITE_SEQUENCER_125 0x307D#define WM8996_WRITE_SEQUENCER_126 0x307E#define WM8996_WRITE_SEQUENCER_127 0x307F#define WM8996_WRITE_SEQUENCER_128 0x3080#define WM8996_WRITE_SEQUENCER_129 0x3081#define WM8996_WRITE_SEQUENCER_130 0x3082#define WM8996_WRITE_SEQUENCER_131 0x3083#define WM8996_WRITE_SEQUENCER_132 0x3084#define WM8996_WRITE_SEQUENCER_133 0x3085#define WM8996_WRITE_SEQUENCER_134 0x3086#define WM8996_WRITE_SEQUENCER_135 0x3087#define WM8996_WRITE_SEQUENCER_136 0x3088#define WM8996_WRITE_SEQUENCER_137 0x3089#define WM8996_WRITE_SEQUENCER_138 0x308A#define WM8996_WRITE_SEQUENCER_139 0x308B#define WM8996_WRITE_SEQUENCER_140 0x308C#define WM8996_WRITE_SEQUENCER_141 0x308D#define WM8996_WRITE_SEQUENCER_142 0x308E#define WM8996_WRITE_SEQUENCER_143 0x308F#define WM8996_WRITE_SEQUENCER_144 0x3090#define WM8996_WRITE_SEQUENCER_145 0x3091#define WM8996_WRITE_SEQUENCER_146 0x3092#define WM8996_WRITE_SEQUENCER_147 0x3093#define WM8996_WRITE_SEQUENCER_148 0x3094#define WM8996_WRITE_SEQUENCER_149 0x3095#define WM8996_WRITE_SEQUENCER_150 0x3096#define WM8996_WRITE_SEQUENCER_151 0x3097#define WM8996_WRITE_SEQUENCER_152 0x3098#define WM8996_WRITE_SEQUENCER_153 0x3099#define WM8996_WRITE_SEQUENCER_154 0x309A#define WM8996_WRITE_SEQUENCER_155 0x309B#define WM8996_WRITE_SEQUENCER_156 0x309C#define WM8996_WRITE_SEQUENCER_157 0x309D#define WM8996_WRITE_SEQUENCER_158 0x309E#define WM8996_WRITE_SEQUENCER_159 0x309F#define WM8996_WRITE_SEQUENCER_160 0x30A0#define WM8996_WRITE_SEQUENCER_161 0x30A1#define WM8996_WRITE_SEQUENCER_162 0x30A2#define WM8996_WRITE_SEQUENCER_163 0x30A3#define WM8996_WRITE_SEQUENCER_164 0x30A4#define WM8996_WRITE_SEQUENCER_165 0x30A5#define WM8996_WRITE_SEQUENCER_166 0x30A6#define WM8996_WRITE_SEQUENCER_167 0x30A7#define WM8996_WRITE_SEQUENCER_168 0x30A8#define WM8996_WRITE_SEQUENCER_169 0x30A9#define WM8996_WRITE_SEQUENCER_170 0x30AA#define WM8996_WRITE_SEQUENCER_171 0x30AB#define WM8996_WRITE_SEQUENCER_172 0x30AC#define WM8996_WRITE_SEQUENCER_173 0x30AD#define WM8996_WRITE_SEQUENCER_174 0x30AE#define WM8996_WRITE_SEQUENCER_175 0x30AF#define WM8996_WRITE_SEQUENCER_176 0x30B0#define WM8996_WRITE_SEQUENCER_177 0x30B1#define WM8996_WRITE_SEQUENCER_178 0x30B2#define WM8996_WRITE_SEQUENCER_179 0x30B3#define WM8996_WRITE_SEQUENCER_180 0x30B4#define WM8996_WRITE_SEQUENCER_181 0x30B5#define WM8996_WRITE_SEQUENCER_182 0x30B6#define WM8996_WRITE_SEQUENCER_183 0x30B7#define WM8996_WRITE_SEQUENCER_184 0x30B8#define WM8996_WRITE_SEQUENCER_185 0x30B9#define WM8996_WRITE_SEQUENCER_186 0x30BA#define WM8996_WRITE_SEQUENCER_187 0x30BB#define WM8996_WRITE_SEQUENCER_188 0x30BC#define WM8996_WRITE_SEQUENCER_189 0x30BD#define WM8996_WRITE_SEQUENCER_190 0x30BE#define WM8996_WRITE_SEQUENCER_191 0x30BF#define WM8996_WRITE_SEQUENCER_192 0x30C0#define WM8996_WRITE_SEQUENCER_193 0x30C1#define WM8996_WRITE_SEQUENCER_194 0x30C2#define WM8996_WRITE_SEQUENCER_195 0x30C3#define WM8996_WRITE_SEQUENCER_196 0x30C4#define WM8996_WRITE_SEQUENCER_197 0x30C5#define WM8996_WRITE_SEQUENCER_198 0x30C6#define WM8996_WRITE_SEQUENCER_199 0x30C7#define WM8996_WRITE_SEQUENCER_200 0x30C8#define WM8996_WRITE_SEQUENCER_201 0x30C9#define WM8996_WRITE_SEQUENCER_202 0x30CA#define WM8996_WRITE_SEQUENCER_203 0x30CB#define WM8996_WRITE_SEQUENCER_204 0x30CC#define WM8996_WRITE_SEQUENCER_205 0x30CD#define WM8996_WRITE_SEQUENCER_206 0x30CE#define WM8996_WRITE_SEQUENCER_207 0x30CF#define WM8996_WRITE_SEQUENCER_208 0x30D0#define WM8996_WRITE_SEQUENCER_209 0x30D1#define WM8996_WRITE_SEQUENCER_210 0x30D2#define WM8996_WRITE_SEQUENCER_211 0x30D3#define WM8996_WRITE_SEQUENCER_212 0x30D4#define WM8996_WRITE_SEQUENCER_213 0x30D5#define WM8996_WRITE_SEQUENCER_214 0x30D6#define WM8996_WRITE_SEQUENCER_215 0x30D7#define WM8996_WRITE_SEQUENCER_216 0x30D8#define WM8996_WRITE_SEQUENCER_217 0x30D9#define WM8996_WRITE_SEQUENCER_218 0x30DA#define WM8996_WRITE_SEQUENCER_219 0x30DB#define WM8996_WRITE_SEQUENCER_220 0x30DC#define WM8996_WRITE_SEQUENCER_221 0x30DD#define WM8996_WRITE_SEQUENCER_222 0x30DE#define WM8996_WRITE_SEQUENCER_223 0x30DF#define WM8996_WRITE_SEQUENCER_224 0x30E0#define WM8996_WRITE_SEQUENCER_225 0x30E1#define WM8996_WRITE_SEQUENCER_226 0x30E2#define WM8996_WRITE_SEQUENCER_227 0x30E3#define WM8996_WRITE_SEQUENCER_228 0x30E4#define WM8996_WRITE_SEQUENCER_229 0x30E5#define WM8996_WRITE_SEQUENCER_230 0x30E6#define WM8996_WRITE_SEQUENCER_231 0x30E7#define WM8996_WRITE_SEQUENCER_232 0x30E8#define WM8996_WRITE_SEQUENCER_233 0x30E9#define WM8996_WRITE_SEQUENCER_234 0x30EA#define WM8996_WRITE_SEQUENCER_235 0x30EB#define WM8996_WRITE_SEQUENCER_236 0x30EC#define WM8996_WRITE_SEQUENCER_237 0x30ED#define WM8996_WRITE_SEQUENCER_238 0x30EE#define WM8996_WRITE_SEQUENCER_239 0x30EF#define WM8996_WRITE_SEQUENCER_240 0x30F0#define WM8996_WRITE_SEQUENCER_241 0x30F1#define WM8996_WRITE_SEQUENCER_242 0x30F2#define WM8996_WRITE_SEQUENCER_243 0x30F3#define WM8996_WRITE_SEQUENCER_244 0x30F4#define WM8996_WRITE_SEQUENCER_245 0x30F5#define WM8996_WRITE_SEQUENCER_246 0x30F6#define WM8996_WRITE_SEQUENCER_247 0x30F7#define WM8996_WRITE_SEQUENCER_248 0x30F8#define WM8996_WRITE_SEQUENCER_249 0x30F9#define WM8996_WRITE_SEQUENCER_250 0x30FA#define WM8996_WRITE_SEQUENCER_251 0x30FB#define WM8996_WRITE_SEQUENCER_252 0x30FC#define WM8996_WRITE_SEQUENCER_253 0x30FD#define WM8996_WRITE_SEQUENCER_254 0x30FE#define WM8996_WRITE_SEQUENCER_255 0x30FF#define WM8996_WRITE_SEQUENCER_256 0x3100#define WM8996_WRITE_SEQUENCER_257 0x3101#define WM8996_WRITE_SEQUENCER_258 0x3102#define WM8996_WRITE_SEQUENCER_259 0x3103#define WM8996_WRITE_SEQUENCER_260 0x3104#define WM8996_WRITE_SEQUENCER_261 0x3105#define WM8996_WRITE_SEQUENCER_262 0x3106#define WM8996_WRITE_SEQUENCER_263 0x3107#define WM8996_WRITE_SEQUENCER_264 0x3108#define WM8996_WRITE_SEQUENCER_265 0x3109#define WM8996_WRITE_SEQUENCER_266 0x310A#define WM8996_WRITE_SEQUENCER_267 0x310B#define WM8996_WRITE_SEQUENCER_268 0x310C#define WM8996_WRITE_SEQUENCER_269 0x310D#define WM8996_WRITE_SEQUENCER_270 0x310E#define WM8996_WRITE_SEQUENCER_271 0x310F#define WM8996_WRITE_SEQUENCER_272 0x3110#define WM8996_WRITE_SEQUENCER_273 0x3111#define WM8996_WRITE_SEQUENCER_274 0x3112#define WM8996_WRITE_SEQUENCER_275 0x3113#define WM8996_WRITE_SEQUENCER_276 0x3114#define WM8996_WRITE_SEQUENCER_277 0x3115#define WM8996_WRITE_SEQUENCER_278 0x3116#define WM8996_WRITE_SEQUENCER_279 0x3117#define WM8996_WRITE_SEQUENCER_280 0x3118#define WM8996_WRITE_SEQUENCER_281 0x3119#define WM8996_WRITE_SEQUENCER_282 0x311A#define WM8996_WRITE_SEQUENCER_283 0x311B#define WM8996_WRITE_SEQUENCER_284 0x311C#define WM8996_WRITE_SEQUENCER_285 0x311D#define WM8996_WRITE_SEQUENCER_286 0x311E#define WM8996_WRITE_SEQUENCER_287 0x311F#define WM8996_WRITE_SEQUENCER_288 0x3120#define WM8996_WRITE_SEQUENCER_289 0x3121#define WM8996_WRITE_SEQUENCER_290 0x3122#define WM8996_WRITE_SEQUENCER_291 0x3123#define WM8996_WRITE_SEQUENCER_292 0x3124#define WM8996_WRITE_SEQUENCER_293 0x3125#define WM8996_WRITE_SEQUENCER_294 0x3126#define WM8996_WRITE_SEQUENCER_295 0x3127#define WM8996_WRITE_SEQUENCER_296 0x3128#define WM8996_WRITE_SEQUENCER_297 0x3129#define WM8996_WRITE_SEQUENCER_298 0x312A#define WM8996_WRITE_SEQUENCER_299 0x312B#define WM8996_WRITE_SEQUENCER_300 0x312C#define WM8996_WRITE_SEQUENCER_301 0x312D#define WM8996_WRITE_SEQUENCER_302 0x312E#define WM8996_WRITE_SEQUENCER_303 0x312F#define WM8996_WRITE_SEQUENCER_304 0x3130#define WM8996_WRITE_SEQUENCER_305 0x3131#define WM8996_WRITE_SEQUENCER_306 0x3132#define WM8996_WRITE_SEQUENCER_307 0x3133#define WM8996_WRITE_SEQUENCER_308 0x3134#define WM8996_WRITE_SEQUENCER_309 0x3135#define WM8996_WRITE_SEQUENCER_310 0x3136#define WM8996_WRITE_SEQUENCER_311 0x3137#define WM8996_WRITE_SEQUENCER_312 0x3138#define WM8996_WRITE_SEQUENCER_313 0x3139#define WM8996_WRITE_SEQUENCER_314 0x313A#define WM8996_WRITE_SEQUENCER_315 0x313B#define WM8996_WRITE_SEQUENCER_316 0x313C#define WM8996_WRITE_SEQUENCER_317 0x313D#define WM8996_WRITE_SEQUENCER_318 0x313E#define WM8996_WRITE_SEQUENCER_319 0x313F#define WM8996_WRITE_SEQUENCER_320 0x3140#define WM8996_WRITE_SEQUENCER_321 0x3141#define WM8996_WRITE_SEQUENCER_322 0x3142#define WM8996_WRITE_SEQUENCER_323 0x3143#define WM8996_WRITE_SEQUENCER_324 0x3144#define WM8996_WRITE_SEQUENCER_325 0x3145#define WM8996_WRITE_SEQUENCER_326 0x3146#define WM8996_WRITE_SEQUENCER_327 0x3147#define WM8996_WRITE_SEQUENCER_328 0x3148#define WM8996_WRITE_SEQUENCER_329 0x3149#define WM8996_WRITE_SEQUENCER_330 0x314A#define WM8996_WRITE_SEQUENCER_331 0x314B#define WM8996_WRITE_SEQUENCER_332 0x314C#define WM8996_WRITE_SEQUENCER_333 0x314D#define WM8996_WRITE_SEQUENCER_334 0x314E#define WM8996_WRITE_SEQUENCER_335 0x314F#define WM8996_WRITE_SEQUENCER_336 0x3150#define WM8996_WRITE_SEQUENCER_337 0x3151#define WM8996_WRITE_SEQUENCER_338 0x3152#define WM8996_WRITE_SEQUENCER_339 0x3153#define WM8996_WRITE_SEQUENCER_340 0x3154#define WM8996_WRITE_SEQUENCER_341 0x3155#define WM8996_WRITE_SEQUENCER_342 0x3156#define WM8996_WRITE_SEQUENCER_343 0x3157#define WM8996_WRITE_SEQUENCER_344 0x3158#define WM8996_WRITE_SEQUENCER_345 0x3159#define WM8996_WRITE_SEQUENCER_346 0x315A#define WM8996_WRITE_SEQUENCER_347 0x315B#define WM8996_WRITE_SEQUENCER_348 0x315C#define WM8996_WRITE_SEQUENCER_349 0x315D#define WM8996_WRITE_SEQUENCER_350 0x315E#define WM8996_WRITE_SEQUENCER_351 0x315F#define WM8996_WRITE_SEQUENCER_352 0x3160#define WM8996_WRITE_SEQUENCER_353 0x3161#define WM8996_WRITE_SEQUENCER_354 0x3162#define WM8996_WRITE_SEQUENCER_355 0x3163#define WM8996_WRITE_SEQUENCER_356 0x3164#define WM8996_WRITE_SEQUENCER_357 0x3165#define WM8996_WRITE_SEQUENCER_358 0x3166#define WM8996_WRITE_SEQUENCER_359 0x3167#define WM8996_WRITE_SEQUENCER_360 0x3168#define WM8996_WRITE_SEQUENCER_361 0x3169#define WM8996_WRITE_SEQUENCER_362 0x316A#define WM8996_WRITE_SEQUENCER_363 0x316B#define WM8996_WRITE_SEQUENCER_364 0x316C#define WM8996_WRITE_SEQUENCER_365 0x316D#define WM8996_WRITE_SEQUENCER_366 0x316E#define WM8996_WRITE_SEQUENCER_367 0x316F#define WM8996_WRITE_SEQUENCER_368 0x3170#define WM8996_WRITE_SEQUENCER_369 0x3171#define WM8996_WRITE_SEQUENCER_370 0x3172#define WM8996_WRITE_SEQUENCER_371 0x3173#define WM8996_WRITE_SEQUENCER_372 0x3174#define WM8996_WRITE_SEQUENCER_373 0x3175#define WM8996_WRITE_SEQUENCER_374 0x3176#define WM8996_WRITE_SEQUENCER_375 0x3177#define WM8996_WRITE_SEQUENCER_376 0x3178#define WM8996_WRITE_SEQUENCER_377 0x3179#define WM8996_WRITE_SEQUENCER_378 0x317A#define WM8996_WRITE_SEQUENCER_379 0x317B#define WM8996_WRITE_SEQUENCER_380 0x317C#define WM8996_WRITE_SEQUENCER_381 0x317D#define WM8996_WRITE_SEQUENCER_382 0x317E#define WM8996_WRITE_SEQUENCER_383 0x317F#define WM8996_WRITE_SEQUENCER_384 0x3180#define WM8996_WRITE_SEQUENCER_385 0x3181#define WM8996_WRITE_SEQUENCER_386 0x3182#define WM8996_WRITE_SEQUENCER_387 0x3183#define WM8996_WRITE_SEQUENCER_388 0x3184#define WM8996_WRITE_SEQUENCER_389 0x3185#define WM8996_WRITE_SEQUENCER_390 0x3186#define WM8996_WRITE_SEQUENCER_391 0x3187#define WM8996_WRITE_SEQUENCER_392 0x3188#define WM8996_WRITE_SEQUENCER_393 0x3189#define WM8996_WRITE_SEQUENCER_394 0x318A#define WM8996_WRITE_SEQUENCER_395 0x318B#define WM8996_WRITE_SEQUENCER_396 0x318C#define WM8996_WRITE_SEQUENCER_397 0x318D#define WM8996_WRITE_SEQUENCER_398 0x318E#define WM8996_WRITE_SEQUENCER_399 0x318F#define WM8996_WRITE_SEQUENCER_400 0x3190#define WM8996_WRITE_SEQUENCER_401 0x3191#define WM8996_WRITE_SEQUENCER_402 0x3192#define WM8996_WRITE_SEQUENCER_403 0x3193#define WM8996_WRITE_SEQUENCER_404 0x3194#define WM8996_WRITE_SEQUENCER_405 0x3195#define WM8996_WRITE_SEQUENCER_406 0x3196#define WM8996_WRITE_SEQUENCER_407 0x3197#define WM8996_WRITE_SEQUENCER_408 0x3198#define WM8996_WRITE_SEQUENCER_409 0x3199#define WM8996_WRITE_SEQUENCER_410 0x319A#define WM8996_WRITE_SEQUENCER_411 0x319B#define WM8996_WRITE_SEQUENCER_412 0x319C#define WM8996_WRITE_SEQUENCER_413 0x319D#define WM8996_WRITE_SEQUENCER_414 0x319E#define WM8996_WRITE_SEQUENCER_415 0x319F#define WM8996_WRITE_SEQUENCER_416 0x31A0#define WM8996_WRITE_SEQUENCER_417 0x31A1#define WM8996_WRITE_SEQUENCER_418 0x31A2#define WM8996_WRITE_SEQUENCER_419 0x31A3#define WM8996_WRITE_SEQUENCER_420 0x31A4#define WM8996_WRITE_SEQUENCER_421 0x31A5#define WM8996_WRITE_SEQUENCER_422 0x31A6#define WM8996_WRITE_SEQUENCER_423 0x31A7#define WM8996_WRITE_SEQUENCER_424 0x31A8#define WM8996_WRITE_SEQUENCER_425 0x31A9#define WM8996_WRITE_SEQUENCER_426 0x31AA#define WM8996_WRITE_SEQUENCER_427 0x31AB#define WM8996_WRITE_SEQUENCER_428 0x31AC#define WM8996_WRITE_SEQUENCER_429 0x31AD#define WM8996_WRITE_SEQUENCER_430 0x31AE#define WM8996_WRITE_SEQUENCER_431 0x31AF#define WM8996_WRITE_SEQUENCER_432 0x31B0#define WM8996_WRITE_SEQUENCER_433 0x31B1#define WM8996_WRITE_SEQUENCER_434 0x31B2#define WM8996_WRITE_SEQUENCER_435 0x31B3#define WM8996_WRITE_SEQUENCER_436 0x31B4#define WM8996_WRITE_SEQUENCER_437 0x31B5#define WM8996_WRITE_SEQUENCER_438 0x31B6#define WM8996_WRITE_SEQUENCER_439 0x31B7#define WM8996_WRITE_SEQUENCER_440 0x31B8#define WM8996_WRITE_SEQUENCER_441 0x31B9#define WM8996_WRITE_SEQUENCER_442 0x31BA#define WM8996_WRITE_SEQUENCER_443 0x31BB#define WM8996_WRITE_SEQUENCER_444 0x31BC#define WM8996_WRITE_SEQUENCER_445 0x31BD#define WM8996_WRITE_SEQUENCER_446 0x31BE#define WM8996_WRITE_SEQUENCER_447 0x31BF#define WM8996_WRITE_SEQUENCER_448 0x31C0#define WM8996_WRITE_SEQUENCER_449 0x31C1#define WM8996_WRITE_SEQUENCER_450 0x31C2#define WM8996_WRITE_SEQUENCER_451 0x31C3#define WM8996_WRITE_SEQUENCER_452 0x31C4#define WM8996_WRITE_SEQUENCER_453 0x31C5#define WM8996_WRITE_SEQUENCER_454 0x31C6#define WM8996_WRITE_SEQUENCER_455 0x31C7#define WM8996_WRITE_SEQUENCER_456 0x31C8#define WM8996_WRITE_SEQUENCER_457 0x31C9#define WM8996_WRITE_SEQUENCER_458 0x31CA#define WM8996_WRITE_SEQUENCER_459 0x31CB#define WM8996_WRITE_SEQUENCER_460 0x31CC#define WM8996_WRITE_SEQUENCER_461 0x31CD#define WM8996_WRITE_SEQUENCER_462 0x31CE#define WM8996_WRITE_SEQUENCER_463 0x31CF#define WM8996_WRITE_SEQUENCER_464 0x31D0#define WM8996_WRITE_SEQUENCER_465 0x31D1#define WM8996_WRITE_SEQUENCER_466 0x31D2#define WM8996_WRITE_SEQUENCER_467 0x31D3#define WM8996_WRITE_SEQUENCER_468 0x31D4#define WM8996_WRITE_SEQUENCER_469 0x31D5#define WM8996_WRITE_SEQUENCER_470 0x31D6#define WM8996_WRITE_SEQUENCER_471 0x31D7#define WM8996_WRITE_SEQUENCER_472 0x31D8#define WM8996_WRITE_SEQUENCER_473 0x31D9#define WM8996_WRITE_SEQUENCER_474 0x31DA#define WM8996_WRITE_SEQUENCER_475 0x31DB#define WM8996_WRITE_SEQUENCER_476 0x31DC#define WM8996_WRITE_SEQUENCER_477 0x31DD#define WM8996_WRITE_SEQUENCER_478 0x31DE#define WM8996_WRITE_SEQUENCER_479 0x31DF#define WM8996_WRITE_SEQUENCER_480 0x31E0#define WM8996_WRITE_SEQUENCER_481 0x31E1#define WM8996_WRITE_SEQUENCER_482 0x31E2#define WM8996_WRITE_SEQUENCER_483 0x31E3#define WM8996_WRITE_SEQUENCER_484 0x31E4#define WM8996_WRITE_SEQUENCER_485 0x31E5#define WM8996_WRITE_SEQUENCER_486 0x31E6#define WM8996_WRITE_SEQUENCER_487 0x31E7#define WM8996_WRITE_SEQUENCER_488 0x31E8#define WM8996_WRITE_SEQUENCER_489 0x31E9#define WM8996_WRITE_SEQUENCER_490 0x31EA#define WM8996_WRITE_SEQUENCER_491 0x31EB#define WM8996_WRITE_SEQUENCER_492 0x31EC#define WM8996_WRITE_SEQUENCER_493 0x31ED#define WM8996_WRITE_SEQUENCER_494 0x31EE#define WM8996_WRITE_SEQUENCER_495 0x31EF#define WM8996_WRITE_SEQUENCER_496 0x31F0#define WM8996_WRITE_SEQUENCER_497 0x31F1#define WM8996_WRITE_SEQUENCER_498 0x31F2#define WM8996_WRITE_SEQUENCER_499 0x31F3#define WM8996_WRITE_SEQUENCER_500 0x31F4#define WM8996_WRITE_SEQUENCER_501 0x31F5#define WM8996_WRITE_SEQUENCER_502 0x31F6#define WM8996_WRITE_SEQUENCER_503 0x31F7#define WM8996_WRITE_SEQUENCER_504 0x31F8#define WM8996_WRITE_SEQUENCER_505 0x31F9#define WM8996_WRITE_SEQUENCER_506 0x31FA#define WM8996_WRITE_SEQUENCER_507 0x31FB#define WM8996_WRITE_SEQUENCER_508 0x31FC#define WM8996_WRITE_SEQUENCER_509 0x31FD#define WM8996_WRITE_SEQUENCER_510 0x31FE#define WM8996_WRITE_SEQUENCER_511 0x31FF#define WM8996_REGISTER_COUNT 706#define WM8996_MAX_REGISTER 0x31FF/* * Field Definitions. /* * R0 (0x00) - Software Reset #define WM8996_SW_RESET_MASK 0xFFFF /* SW_RESET - [15:0] */ #define WM8996_SW_RESET_SHIFT 0 /* SW_RESET - [15:0] */ #define WM8996_SW_RESET_WIDTH 16 /* SW_RESET - [15:0] */ /* * R1 (0x01) - Power Management (1) #define WM8996_MICB2_ENA 0x0200 /* MICB2_ENA */ #define WM8996_MICB2_ENA_MASK 0x0200 /* MICB2_ENA */ #define WM8996_MICB2_ENA_SHIFT 9 /* MICB2_ENA */ #define WM8996_MICB2_ENA_WIDTH 1 /* MICB2_ENA */ #define WM8996_MICB1_ENA 0x0100 /* MICB1_ENA */ #define WM8996_MICB1_ENA_MASK 0x0100 /* MICB1_ENA */ #define WM8996_MICB1_ENA_SHIFT 8 /* MICB1_ENA */ #define WM8996_MICB1_ENA_WIDTH 1 /* MICB1_ENA */ #define WM8996_HPOUT2L_ENA 0x0080 /* HPOUT2L_ENA */ #define WM8996_HPOUT2L_ENA_MASK 0x0080 /* HPOUT2L_ENA */ #define WM8996_HPOUT2L_ENA_SHIFT 7 /* HPOUT2L_ENA */ #define WM8996_HPOUT2L_ENA_WIDTH 1 /* HPOUT2L_ENA */ #define WM8996_HPOUT2R_ENA 0x0040 /* HPOUT2R_ENA */ #define WM8996_HPOUT2R_ENA_MASK 0x0040 /* HPOUT2R_ENA */ #define WM8996_HPOUT2R_ENA_SHIFT 6 /* HPOUT2R_ENA */ #define WM8996_HPOUT2R_ENA_WIDTH 1 /* HPOUT2R_ENA */ #define WM8996_HPOUT1L_ENA 0x0020 /* HPOUT1L_ENA */ #define WM8996_HPOUT1L_ENA_MASK 0x0020 /* HPOUT1L_ENA */ #define WM8996_HPOUT1L_ENA_SHIFT 5 /* HPOUT1L_ENA */ #define WM8996_HPOUT1L_ENA_WIDTH 1 /* HPOUT1L_ENA */ #define WM8996_HPOUT1R_ENA 0x0010 /* HPOUT1R_ENA */ #define WM8996_HPOUT1R_ENA_MASK 0x0010 /* HPOUT1R_ENA */ #define WM8996_HPOUT1R_ENA_SHIFT 4 /* HPOUT1R_ENA */ #define WM8996_HPOUT1R_ENA_WIDTH 1 /* HPOUT1R_ENA */ #define WM8996_BG_ENA 0x0001 /* BG_ENA */ #define WM8996_BG_ENA_MASK 0x0001 /* BG_ENA */ #define WM8996_BG_ENA_SHIFT 0 /* BG_ENA */ #define WM8996_BG_ENA_WIDTH 1 /* BG_ENA */ /* * R2 (0x02) - Power Management (2) #define WM8996_OPCLK_ENA 0x0800 /* OPCLK_ENA */ #define WM8996_OPCLK_ENA_MASK 0x0800 /* OPCLK_ENA */ #define WM8996_OPCLK_ENA_SHIFT 11 /* OPCLK_ENA */ #define WM8996_OPCLK_ENA_WIDTH 1 /* OPCLK_ENA */ #define WM8996_INL_ENA 0x0020 /* INL_ENA */ #define WM8996_INL_ENA_MASK 0x0020 /* INL_ENA */ #define WM8996_INL_ENA_SHIFT 5 /* INL_ENA */ #define WM8996_INL_ENA_WIDTH 1 /* INL_ENA */ #define WM8996_INR_ENA 0x0010 /* INR_ENA */ #define WM8996_INR_ENA_MASK 0x0010 /* INR_ENA */ #define WM8996_INR_ENA_SHIFT 4 /* INR_ENA */ #define WM8996_INR_ENA_WIDTH 1 /* INR_ENA */ #define WM8996_LDO2_ENA 0x0002 /* LDO2_ENA */ #define WM8996_LDO2_ENA_MASK 0x0002 /* LDO2_ENA */ #define WM8996_LDO2_ENA_SHIFT 1 /* LDO2_ENA */ #define WM8996_LDO2_ENA_WIDTH 1 /* LDO2_ENA */ /* * R3 (0x03) - Power Management (3) #define WM8996_DSP2RXL_ENA 0x0800 /* DSP2RXL_ENA */ #define WM8996_DSP2RXL_ENA_MASK 0x0800 /* DSP2RXL_ENA */ #define WM8996_DSP2RXL_ENA_SHIFT 11 /* DSP2RXL_ENA */ #define WM8996_DSP2RXL_ENA_WIDTH 1 /* DSP2RXL_ENA */ #define WM8996_DSP2RXR_ENA 0x0400 /* DSP2RXR_ENA */ #define WM8996_DSP2RXR_ENA_MASK 0x0400 /* DSP2RXR_ENA */ #define WM8996_DSP2RXR_ENA_SHIFT 10 /* DSP2RXR_ENA */ #define WM8996_DSP2RXR_ENA_WIDTH 1 /* DSP2RXR_ENA */ #define WM8996_DSP1RXL_ENA 0x0200 /* DSP1RXL_ENA */ #define WM8996_DSP1RXL_ENA_MASK 0x0200 /* DSP1RXL_ENA */ #define WM8996_DSP1RXL_ENA_SHIFT 9 /* DSP1RXL_ENA */ #define WM8996_DSP1RXL_ENA_WIDTH 1 /* DSP1RXL_ENA */ #define WM8996_DSP1RXR_ENA 0x0100 /* DSP1RXR_ENA */ #define WM8996_DSP1RXR_ENA_MASK 0x0100 /* DSP1RXR_ENA */ #define WM8996_DSP1RXR_ENA_SHIFT 8 /* DSP1RXR_ENA */ #define WM8996_DSP1RXR_ENA_WIDTH 1 /* DSP1RXR_ENA */ #define WM8996_DMIC2L_ENA 0x0020 /* DMIC2L_ENA */ #define WM8996_DMIC2L_ENA_MASK 0x0020 /* DMIC2L_ENA */ #define WM8996_DMIC2L_ENA_SHIFT 5 /* DMIC2L_ENA */ #define WM8996_DMIC2L_ENA_WIDTH 1 /* DMIC2L_ENA */ #define WM8996_DMIC2R_ENA 0x0010 /* DMIC2R_ENA */ #define WM8996_DMIC2R_ENA_MASK 0x0010 /* DMIC2R_ENA */ #define WM8996_DMIC2R_ENA_SHIFT 4 /* DMIC2R_ENA */ #define WM8996_DMIC2R_ENA_WIDTH 1 /* DMIC2R_ENA */ #define WM8996_DMIC1L_ENA 0x0008 /* DMIC1L_ENA */ #define WM8996_DMIC1L_ENA_MASK 0x0008 /* DMIC1L_ENA */ #define WM8996_DMIC1L_ENA_SHIFT 3 /* DMIC1L_ENA */ #define WM8996_DMIC1L_ENA_WIDTH 1 /* DMIC1L_ENA */ #define WM8996_DMIC1R_ENA 0x0004 /* DMIC1R_ENA */ #define WM8996_DMIC1R_ENA_MASK 0x0004 /* DMIC1R_ENA */ #define WM8996_DMIC1R_ENA_SHIFT 2 /* DMIC1R_ENA */ #define WM8996_DMIC1R_ENA_WIDTH 1 /* DMIC1R_ENA */ #define WM8996_ADCL_ENA 0x0002 /* ADCL_ENA */ #define WM8996_ADCL_ENA_MASK 0x0002 /* ADCL_ENA */ #define WM8996_ADCL_ENA_SHIFT 1 /* ADCL_ENA */ #define WM8996_ADCL_ENA_WIDTH 1 /* ADCL_ENA */ #define WM8996_ADCR_ENA 0x0001 /* ADCR_ENA */ #define WM8996_ADCR_ENA_MASK 0x0001 /* ADCR_ENA */ #define WM8996_ADCR_ENA_SHIFT 0 /* ADCR_ENA */ #define WM8996_ADCR_ENA_WIDTH 1 /* ADCR_ENA */ /* * R4 (0x04) - Power Management (4) #define WM8996_AIF2RX_CHAN1_ENA 0x0200 /* AIF2RX_CHAN1_ENA */ #define WM8996_AIF2RX_CHAN1_ENA_MASK 0x0200 /* AIF2RX_CHAN1_ENA */ #define WM8996_AIF2RX_CHAN1_ENA_SHIFT 9 /* AIF2RX_CHAN1_ENA */ #define WM8996_AIF2RX_CHAN1_ENA_WIDTH 1 /* AIF2RX_CHAN1_ENA */ #define WM8996_AIF2RX_CHAN0_ENA 0x0100 /* AIF2RX_CHAN0_ENA */ #define WM8996_AIF2RX_CHAN0_ENA_MASK 0x0100 /* AIF2RX_CHAN0_ENA */ #define WM8996_AIF2RX_CHAN0_ENA_SHIFT 8 /* AIF2RX_CHAN0_ENA */ #define WM8996_AIF2RX_CHAN0_ENA_WIDTH 1 /* AIF2RX_CHAN0_ENA */ #define WM8996_AIF1RX_CHAN5_ENA 0x0020 /* AIF1RX_CHAN5_ENA */ #define WM8996_AIF1RX_CHAN5_ENA_MASK 0x0020 /* AIF1RX_CHAN5_ENA */ #define WM8996_AIF1RX_CHAN5_ENA_SHIFT 5 /* AIF1RX_CHAN5_ENA */ #define WM8996_AIF1RX_CHAN5_ENA_WIDTH 1 /* AIF1RX_CHAN5_ENA */ #define WM8996_AIF1RX_CHAN4_ENA 0x0010 /* AIF1RX_CHAN4_ENA */ #define WM8996_AIF1RX_CHAN4_ENA_MASK 0x0010 /* AIF1RX_CHAN4_ENA */ #define WM8996_AIF1RX_CHAN4_ENA_SHIFT 4 /* AIF1RX_CHAN4_ENA */ #define WM8996_AIF1RX_CHAN4_ENA_WIDTH 1 /* AIF1RX_CHAN4_ENA */ #define WM8996_AIF1RX_CHAN3_ENA 0x0008 /* AIF1RX_CHAN3_ENA */ #define WM8996_AIF1RX_CHAN3_ENA_MASK 0x0008 /* AIF1RX_CHAN3_ENA */ #define WM8996_AIF1RX_CHAN3_ENA_SHIFT 3 /* AIF1RX_CHAN3_ENA */ #define WM8996_AIF1RX_CHAN3_ENA_WIDTH 1 /* AIF1RX_CHAN3_ENA */ #define WM8996_AIF1RX_CHAN2_ENA 0x0004 /* AIF1RX_CHAN2_ENA */ #define WM8996_AIF1RX_CHAN2_ENA_MASK 0x0004 /* AIF1RX_CHAN2_ENA */ #define WM8996_AIF1RX_CHAN2_ENA_SHIFT 2 /* AIF1RX_CHAN2_ENA */ #define WM8996_AIF1RX_CHAN2_ENA_WIDTH 1 /* AIF1RX_CHAN2_ENA */ #define WM8996_AIF1RX_CHAN1_ENA 0x0002 /* AIF1RX_CHAN1_ENA */ #define WM8996_AIF1RX_CHAN1_ENA_MASK 0x0002 /* AIF1RX_CHAN1_ENA */ #define WM8996_AIF1RX_CHAN1_ENA_SHIFT 1 /* AIF1RX_CHAN1_ENA */ #define WM8996_AIF1RX_CHAN1_ENA_WIDTH 1 /* AIF1RX_CHAN1_ENA */ #define WM8996_AIF1RX_CHAN0_ENA 0x0001 /* AIF1RX_CHAN0_ENA */ #define WM8996_AIF1RX_CHAN0_ENA_MASK 0x0001 /* AIF1RX_CHAN0_ENA */ #define WM8996_AIF1RX_CHAN0_ENA_SHIFT 0 /* AIF1RX_CHAN0_ENA */ #define WM8996_AIF1RX_CHAN0_ENA_WIDTH 1 /* AIF1RX_CHAN0_ENA */ /* * R5 (0x05) - Power Management (5) #define WM8996_DSP2TXL_ENA 0x0800 /* DSP2TXL_ENA */ #define WM8996_DSP2TXL_ENA_MASK 0x0800 /* DSP2TXL_ENA */ #define WM8996_DSP2TXL_ENA_SHIFT 11 /* DSP2TXL_ENA */ #define WM8996_DSP2TXL_ENA_WIDTH 1 /* DSP2TXL_ENA */ #define WM8996_DSP2TXR_ENA 0x0400 /* DSP2TXR_ENA */ #define WM8996_DSP2TXR_ENA_MASK 0x0400 /* DSP2TXR_ENA */ #define WM8996_DSP2TXR_ENA_SHIFT 10 /* DSP2TXR_ENA */ #define WM8996_DSP2TXR_ENA_WIDTH 1 /* DSP2TXR_ENA */ #define WM8996_DSP1TXL_ENA 0x0200 /* DSP1TXL_ENA */ #define WM8996_DSP1TXL_ENA_MASK 0x0200 /* DSP1TXL_ENA */ #define WM8996_DSP1TXL_ENA_SHIFT 9 /* DSP1TXL_ENA */ #define WM8996_DSP1TXL_ENA_WIDTH 1 /* DSP1TXL_ENA */ #define WM8996_DSP1TXR_ENA 0x0100 /* DSP1TXR_ENA */ #define WM8996_DSP1TXR_ENA_MASK 0x0100 /* DSP1TXR_ENA */ #define WM8996_DSP1TXR_ENA_SHIFT 8 /* DSP1TXR_ENA */ #define WM8996_DSP1TXR_ENA_WIDTH 1 /* DSP1TXR_ENA */ #define WM8996_DAC2L_ENA 0x0008 /* DAC2L_ENA */ #define WM8996_DAC2L_ENA_MASK 0x0008 /* DAC2L_ENA */ #define WM8996_DAC2L_ENA_SHIFT 3 /* DAC2L_ENA */ #define WM8996_DAC2L_ENA_WIDTH 1 /* DAC2L_ENA */ #define WM8996_DAC2R_ENA 0x0004 /* DAC2R_ENA */ #define WM8996_DAC2R_ENA_MASK 0x0004 /* DAC2R_ENA */ #define WM8996_DAC2R_ENA_SHIFT 2 /* DAC2R_ENA */ #define WM8996_DAC2R_ENA_WIDTH 1 /* DAC2R_ENA */ #define WM8996_DAC1L_ENA 0x0002 /* DAC1L_ENA */ #define WM8996_DAC1L_ENA_MASK 0x0002 /* DAC1L_ENA */ #define WM8996_DAC1L_ENA_SHIFT 1 /* DAC1L_ENA */ #define WM8996_DAC1L_ENA_WIDTH 1 /* DAC1L_ENA */ #define WM8996_DAC1R_ENA 0x0001 /* DAC1R_ENA */ #define WM8996_DAC1R_ENA_MASK 0x0001 /* DAC1R_ENA */ #define WM8996_DAC1R_ENA_SHIFT 0 /* DAC1R_ENA */ #define WM8996_DAC1R_ENA_WIDTH 1 /* DAC1R_ENA */ /* * R6 (0x06) - Power Management (6) #define WM8996_AIF2TX_CHAN1_ENA 0x0200 /* AIF2TX_CHAN1_ENA */ #define WM8996_AIF2TX_CHAN1_ENA_MASK 0x0200 /* AIF2TX_CHAN1_ENA */ #define WM8996_AIF2TX_CHAN1_ENA_SHIFT 9 /* AIF2TX_CHAN1_ENA */ #define WM8996_AIF2TX_CHAN1_ENA_WIDTH 1 /* AIF2TX_CHAN1_ENA */ #define WM8996_AIF2TX_CHAN0_ENA 0x0100 /* AIF2TX_CHAN0_ENA */ #define WM8996_AIF2TX_CHAN0_ENA_MASK 0x0100 /* AIF2TX_CHAN0_ENA */ #define WM8996_AIF2TX_CHAN0_ENA_SHIFT 8 /* AIF2TX_CHAN0_ENA */ #define WM8996_AIF2TX_CHAN0_ENA_WIDTH 1 /* AIF2TX_CHAN0_ENA */ #define WM8996_AIF1TX_CHAN5_ENA 0x0020 /* AIF1TX_CHAN5_ENA */ #define WM8996_AIF1TX_CHAN5_ENA_MASK 0x0020 /* AIF1TX_CHAN5_ENA */ #define WM8996_AIF1TX_CHAN5_ENA_SHIFT 5 /* AIF1TX_CHAN5_ENA */ #define WM8996_AIF1TX_CHAN5_ENA_WIDTH 1 /* AIF1TX_CHAN5_ENA */ #define WM8996_AIF1TX_CHAN4_ENA 0x0010 /* AIF1TX_CHAN4_ENA */ #define WM8996_AIF1TX_CHAN4_ENA_MASK 0x0010 /* AIF1TX_CHAN4_ENA */ #define WM8996_AIF1TX_CHAN4_ENA_SHIFT 4 /* AIF1TX_CHAN4_ENA */ #define WM8996_AIF1TX_CHAN4_ENA_WIDTH 1 /* AIF1TX_CHAN4_ENA */ #define WM8996_AIF1TX_CHAN3_ENA 0x0008 /* AIF1TX_CHAN3_ENA */ #define WM8996_AIF1TX_CHAN3_ENA_MASK 0x0008 /* AIF1TX_CHAN3_ENA */ #define WM8996_AIF1TX_CHAN3_ENA_SHIFT 3 /* AIF1TX_CHAN3_ENA */ #define WM8996_AIF1TX_CHAN3_ENA_WIDTH 1 /* AIF1TX_CHAN3_ENA */ #define WM8996_AIF1TX_CHAN2_ENA 0x0004 /* AIF1TX_CHAN2_ENA */ #define WM8996_AIF1TX_CHAN2_ENA_MASK 0x0004 /* AIF1TX_CHAN2_ENA */ #define WM8996_AIF1TX_CHAN2_ENA_SHIFT 2 /* AIF1TX_CHAN2_ENA */ #define WM8996_AIF1TX_CHAN2_ENA_WIDTH 1 /* AIF1TX_CHAN2_ENA */ #define WM8996_AIF1TX_CHAN1_ENA 0x0002 /* AIF1TX_CHAN1_ENA */ #define WM8996_AIF1TX_CHAN1_ENA_MASK 0x0002 /* AIF1TX_CHAN1_ENA */ #define WM8996_AIF1TX_CHAN1_ENA_SHIFT 1 /* AIF1TX_CHAN1_ENA */ #define WM8996_AIF1TX_CHAN1_ENA_WIDTH 1 /* AIF1TX_CHAN1_ENA */ #define WM8996_AIF1TX_CHAN0_ENA 0x0001 /* AIF1TX_CHAN0_ENA */ #define WM8996_AIF1TX_CHAN0_ENA_MASK 0x0001 /* AIF1TX_CHAN0_ENA */ #define WM8996_AIF1TX_CHAN0_ENA_SHIFT 0 /* AIF1TX_CHAN0_ENA */ #define WM8996_AIF1TX_CHAN0_ENA_WIDTH 1 /* AIF1TX_CHAN0_ENA */ /* * R7 (0x07) - Power Management (7) #define WM8996_DMIC2_FN 0x0200 /* DMIC2_FN */ #define WM8996_DMIC2_FN_MASK 0x0200 /* DMIC2_FN */ #define WM8996_DMIC2_FN_SHIFT 9 /* DMIC2_FN */ #define WM8996_DMIC2_FN_WIDTH 1 /* DMIC2_FN */ #define WM8996_DMIC1_FN 0x0100 /* DMIC1_FN */ #define WM8996_DMIC1_FN_MASK 0x0100 /* DMIC1_FN */ #define WM8996_DMIC1_FN_SHIFT 8 /* DMIC1_FN */ #define WM8996_DMIC1_FN_WIDTH 1 /* DMIC1_FN */ #define WM8996_ADC_DMIC_DSP2R_ENA 0x0080 /* ADC_DMIC_DSP2R_ENA */ #define WM8996_ADC_DMIC_DSP2R_ENA_MASK 0x0080 /* ADC_DMIC_DSP2R_ENA */ #define WM8996_ADC_DMIC_DSP2R_ENA_SHIFT 7 /* ADC_DMIC_DSP2R_ENA */ #define WM8996_ADC_DMIC_DSP2R_ENA_WIDTH 1 /* ADC_DMIC_DSP2R_ENA */ #define WM8996_ADC_DMIC_DSP2L_ENA 0x0040 /* ADC_DMIC_DSP2L_ENA */ #define WM8996_ADC_DMIC_DSP2L_ENA_MASK 0x0040 /* ADC_DMIC_DSP2L_ENA */ #define WM8996_ADC_DMIC_DSP2L_ENA_SHIFT 6 /* ADC_DMIC_DSP2L_ENA */ #define WM8996_ADC_DMIC_DSP2L_ENA_WIDTH 1 /* ADC_DMIC_DSP2L_ENA */ #define WM8996_ADC_DMIC_SRC2_MASK 0x0030 /* ADC_DMIC_SRC2 - [5:4] */ #define WM8996_ADC_DMIC_SRC2_SHIFT 4 /* ADC_DMIC_SRC2 - [5:4] */ #define WM8996_ADC_DMIC_SRC2_WIDTH 2 /* ADC_DMIC_SRC2 - [5:4] */ #define WM8996_ADC_DMIC_DSP1R_ENA 0x0008 /* ADC_DMIC_DSP1R_ENA */ #define WM8996_ADC_DMIC_DSP1R_ENA_MASK 0x0008 /* ADC_DMIC_DSP1R_ENA */ #define WM8996_ADC_DMIC_DSP1R_ENA_SHIFT 3 /* ADC_DMIC_DSP1R_ENA */ #define WM8996_ADC_DMIC_DSP1R_ENA_WIDTH 1 /* ADC_DMIC_DSP1R_ENA */ #define WM8996_ADC_DMIC_DSP1L_ENA 0x0004 /* ADC_DMIC_DSP1L_ENA */ #define WM8996_ADC_DMIC_DSP1L_ENA_MASK 0x0004 /* ADC_DMIC_DSP1L_ENA */ #define WM8996_ADC_DMIC_DSP1L_ENA_SHIFT 2 /* ADC_DMIC_DSP1L_ENA */ #define WM8996_ADC_DMIC_DSP1L_ENA_WIDTH 1 /* ADC_DMIC_DSP1L_ENA */ #define WM8996_ADC_DMIC_SRC1_MASK 0x0003 /* ADC_DMIC_SRC1 - [1:0] */ #define WM8996_ADC_DMIC_SRC1_SHIFT 0 /* ADC_DMIC_SRC1 - [1:0] */ #define WM8996_ADC_DMIC_SRC1_WIDTH 2 /* ADC_DMIC_SRC1 - [1:0] */ /* * R8 (0x08) - Power Management (8) #define WM8996_AIF2TX_SRC_MASK 0x00C0 /* AIF2TX_SRC - [7:6] */ #define WM8996_AIF2TX_SRC_SHIFT 6 /* AIF2TX_SRC - [7:6] */ #define WM8996_AIF2TX_SRC_WIDTH 2 /* AIF2TX_SRC - [7:6] */ #define WM8996_DSP2RX_SRC 0x0010 /* DSP2RX_SRC */ #define WM8996_DSP2RX_SRC_MASK 0x0010 /* DSP2RX_SRC */ #define WM8996_DSP2RX_SRC_SHIFT 4 /* DSP2RX_SRC */ #define WM8996_DSP2RX_SRC_WIDTH 1 /* DSP2RX_SRC */ #define WM8996_DSP1RX_SRC 0x0001 /* DSP1RX_SRC */ #define WM8996_DSP1RX_SRC_MASK 0x0001 /* DSP1RX_SRC */ #define WM8996_DSP1RX_SRC_SHIFT 0 /* DSP1RX_SRC */ #define WM8996_DSP1RX_SRC_WIDTH 1 /* DSP1RX_SRC */ /* * R16 (0x10) - Left Line Input Volume #define WM8996_IN1_VU 0x0080 /* IN1_VU */ #define WM8996_IN1_VU_MASK 0x0080 /* IN1_VU */ #define WM8996_IN1_VU_SHIFT 7 /* IN1_VU */ #define WM8996_IN1_VU_WIDTH 1 /* IN1_VU */ #define WM8996_IN1L_ZC 0x0020 /* IN1L_ZC */ #define WM8996_IN1L_ZC_MASK 0x0020 /* IN1L_ZC */ #define WM8996_IN1L_ZC_SHIFT 5 /* IN1L_ZC */ #define WM8996_IN1L_ZC_WIDTH 1 /* IN1L_ZC */ #define WM8996_IN1L_VOL_MASK 0x001F /* IN1L_VOL - [4:0] */ #define WM8996_IN1L_VOL_SHIFT 0 /* IN1L_VOL - [4:0] */ #define WM8996_IN1L_VOL_WIDTH 5 /* IN1L_VOL - [4:0] */ /* * R17 (0x11) - Right Line Input Volume #define WM8996_IN1_VU 0x0080 /* IN1_VU */ #define WM8996_IN1_VU_MASK 0x0080 /* IN1_VU */ #define WM8996_IN1_VU_SHIFT 7 /* IN1_VU */ #define WM8996_IN1_VU_WIDTH 1 /* IN1_VU */ #define WM8996_IN1R_ZC 0x0020 /* IN1R_ZC */ #define WM8996_IN1R_ZC_MASK 0x0020 /* IN1R_ZC */ #define WM8996_IN1R_ZC_SHIFT 5 /* IN1R_ZC */ #define WM8996_IN1R_ZC_WIDTH 1 /* IN1R_ZC */ #define WM8996_IN1R_VOL_MASK 0x001F /* IN1R_VOL - [4:0] */ #define WM8996_IN1R_VOL_SHIFT 0 /* IN1R_VOL - [4:0] */ #define WM8996_IN1R_VOL_WIDTH 5 /* IN1R_VOL - [4:0] */ /* * R18 (0x12) - Line Input Control #define WM8996_INL_MODE_MASK 0x000C /* INL_MODE - [3:2] */ #define WM8996_INL_MODE_SHIFT 2 /* INL_MODE - [3:2] */ #define WM8996_INL_MODE_WIDTH 2 /* INL_MODE - [3:2] */ #define WM8996_INR_MODE_MASK 0x0003 /* INR_MODE - [1:0] */ #define WM8996_INR_MODE_SHIFT 0 /* INR_MODE - [1:0] */ #define WM8996_INR_MODE_WIDTH 2 /* INR_MODE - [1:0] */ /* * R21 (0x15) - DAC1 HPOUT1 Volume #define WM8996_DAC1R_HPOUT1R_VOL_MASK 0x00F0 /* DAC1R_HPOUT1R_VOL - [7:4] */ #define WM8996_DAC1R_HPOUT1R_VOL_SHIFT 4 /* DAC1R_HPOUT1R_VOL - [7:4] */ #define WM8996_DAC1R_HPOUT1R_VOL_WIDTH 4 /* DAC1R_HPOUT1R_VOL - [7:4] */ #define WM8996_DAC1L_HPOUT1L_VOL_MASK 0x000F /* DAC1L_HPOUT1L_VOL - [3:0] */ #define WM8996_DAC1L_HPOUT1L_VOL_SHIFT 0 /* DAC1L_HPOUT1L_VOL - [3:0] */ #define WM8996_DAC1L_HPOUT1L_VOL_WIDTH 4 /* DAC1L_HPOUT1L_VOL - [3:0] */ /* * R22 (0x16) - DAC2 HPOUT2 Volume #define WM8996_DAC2R_HPOUT2R_VOL_MASK 0x00F0 /* DAC2R_HPOUT2R_VOL - [7:4] */ #define WM8996_DAC2R_HPOUT2R_VOL_SHIFT 4 /* DAC2R_HPOUT2R_VOL - [7:4] */ #define WM8996_DAC2R_HPOUT2R_VOL_WIDTH 4 /* DAC2R_HPOUT2R_VOL - [7:4] */ #define WM8996_DAC2L_HPOUT2L_VOL_MASK 0x000F /* DAC2L_HPOUT2L_VOL - [3:0] */ #define WM8996_DAC2L_HPOUT2L_VOL_SHIFT 0 /* DAC2L_HPOUT2L_VOL - [3:0] */ #define WM8996_DAC2L_HPOUT2L_VOL_WIDTH 4 /* DAC2L_HPOUT2L_VOL - [3:0] */ /* * R24 (0x18) - DAC1 Left Volume #define WM8996_DAC1L_MUTE 0x0200 /* DAC1L_MUTE */ #define WM8996_DAC1L_MUTE_MASK 0x0200 /* DAC1L_MUTE */ #define WM8996_DAC1L_MUTE_SHIFT 9 /* DAC1L_MUTE */ #define WM8996_DAC1L_MUTE_WIDTH 1 /* DAC1L_MUTE */ #define WM8996_DAC1_VU 0x0100 /* DAC1_VU */ #define WM8996_DAC1_VU_MASK 0x0100 /* DAC1_VU */ #define WM8996_DAC1_VU_SHIFT 8 /* DAC1_VU */ #define WM8996_DAC1_VU_WIDTH 1 /* DAC1_VU */ #define WM8996_DAC1L_VOL_MASK 0x00FF /* DAC1L_VOL - [7:0] */ #define WM8996_DAC1L_VOL_SHIFT 0 /* DAC1L_VOL - [7:0] */ #define WM8996_DAC1L_VOL_WIDTH 8 /* DAC1L_VOL - [7:0] */ /* * R25 (0x19) - DAC1 Right Volume #define WM8996_DAC1R_MUTE 0x0200 /* DAC1R_MUTE */ #define WM8996_DAC1R_MUTE_MASK 0x0200 /* DAC1R_MUTE */ #define WM8996_DAC1R_MUTE_SHIFT 9 /* DAC1R_MUTE */ #define WM8996_DAC1R_MUTE_WIDTH 1 /* DAC1R_MUTE */ #define WM8996_DAC1_VU 0x0100 /* DAC1_VU */ #define WM8996_DAC1_VU_MASK 0x0100 /* DAC1_VU */ #define WM8996_DAC1_VU_SHIFT 8 /* DAC1_VU */ #define WM8996_DAC1_VU_WIDTH 1 /* DAC1_VU */ #define WM8996_DAC1R_VOL_MASK 0x00FF /* DAC1R_VOL - [7:0] */ #define WM8996_DAC1R_VOL_SHIFT 0 /* DAC1R_VOL - [7:0] */ #define WM8996_DAC1R_VOL_WIDTH 8 /* DAC1R_VOL - [7:0] */ /* * R26 (0x1A) - DAC2 Left Volume #define WM8996_DAC2L_MUTE 0x0200 /* DAC2L_MUTE */ #define WM8996_DAC2L_MUTE_MASK 0x0200 /* DAC2L_MUTE */ #define WM8996_DAC2L_MUTE_SHIFT 9 /* DAC2L_MUTE */ #define WM8996_DAC2L_MUTE_WIDTH 1 /* DAC2L_MUTE */ #define WM8996_DAC2_VU 0x0100 /* DAC2_VU */ #define WM8996_DAC2_VU_MASK 0x0100 /* DAC2_VU */ #define WM8996_DAC2_VU_SHIFT 8 /* DAC2_VU */ #define WM8996_DAC2_VU_WIDTH 1 /* DAC2_VU */ #define WM8996_DAC2L_VOL_MASK 0x00FF /* DAC2L_VOL - [7:0] */ #define WM8996_DAC2L_VOL_SHIFT 0 /* DAC2L_VOL - [7:0] */ #define WM8996_DAC2L_VOL_WIDTH 8 /* DAC2L_VOL - [7:0] */ /* * R27 (0x1B) - DAC2 Right Volume #define WM8996_DAC2R_MUTE 0x0200 /* DAC2R_MUTE */ #define WM8996_DAC2R_MUTE_MASK 0x0200 /* DAC2R_MUTE */ #define WM8996_DAC2R_MUTE_SHIFT 9 /* DAC2R_MUTE */ #define WM8996_DAC2R_MUTE_WIDTH 1 /* DAC2R_MUTE */ #define WM8996_DAC2_VU 0x0100 /* DAC2_VU */ #define WM8996_DAC2_VU_MASK 0x0100 /* DAC2_VU */ #define WM8996_DAC2_VU_SHIFT 8 /* DAC2_VU */ #define WM8996_DAC2_VU_WIDTH 1 /* DAC2_VU */ #define WM8996_DAC2R_VOL_MASK 0x00FF /* DAC2R_VOL - [7:0] */ #define WM8996_DAC2R_VOL_SHIFT 0 /* DAC2R_VOL - [7:0] */ #define WM8996_DAC2R_VOL_WIDTH 8 /* DAC2R_VOL - [7:0] */ /* * R28 (0x1C) - Output1 Left Volume #define WM8996_DAC1_VU 0x0100 /* DAC1_VU */ #define WM8996_DAC1_VU_MASK 0x0100 /* DAC1_VU */ #define WM8996_DAC1_VU_SHIFT 8 /* DAC1_VU */ #define WM8996_DAC1_VU_WIDTH 1 /* DAC1_VU */ #define WM8996_HPOUT1L_ZC 0x0080 /* HPOUT1L_ZC */ #define WM8996_HPOUT1L_ZC_MASK 0x0080 /* HPOUT1L_ZC */ #define WM8996_HPOUT1L_ZC_SHIFT 7 /* HPOUT1L_ZC */ #define WM8996_HPOUT1L_ZC_WIDTH 1 /* HPOUT1L_ZC */ #define WM8996_HPOUT1L_VOL_MASK 0x000F /* HPOUT1L_VOL - [3:0] */ #define WM8996_HPOUT1L_VOL_SHIFT 0 /* HPOUT1L_VOL - [3:0] */ #define WM8996_HPOUT1L_VOL_WIDTH 4 /* HPOUT1L_VOL - [3:0] */ /* * R29 (0x1D) - Output1 Right Volume #define WM8996_DAC1_VU 0x0100 /* DAC1_VU */ #define WM8996_DAC1_VU_MASK 0x0100 /* DAC1_VU */ #define WM8996_DAC1_VU_SHIFT 8 /* DAC1_VU */ #define WM8996_DAC1_VU_WIDTH 1 /* DAC1_VU */ #define WM8996_HPOUT1R_ZC 0x0080 /* HPOUT1R_ZC */ #define WM8996_HPOUT1R_ZC_MASK 0x0080 /* HPOUT1R_ZC */ #define WM8996_HPOUT1R_ZC_SHIFT 7 /* HPOUT1R_ZC */ #define WM8996_HPOUT1R_ZC_WIDTH 1 /* HPOUT1R_ZC */ #define WM8996_HPOUT1R_VOL_MASK 0x000F /* HPOUT1R_VOL - [3:0] */ #define WM8996_HPOUT1R_VOL_SHIFT 0 /* HPOUT1R_VOL - [3:0] */ #define WM8996_HPOUT1R_VOL_WIDTH 4 /* HPOUT1R_VOL - [3:0] */ /* * R30 (0x1E) - Output2 Left Volume #define WM8996_DAC2_VU 0x0100 /* DAC2_VU */ #define WM8996_DAC2_VU_MASK 0x0100 /* DAC2_VU */ #define WM8996_DAC2_VU_SHIFT 8 /* DAC2_VU */
Messung V0.5 C=88 H=98 G=93
¤ Dauer der Verarbeitung: 0.25 Sekunden
(vorverarbeitet)
¤ *© Formatika GbR, Deutschland
