/* SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Copyright: * 2020 Evan Nemerson <evan@nemerson.com> * 2020 Himanshi Mathur <himanshi18037@iiitd.ac.in> * 2020 Hidayat Khan <huk2209@gmail.com>
*/
#ifdefined(SIMDE_VECTOR_SUBSCRIPT_OPS)
r_.f32 = a_.f32 * b_.f32; #else
SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
r_.m256[i] = simde_mm256_mul_ps(a_.m256[i], b_.m256[i]);
} #endif
return simde__m512_from_private(r_); #endif
} #ifdefined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES) #undef _mm512_mul_ps #define _mm512_mul_ps(a, b) simde_mm512_mul_ps(a, b) #endif
SIMDE_FUNCTION_ATTRIBUTES
simde__m512
simde_mm512_mask_mul_ps(simde__m512 src, simde__mmask16 k, simde__m512 a, simde__m512 b) { #ifdefined(SIMDE_X86_AVX512F_NATIVE) return _mm512_mask_mul_ps(src, k, a, b); #else return simde_mm512_mask_mov_ps(src, k, simde_mm512_mul_ps(a, b)); #endif
} #ifdefined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES) #undef _mm512_mask_mul_ps #define _mm512_mask_mul_ps(src, k, a, b) simde_mm512_mask_mul_ps(src, k, a, b) #endif
SIMDE_FUNCTION_ATTRIBUTES
simde__m512
simde_mm512_maskz_mul_ps(simde__mmask16 k, simde__m512 a, simde__m512 b) { #ifdefined(SIMDE_X86_AVX512F_NATIVE) return _mm512_maskz_mul_ps(k, a, b); #else return simde_mm512_maskz_mov_ps(k, simde_mm512_mul_ps(a, b)); #endif
} #ifdefined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES) #undef _mm512_maskz_mul_ps #define _mm512_maskz_mul_ps(k, a, b) simde_mm512_maskz_mul_ps(k, a, b) #endif
#ifdefined(SIMDE_VECTOR_SUBSCRIPT_OPS)
r_.f64 = a_.f64 * b_.f64; #else
SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
r_.m256d[i] = simde_mm256_mul_pd(a_.m256d[i], b_.m256d[i]);
} #endif
return simde__m512d_from_private(r_); #endif
} #ifdefined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES) #undef _mm512_mul_pd #define _mm512_mul_pd(a, b) simde_mm512_mul_pd(a, b) #endif
SIMDE_FUNCTION_ATTRIBUTES
simde__m512d
simde_mm512_mask_mul_pd(simde__m512d src, simde__mmask8 k, simde__m512d a, simde__m512d b) { #ifdefined(SIMDE_X86_AVX512F_NATIVE) return _mm512_mask_mul_pd(src, k, a, b); #else return simde_mm512_mask_mov_pd(src, k, simde_mm512_mul_pd(a, b)); #endif
} #ifdefined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES) #undef _mm512_mask_mul_pd #define _mm512_mask_mul_pd(src, k, a, b) simde_mm512_mask_mul_pd(src, k, a, b) #endif
SIMDE_FUNCTION_ATTRIBUTES
simde__m512d
simde_mm512_maskz_mul_pd(simde__mmask8 k, simde__m512d a, simde__m512d b) { #ifdefined(SIMDE_X86_AVX512F_NATIVE) return _mm512_maskz_mul_pd(k, a, b); #else return simde_mm512_maskz_mov_pd(k, simde_mm512_mul_pd(a, b)); #endif
} #ifdefined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES) #undef _mm512_maskz_mul_pd #define _mm512_maskz_mul_pd(k, a, b) simde_mm512_maskz_mul_pd(k, a, b) #endif
#ifdefined(SIMDE_CONVERT_VECTOR_) && defined(SIMDE_SHUFFLE_VECTOR_)
simde__m512i_private x;
__typeof__(r_.i64) ta, tb;
/* Get even numbered 32-bit values */
x.i32 = SIMDE_SHUFFLE_VECTOR_(32, 64, a_.i32, b_.i32, 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30); /* Cast to 64 bits */
SIMDE_CONVERT_VECTOR_(ta, x.m256i_private[0].i32);
SIMDE_CONVERT_VECTOR_(tb, x.m256i_private[1].i32);
r_.i64 = ta * tb; #else
SIMDE_VECTORIZE for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
r_.i64[i] = HEDLEY_STATIC_CAST(int64_t, a_.i32[i << 1]) * HEDLEY_STATIC_CAST(int64_t, b_.i32[i << 1]);
} #endif return simde__m512i_from_private(r_); #endif
} #ifdefined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES) #undef _mm512_mul_epi32 #define _mm512_mul_epi32(a, b) simde_mm512_mul_epi32(a, b) #endif
SIMDE_FUNCTION_ATTRIBUTES
simde__m512i
simde_mm512_mask_mul_epi32(simde__m512i src, simde__mmask8 k, simde__m512i a, simde__m512i b) { #ifdefined(SIMDE_X86_AVX512F_NATIVE) return _mm512_mask_mul_epi32(src, k, a, b); #else return simde_mm512_mask_mov_epi64(src, k, simde_mm512_mul_epi32(a, b)); #endif
} #ifdefined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES) #undef _mm512_mask_mul_epi32 #define _mm512_mask_mul_epi32(src, k, a, b) simde_mm512_mask_mul_epi32(src, k, a, b) #endif
SIMDE_FUNCTION_ATTRIBUTES
simde__m512i
simde_mm512_maskz_mul_epi32(simde__mmask8 k, simde__m512i a, simde__m512i b) { #ifdefined(SIMDE_X86_AVX512F_NATIVE) return _mm512_maskz_mul_epi32(k, a, b); #else return simde_mm512_maskz_mov_epi64(k, simde_mm512_mul_epi32(a, b)); #endif
} #ifdefined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES) #undef _mm512_maskz_mul_epi32 #define _mm512_maskz_mul_epi32(k, a, b) simde_mm512_maskz_mul_epi32(k, a, b) #endif
return simde__m512i_from_private(r_); #endif
} #ifdefined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES) #undef _mm512_mul_epu32 #define _mm512_mul_epu32(a, b) simde_mm512_mul_epu32(a, b) #endif
SIMDE_FUNCTION_ATTRIBUTES
simde__m512i
simde_mm512_mask_mul_epu32(simde__m512i src, simde__mmask8 k, simde__m512i a, simde__m512i b) { #ifdefined(SIMDE_X86_AVX512F_NATIVE) return _mm512_mask_mul_epu32(src, k, a, b); #else return simde_mm512_mask_mov_epi64(src, k, simde_mm512_mul_epu32(a, b)); #endif
} #ifdefined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES) #undef _mm512_mask_mul_epu32 #define _mm512_mask_mul_epu32(src, k, a, b) simde_mm512_mask_mul_epu32(src, k, a, b) #endif
SIMDE_FUNCTION_ATTRIBUTES
simde__m512i
simde_mm512_maskz_mul_epu32(simde__mmask8 k, simde__m512i a, simde__m512i b) { #ifdefined(SIMDE_X86_AVX512F_NATIVE) return _mm512_maskz_mul_epu32(k, a, b); #else return simde_mm512_maskz_mov_epi64(k, simde_mm512_mul_epu32(a, b)); #endif
} #ifdefined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES) #undef _mm512_maskz_mul_epu32 #define _mm512_maskz_mul_epu32(k, a, b) simde_mm512_maskz_mul_epu32(k, a, b) #endif
SIMDE_END_DECLS_
HEDLEY_DIAGNOSTIC_POP
#endif/* !defined(SIMDE_X86_AVX512_MUL_H) */
Messung V0.5
¤ Dauer der Verarbeitung: 0.12 Sekunden
(vorverarbeitet)
¤
Die Informationen auf dieser Webseite wurden
nach bestem Wissen sorgfältig zusammengestellt. Es wird jedoch weder Vollständigkeit, noch Richtigkeit,
noch Qualität der bereit gestellten Informationen zugesichert.
Bemerkung:
Die farbliche Syntaxdarstellung und die Messung sind noch experimentell.