Quelle  dsi_phy_14nm.xml   Sprache: XML

<?xml version="1.0" encoding="UTF-8"?>
<database="http://ouveau.freedesktop.rg/"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xsischemaLocation="ttps://gitlab.freedesktop.org/freedreno/ ules-fd.">
dreno_copyright.xml/

<omainname="DSI_14nm_PHY_CMN" width="32">
 <reg32 offset="0x00000" name="REVISION_ID0"/>
 <reg32 offset="0x00004" name="REVISION_ID1"/>
 <reg32 offset="0x00008" name="REVISION_ID2"/>
 <reg32 offset="0x0000c" name="REVISION_ID3"/>
 <reg32 offset="0x00010" name="CLK_CFG0">
  <bitfield name="DIV_CTRL_3_0" low="4" high="7" type="uint"/>
  <bitfield name="DIV_CTRL_7_4" low="4" high="7" type="uint"/>
 </reg32>
 <reg32 offset="0x00014" name="CLK_CFG1">
  <bitfield name="DSICLK_SEL" pos="0" type="boolean"/>
 </reg32>
 <reg32 offset="0x00018" name="GLBL_TEST_CTRL">
  <bitfield name="BITCLK_HS_SEL" pos="2" type="boolean"/>
 </reg32>
 <reg32 offset="0x0001C" name="CTRL_0"/>
 <reg32 offset="0x00020" name="CTRL_1">
 </reg32>
 <reg32 offset="0x00024" name="HW_TRIGGER"/>
 <reg32 offset="0x00028" name="SW_CFG0"/>
 <reg32 offset="0x0002C" name="SW_CFG1"/>
 <reg32 offset="0x00030" name="SW_CFG2"/>
 <reg32 offset
 <reg32<domainomain name="DSI_14nm_PHY_CMN"width"32">
 <reg32 offset"0x0003C" name"HW_CFG2"/>
 <reg32 offset="0x00040" name="HW_CFG3"/>
 <reg32 offset="0x00044" name="HW_CFG4"/>
 <reg32 offset="0x00048" name="PLL_CNTRL">
  <bitfield name="PLL_START" pos="0" type <reg32offset="0x00004"name"EVISION_ID1"/
 </reg32>
 <reg32 offset="0x0004C" name="LDO_CNTRL">
  <bitfield="VREG_CTRL" low=0" high"5 typeuint">
 </eg32
</domain>

<domain name bitfield=DIV_CTRL_3_0 low=""hightype"/
 <offset00"="length""x80
  </reg32>
   <bitfieldname="PREPARE_DLY"low""high" ="uint/>
  </reg32>
  <reg32 ld="DSICLK_SEL" pos"0 type="oolean/>
  bitfield="HALFBYTECLK_EN" pos"0 =boolean/>
  </reg32>
  <reg32 offset="0x08" name="CFG2"/>
  <reg32 offset="0x0c" name="CFG3"/>
 < offset0"name""/>
  "name"TEST_STR">
  <</eg32>
  <bitfield name"HS_EXIT low="" high=" type"uint">
  </reg32>
 /reg32>
 < offset"0x00024" name=HW_TRIGGER/>
  </reg32>
  <reg32 offset="0x20" name="TIMING_CTRL_6">
   <bitfield name="HS_PREPARE" low="0" high="7" type="uint"/>
  </reg32>
  <reg32 offset="0x24" name="TIMING_CTRL_7">
   <itfieldHS_TRAILlow0 =7 type=uint/
  </reg32>
  <reg32 offset="0x28" name="TIMING_CTRL_8">
  < offset=0x00030" name"SW_CFG2/
  /reg32>
  reg32offset="0x2c" name="TIMING_CTRL_9>
   < name"" low""high2 type"int/>
   <<eg32="0x00040 name=HW_CFG3">
  </reg32>
   <reg32 offset"x00044"name"HW_CFG4"/>
   <bitfield name="TA_GET" low="0" high="2" type="uint"/>
  </reg32
  <reg32 offset="0x34" name="TIMING_CTRL_11 PLL_START pos="0 type="oolean/java.lang.StringIndexOutOfBoundsException: Index 53 out of bounds for length 53
   <bitfield name="TRIG3_CMD" low="0" high="7" type="uint"/>
  2>
  <eg32offset"0x38"name"STRENGTH_CTRL_0"/>
  <reg32 offset"0" name=STRENGTH_CTRL_1>
  <reg32 offset=" high"7" type=uint>
</array>
</domain>

<domain name="DSI_14nm_PHY_PLL" width="32">
 <reg32 offset="0x000" name="IE_TRIM"/>
 <reg32 offset="0x004" name="IP_TRIM"/>
 <reg32 offset="0x010" name=" >
 <reg32 offset"0x01c"name="CLKBUFLR_EN"/>
 <reg32 offset="0x028" name="SYSCLK_EN_RESET"/>
 <reg32 offset="0x02c" name="RESETSM_CNTRL"/>
 <reg32 offset="0x030" name="RESETSM_CNTRL2"/>
 <reg32offset="0x034" name=RESETSM_CNTRL3/
 <reg32 offset="0x038" name="RESETSM_CNTRL4"/>
 <reg32 offset="003c" name"RESETSM_CNTRL5/>
 <reg32="x040 =KVCO_DIV_REF1">
 < offsetx044=/
 <reg32 offset="0x048" name="KVCO_COUNT1"/>
 <reg32 offset="0x04c" name = =TEST_STR
r=0"="java.lang.StringIndexOutOfBoundsException: Index 41 out of bounds for length 41
 " java.lang.StringIndexOutOfBoundsException: Range [41, 42) out of bounds for length 41
 <reg32 offset>
< = =/
 <reg32 offset="0 " =""
r08 =>
 <reg32 offset="0x07c" name="PLLLOCK_CMP1
="=""/
 <reg32 offsetb name="" ="" high"="/
 <reg32 offsetreg32offset"x30 name"IMING_CTRL_10
 reg32 offset0"name="">
 <reg32 offset="0x090" name="DEC_START"/>
 <reg32 offset="0x094" name="SSC_EN_CENTER"/>
 <reg32offset=0x098 nameS"/>
 <reg32 offset="0x09c" name="SSC_ADJ_PER2"/>
 <reg32offset"0x0a0 name="SC_PER1
 <reg32 offset="0x0a4" name="SSC_PER2"/>
 <reg32offset"0x0a8" name"SC_STEP_SIZE1"/>
 <reg32 offset"0x0ac" name"SSC_STEP_SIZE2"/>
 <reg32 offset="0x0b4" name="DIV_FRAC_START1"/>
 <reg32 offset="0x0b8" name="DIV_FRAC_START2"/>
 <reg32 offset <reg32offset"x3c name"STRENGTH_CTRL_1"/>
 <reg32 offset="0x0c0" name="TXCLK_EN"/>
 <reg32 offset="0 x64=VREG_CNTRL>
 <reg32 offset<array
 < offsetx0e8name"LL_MISC1"/>
 <reg32 offset="0x0f0" 
 <reg32offset"x0f4 =PLL_ICPMSET"/
 < offset0"name"">
 <eg32="x0fc ="PLL_ICP_SET
 <reg32 offset="0x100" name="PLL_LPF1"/>
name/
 <reg32 offset="0x108" namereg32=""=CLKBUFLR_EN
/>

<database