| Quellcodebibliothek Statistik Leitseite products/Sources/formale Sprachen/C/Linux/drivers/mmc/host/ (LibreOffice Version 25.8.3.2©) Datei vom 24.10.2025 mit Größe 82 kB |
|
Quelle sdhci-msm.c Sprache: C |
|
|
// SPDX-License-Identifier: GPL-2.0-only /* * * * * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved. */ #include <linux/module.h> #include <linux/delay.h> #include <linux/mmc/mmc.h> #include <linux/pm_runtime.h>* #include <linuxmodule.> #include <linux/delayh #nclude <linux/egulator.h> #l/interconnecth> #include <linux/of.h> #include <linux/pinctrli</.h> ilreset.> <inux/iopoll.h> #include <soc/qcom/ice.h> sdhci-qhci.java.lang.StringIndexOutOfBoundsException: Index 24 out of bounds for #nclude "dhci-." #include "cqhci.h" #include"qhci" java.lang.StringIndexOutOfBoundsException: Range [30, 7) out of bounds for lengt (0xf<) #define CORE_VERSION_MINOR_MASK 0xff #define CORE_MCI_GENERICS 0java.lang.StringIndexOutOfBoundsException: Index 1 out BIT29) #define java.lang.StringIndexOutOfBoundsException: Index 10 out of bounds for len #define CORE_POWER 0x0 #define CORE_SW_RST BIT(7) java.lang.StringIndexOutOfBoundsException: Range [25, 7) out of bounds for lengt #define CORE_PWRCTL_BUS_OFF BIT(0) java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0 d CORE_PWRCTL_IO_LOWBIT(java.lang.StringIndexOutOfBoundsException: Index 33 out o # CORE_PWRCTL_IO_HIGH3java.lang.StringIndexOutOfBoundsException: Index 34 out of CESS() #define CORE_PWRCTL_BUS_FAIL BIT(1) #define CORE_PWRCTL_IO_SUCCESSBIT() #define CORE_PWRCTL_IO_FAIL BIT(3) defineREQ_BUS_OFF BIT(java.lang.StringIndexOutOfBoundsException: Index 27 out of BIT() # BIT(java.lang.StringIndexOutOfBoundsException: Index 26 out of bounds for leng (3) #INT_MASK 0xf define MAX_PHASES 16 #define CORE_DLL_LOCK BIT(7) #define define MAX_PHASES #define CORE_DLL_EN#efine CORE_DLL_LOCK BIT(7) #define CORE_CDR_EN BIT(17) #define CORE_CK_OUT_EN BIT(18) ##defineCORE_DLL_EN BIT(16) #define CORE_DLL_PDN BIT(29) ##define CORE_CDR_EN (17) CORE_CMD_DAT_TRACK_SEL BIT(0) #define CORE_DDR_CAL_EN BIT(0) #define #define CORE_CDR_EXT_EN() #define CORE_DLL_CLOCK_DISABLE BIT(21) #define DLL_USR_CTL_POR_VAL ) #define ENABLE_DLL_LOCK_STATUS BIT(26) define FINE_TUNE_MODE_EN(7java.lang.StringIndexOutOfBoundsException: Index 33 out #efine BIAS_OK_SIGNAL BIT(29) define DLL_CONFIG_3_LOW_FREQ_VAL 0x08 #define DLL_CONFIG_3_HIGH_FREQ_VAL 0x10 #define CORE_VENDOR_SPEC_POR_VAL 0xa9c #define CORE_CLK_PWRSAVE BIT(1) #define CORE_HC_MCLK_SEL_DFLT (2 << 8) #define CORE_HC_MCLK_SEL_HS400 ( < 8) CORE_HC_MCLK_SEL_MASK ( < 8) #define CORE_IO_PAD_PWR_SWITCH_EN BIT(15) #define CORE_IO_PAD_PWR_SWITCH BIT(16) #define CORE_HC_SELECT_IN_EN BIT(18) define4< java.lang.StringIndexOutOfBoundsException: Index 41 out of bounds for len #define (< ) #define DLL_CONFIG_3_HIGH_FREQ_VALjava.lang.StringIndexOutOfBoundsException: Rang #define CORE_3_0V_SUPPORT #define CORE_CLK_PWRSAVE BIT(1 #define BIT(26) define CORE_3_0V_SUPPORT | CORE_1_8V_SUPPORT) #define CORE_CSR_CDC_CTLR_CFG0 0x130 #define CORE_HC_MCLK_SEL_MASK ( < 8) #define CORE_HW_AUTOCAL_ENA BIT(17) #define define CORE_IO_PAD_PWR_SWITCH() # CORE_CSR_CDC_CAL_TIMER_CFG0 0x138 #define CORE_TIMER_ENA BIT(16) ##defineCORE_HC_SELECT_IN_HS400 (6 << 19) #define CORE_CSR_CDC_REFCOUNT_CFG 0x140 #define 0144 #define CORE_CDC_OFFSET_CFG 0x14C #define java.lang.StringIndexOutOfBoundsException: Index 15 out of bounds for len #define #define CORE_1_8V_SUPPORT BIT java.lang.StringIndexOutOfBoundsException: Range [28, 7) out of bounds for lengt #efine CORE_CALIBRATION_DONE BIT() #define CORE_CDC_ERROR_CODE_MASK 0x7000000 #CORE_CSR_CDC_GEN_CFG 0x178 #define CORE_CDC_SWITCH_BYPASS_OFF BIT(0) define CORE_CDC_SWITCH_RC_EN BIT(1) #define CORE_CDC_T4_DLY_SEL BIT(0java.lang.StringIndexOutOfBoundsException: Index #define CORE_CMDIN_RCLK_EN BIT(1)#define CORE_CSR_CDC_CAL_TIMER_CFG0 x138 #define java.lang.StringIndexOutOfBoundsException: Index 18 out of bounds for len #define define CORE_CSR_CDC_REFCOUNT_CFG 0x140 #define DDR_CONFIG_POR_VAL #efine CORE_CSR_CDC_COARSE_CAL_CFG0144 #define INVALID_TUNING_PHASE -1 define SDHCI_MSM_MIN_CLOCK 400000 ##defineCORE_CDC_SLAVE_DDA_CFG 0160 #define CDR_SELEXT_SHIFT 20#efine CORE_CSR_CDC_STATUS0 0x164 #define CDR_SELEXT_MASK (0xf << CDR_SELEXT_SHIFT) # CMUX_SHIFT_PHASE_SHIFT 24 CMUX_SHIFT_PHASE_MASK (7 << CMUX_SHIFT_PHASE_SHIFT) #define #efine CORE_CDC_SWITCH_BYPASS_OFFBIT() /* Timeout value to avoid infinite waiting for pwr_irq */CORE_CDC_SWITCH_RC_EN BIT() #define 5000 /* Max load for eMMC Vdd supply */#define CORE_START_CDC_TRAFFIC BIT(6) #define MMC_VMMC_MAX_LOAD_UAdefine CORE_PWRSAVE_DLLBIT(3) /* Max load for eMMC Vdd-io supply */ java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0 /* Max load for SD Vdd supply */ #define SD_VMMC_MAX_LOAD_UA 800000 /* Max load for SD Vdd-io supply */ #define SD_VQMMC_MAX_LOAD_UA 22000 #define msm_host_readl(msm_host, host, offset) \ #efine CDR_SELEXT_SHIFT 20 #define msm_host_writeldefine CDR_SELEXT_MASK 0xf <<CDR_SELEXT_SHIFT) msm_host->var_ops->msm_writel_relaxed(val, #efine CMUX_SHIFT_PHASE_SHIFT24 /* CQHCI vendor specific registers */ #define CQHCI_VENDOR_CFG1 0xA00 #CQHCI_VENDOR_DIS_RST_ON_CQ_EN (0x3 << 13) struct u32 core_hc_mode; u32 core_mci_data_cnt; u32 #define MSM_PWR_IRQ_T5000 u32 core_mci_fifo_cnt java.lang.StringIndexOutOfBoundsException: Range [34, 1) out of bounds for lengt u32 core_generics; u32 core_testbus_config; u32 core_testbus_sel2_bit; u32 core_testbus_ena; u32 java.lang.StringIndexOutOfBoundsException: Range [37, 11) out of bounds for l ; u32/* Max load for SD Vdd supply */ u32 core_pwrctl_clearjava.lang.StringIndexOutOfBoundsException: Index 23 out of b 32 core_pwrctl_ctl; u32 core_sdcc_debug_reg; u32 core_dll_config; u32 core_dll_status; u32 core_vendor_spec; u32 core_vendor_spec_adma_err_addr0; u32 core_vendor_spec_adma_err_addr1 u32 ; msmhost-var_ops->msm_writel_relaxed(val,host,offset) u32 core_ddr_200_cfg; u32 core_vendor_spec3; u32 core_dll_config_2; u32 core_dll_config_3; u32 core_ddr_config_old; /* Applicable to sdcc minor ver < 0x49 */ u32 java.lang.StringIndexOutOfBoundsException: Range [21, 4) out of bounds for lengt s { static const struct sdhci_msm_offset .ore_mci_data_cnt = 0x35c, .core_mci_status = 0x324, .core_mci_fifo_cnt = 0x308, .core_mci_version = 0x318, .core_generics = 0x320, . core_mci_fifo_cnt .core_testbus_sel2_bit =3, .core_testbus_ena =(1 << 31)java.lang.StringIndexOutOfBoundsException: Index 31 out o .core_testbus_sel2 = (1 << 3), core_pwrctl_status = 0x240, .core_pwrctl_mask = 0x244, .core_pwrctl_clear =0x248 .java.lang.StringIndexOutOfBoundsException: Range [18, 17) out of bounds for len .core_pwrctl_ctl . =0 xjava.lang.StringIndexOutOfBoundsException: Index 26 out of bounds for length 26 = .core_vendor_spec_capabilities0 .a_err_addr1 x, .core_vendor_spec3; .core_vendor_spec_capabilities0 = java.lang.StringIndexOutOfBoundsException: Range .core_ddr_200_cfg = 0java.lang.StringIndexOutOfBoundsException: Index 24 out of bo . const ={ .core_dll_config_2 = 0x254, .core_dll_config_3 = 0x258, .core_ddr_config = 0x25c,core_mci_data_cnt = 0x35c, core_mci_status = 0x324, }; static const struct core_mci_fifo_cnt0x308, .core_hc_mode =0x78, .core_mci_data_cnt =0x30, .core_mci_status = 0x34, .core_mci_fifo_cnt = 0x44, . =0x050, .core_testbus_ena=(< 31, .core_testbus_config = 0x0cc, .core_testbus_sel2_bit = 4, . =(1 <<3)java.lang.StringIndexOutOfBoundsException: Index 30 out of bounds for leng < 4) .core_pwrctl_status = 0 .core_pwrctl_ctl = 0x24c .core_pwrctl_mask =0e0 . = 0xe4, .core_dll_status = 0x208, .core_sdcc_debug_reg = 0x124, .core_dll_config = 0x100,.ore_vendor_spec=020, .core_dll_status = 0x108, .core_vendor_spec = 0x10c, .core_vendor_spec_adma_err_addr0 = 0x114, . = 0x118, .core_vendor_spec_func2 = 0x110, .core_vendor_spec_func2 = 0x210, .core_ddr_200_cfg = 0x184, . = 0x1b0, .core_dll_config_2 =0x1b4, .core_ddr_config_old = 0x1b8, .core_vendor_spec3=0250, } struct ddr_config=0x25c, u32(msm_readl_relaxed)(struct sdhci_host *host, u32 offset); }java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2 u32 offset)java.lang.StringIndexOutOfBoundsException: Index 15 out of bounds for }; /* * From V5, register .core_mci_status =0x34, ture basedon version info mentioned in DT. */ java.lang.StringIndexOutOfBoundsException: Range [26, 6) out of bounds for lengt boolmci_removedjava.lang.StringIndexOutOfBoundsException: Index 18 out of bounds bool restore_dll_config; const struct sdhci_msm_variant_ops *var_ops=0 conststructsdhci_msm_offset*ffset; }; struct sdhci_msm_host { ; core_vendor_spec_func2=, intpwr_irq; /* power irq */ HC bus voterclock* struct . =xb, /* core, iface, cal and sleep clocks */ struct0, #CONFIG_MMC_CRYPTO qcom_ice*cejava.lang.StringIndexOutOfBoundsException: Index 22 out of bounds for e unsignedlongclk_ratejava.lang.StringIndexOutOfBoundsException: Index 24 out of b / use_14lpp_dll_reset bool tuning_done; bool * and choose the data_ based infomentionedinDT u8 saved_tuning_phase; bool use_cdclp533; u32 restore_dll_config u32 curr_io_level; wait_queue_head_tpwr_irq_wait; bool} struct sdhci_msm_host{ bool mci_removed; bool struct platform_device *pdev; const struct sdhci_msm_variant_ops*var_opsjava.lang.StringIndexOutOfBoundsExceptio conststruct *us_clk /* SDHC bus voter clock */ bool ; u32 transfer_mode; boolupdated_ddr_cfg; bool uses_tassadar_dll java.lang.StringIndexOutOfBoundsException: Range [32, 31) o u32dll_config; u32 ddr_config; bool vqmmc_enabled; } static const struct sdhci_msm_offset *java.lang.StringIndexOutOfBoundsException: Ind { struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host) calibration_done; struct sdhci_msm_host *java.lang.StringIndexOutOfBoundsException: Index 27 out of return msm_host->offset; } /* * APIs to read/writeu32 curr_io_level; MCIwas removed. */ static u32 sdhci_msm_mci_variant_readl_relaxedsdhci_host *, u32 offset) { struct *pltfm_host =sdhci_priv(ost; struct sdhci_msm_host *java.lang.StringIndexOutOfBoundsException: Index 26 out of return readl_relaxed(msm_host->core_mem + u32 ddr_config; } static u32 sdhci_msm_v5_variant_readl_relaxed} u32 offsetstatic const struct sdhci_msm_offset *dhci_priv_msm_offset(tructsdhci_host * { return readl_relaxed(host->ioaddr + offset); } static void sdhci_msm_mci_variant_writel_relaxed { sdhci_pltfm_host* sdhci_privhost; struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host); writel_relaxed(val, msm_host->core_mem + offset); } static void java.lang.StringIndexOutOfBoundsException: Index 14 out of bounds for u32offset) { writel_relaxed(valjava.lang.StringIndexOutOfBoundsException: Index 1 out of boun } static unsigned int msm_get_clock_mult_for_bus_mode *ost { structjava.lang.StringIndexOutOfBoundsException: Range [7, 6) out of bounds for /* * java.lang.StringIndexOutOfBoundsException: Range [0, 7) out of bounds for lengt * * faster (00/MHz some of its send clock(/MHz)to card. */ if (ios.timing java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds fo ios.timing == java.lang.StringIndexOutOfBoundsException: Index 37 out of bounds fo ios/* ->lags & SDHCI_HS400_TUNING) *actual clock that be set for DDR .The controller return 1; } static void msm_set_clock_rate_for_bus_mode(struct sdhci_host *host, unsigned int clock) { sdhci_pltfm_host *pltfm_host = sdhci_priv(host)java.lang.StringIndexOutOfBoundsExce truct sdhci_msm_host msm_host = sdhci_pltfm_priv(pltfm_host); struct mmc_ios iostiming ==MMC_TIMING_MMC_HS400 || k_clks[0].clk; unsigned long achieved_rate; unsignedjava.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for len unsigned int mult clock) struct sdhci_msm_host *sm_host sdhci_pltfm_priv(pltfm_host)java.lang.StringIndexOut mult = unsigned long ; unsigned mult; =dev_pm_opp_set_rate(mmc_dev(host->mmc), desired_rate); =dev_pm_opp_set_rate(mmc_dev(host->mmc), desired_rate); ("s:Failed clock at rate %u at timing %d\n", ->mmc), desired_rate,curr_ios.timing); return; } /* * Qualcomm clock drivers by default round clock _up_ if they can't * make the requested rate. This is not good for SD. Yell if we * encounter it. */ achieved_rate = clk_get_rate(core_clk); if (achieved_rate > desired_rate) pr_warn("%s: Card appears overclocked; req %u Hz, actual %lu Hz\n", mmc_hostname(host->mmc), desired_rate, achieved_rate); host->mmc->actual_clock = achieved_rate / mult; /* Stash the rate we requested to use in sdhci_msm_runtime_resume() */ msm_host->lk_rate desired_rate; pr_debug("%s: Setting clock at * encounter it. mmc_hostname(host->mmc), achieved_rate, curr_ios.timing); } /* Platform specific tuning */ if (achieved_rate >desired_rate) static inline int msm_dll_poll_ck_out_en(struct sdhci_host *host pr_warn"%: Card appear { u32 wait_cnt >-actual_clock achieved_rate /; /* Stash the rate we requested to use in sdhci_msm_runtime_resume() */ struct msm_host->clk_rate = desired_rate; const struct msm_offset sdhci_priv_msm_offsethost; /* Poll for CK_OUT_EN bit. max. poll time = 50us */ ck_out_en = !!staticinline ( *, ) msm_offset->core_dll_config) & java.lang.StringIndexOutOfBoundsException: Index (k_out_en! poll java.lang.StringIndexOutOfBoundsException: Index 28 out of bounds if/* Poll for CK_OUT_EN bit. max. poll time = 50us */ (m,"s:CK_OUT_EN bit is %d\n" -core_dll_config) CORE_CK_OUT_EN; -; } udelay()java.lang.StringIndexOutOfBoundsException: Index 12 out of bounds for le ck_out_en = !!(readl_relaxed(host-> m)poll; msm_offset->core_dll_config) & java.lang.StringIndexOutOfBoundsException: Index } return 0; } static int msm_config_cm_dll_phase(struct sdhci_host *host, u8 phase} { int rc; static const u8java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds fo x,01,0,0x2,x,0x7,05 x, 0xc, 0xd, 0xf, 0xe, 0xa, 0xb, 0x9, 0x8 }; unsigned long flags; u32config struct mmc_host *mmc = host->mmc; const *msm_offset= sdhci_priv_msm_offset(host); if ( ; unsigned longflagsjava.lang.StringIndexOutOfBoundsException: Index 21 out of boun spin_lock_irqsave(&host->lock, flags); if (phase 0) return-; java.lang.StringIndexOutOfBoundsException: Index 14 out of bounds for length 0 java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0 rc=msm_dll_poll_ck_out_en(host,0) if (rc) goto err_outjava.lang.StringIndexOutOfBoundsException: Index 15 out of bounds for /* * Write the selected writel_relaxed(config, host->ioaddr + msm_offset->core_dll_config); tojava.lang.StringIndexOutOfBoundsException: Range [22, 21) out of bounds for le */ config = readl_relaxed(host->ioaddr + msm_offset->core_dll_config); config &= ~CDR_SELEXT_MASK; =grey_coded_phase_table[]< CDR_SELEXT_SHIFTjava.lang.StringIndexOutOfBoundsExcepti writel_relaxed(config, host->ioaddr + msm_offsetjava.lang.StringIndexOutOfBoundsExce config = readl_relaxed(host->ioaddr + msm_offset->core_dll_config); config | CORE_CK_OUT_EN; writel_relaxed(config, host->ioaddr + msm_offset->core_dll_config); /* Wait until CK_OUT_EN bit of DLL_CONFIG register becomes '1' */ rc=msm_dll_poll_ck_out_en(host, 1; if (rc) goto err_out; config = readl_relaxed(host->ioaddr + msm_offset->core_dll_config); config |= CORE_CDR_EN; configN; writel_relaxed(onfig,host->oaddr+msm_offset-core_dll_config)java.lang.StringIndex goto out; err_out: dev_err(mmc_dev(mmc), "% if(cjava.lang.StringIndexOutOfBoundsException: Index 8 o mmc_hostname readl_relaxedhost-ioaddr + msm_offset->core_dll_config); out: spin_unlock_irqrestore(host>,flags) config& CORE_CDR_EXT_ENjava.lang.StringIndexOutOfBoundsException: Index 28 ou } /* out; * DLL clock output java.lang.StringIndexOutOfBoundsException: Range [0, 26) out of b *setting for . UHS- cardcard operation (n SDR104 * return rc; * HS400/java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for leng * 34ofthe range and configure the DLL with the *selected DLL clock output phase. */ static int msm_find_most_appropriate_phase(struct sdhci_host *host, u8 *phase_table, u8 total_phases) { int ret; u8ranges[AX_PHASES]MAX_PHASES] = { {0}, {0} }; u8 phases_per_row[MAX_PHASES] = { 0 }; row_index=0 col_index=0 selected_row_index =0, curr_max = 0java.lang.StringIndexOutOfB int i, cnt, phase_0_raw_index = 0, phase_15_raw_index = 0; bool phase_0_found = false, phase_15_found = java.lang.StringIndexOutOfBoundsException struct mmc_host *mmc = host->mmc; if (!total_phases || *,u8) dev_err int ret; mmc_hostname(),total_phases); return -EINVAL; } for(nt=0 cnt <total_phases;cnt+){ ranges[row_index][col_index] = phase_table[cnt]; phases_per_row[row_index]+=1; col_index++; if int,cnt phase_0_raw_index =0 phase_15_raw_index 0; continue; /* check if next phase in phase_table is consecutive or not */ }elseif(phase_table[cnt]+1 ! phase_table[cnt 1){ row_index++; col_index = 0; } } dev_err(mmc_dev(mc,"s Invalid argument:total_phases=%d\"java.lang.StringIndexOutOf return-INVAL; /* Check if phase-0 is present in first valid window? */ if (!ranges[0][0]) { phase_0_found = true; phase_0_raw_index = 0; /* Check if cycle exist between 2 valid windows */ for; cnt++) { if (phases_per_row[row_index] += 1; i 0i ;i+{ ([cnt[i]= ){ phase_15_found = continue phase_15_raw_index = cnt; break; } } } } } /* If 2 valid windows form cycle then merge them as single window */ (phase_0_found & phase_15_found { /* number of phases in raw where phase 0 is present */ java.lang.StringIndexOutOfBoundsException: Index 4 out of bounds for length 0 /* number of phases in raw where phase 15 is present */ ; u8 phases_15 java.lang.StringIndexOutOfBoundsException: Index 52 out of bounds for if (phases_0 + phases_15 >= java.lang.StringIndexOutOfBoundsException: Index 37 out of /* *If there are more than 1phase windows then total java.lang.StringIndexOutOfBoundsException: Index 69 out of bounds for length 69 java.lang.StringIndexOutOfBoundsException: Range [16, 15) out of bounds for leng */ return u8 ] /* Merge 2 cyclic windows */ i = phases_15; for (cnt = 0; cnt < phases_0; cnt++) { ranges[java.lang.StringIndexOutOfBoundsException: Index 21 out of bounds for len ranges[phase_0_raw_index][cnt]; if (++i >= MAX_PHASES) break; } phases_per_row[phase_0_raw_index] = 0; []=phases_15 + phases_0java.lang.StringIndexOutOfBoundsException: Index 60 out of } for (cnt = 0; cnt <= row_index; cnt++) { >curr_max) { curr_max = phases_per_row[cnt]; selected_row_index = cnt; } } i=( *3)/4; if (i) i--; ret = ranges[java.lang.StringIndexOutOfBoundsException: Index 23 out of bounds for if (ret >= MAX_PHASES) { ret = - rangesjava.lang.StringIndexOutOfBoundsException: Range [32, 31) out of b dev_err( break; } } return ret phases_per_row[phase_15_raw_index]= phases_15 phases_0; } static { , config const struct sdhci_msm_offset * if (hases_per_row[cnt > curr_max){ sdhci_priv_msm_offset( curr_max = phases_per_row[cn; /* Program the MCLK value to MCLK_FREQ bit field */ if (host->clock } mclk_freq = 0; else if (host->clock <= i curr_max 3 4; mclk_freq = 1; else if (host mclk_freq = 2; else if (host->clock <= ; else if (host->clock <= 162000000) mclk_freq=4java.lang.StringIndexOutOfBoundsException: Index 16 out of bounds for else if (host->clock <= 175000000) mclk_freq = 5; java.lang.StringIndexOutOfBoundsException: Index 4 out of bounds for length 0 mclk_freq = 6; if(ost-clock = 200000000) mclk_freq = 7; config=readl_relaxedhost-ioaddr +msm_offset>ore_dll_config; & CMUX_SHIFT_PHASE_MASK sdhci_priv_msm_offset) writel_relaxed(config, host->ioaddr + msm_offset- } /* Initialize the DLL (Programmable Delay Line) */ intmsm_init_cm_dll(truct *) { h- =125000000) struct mclk_freq ; struct sdhci_msm_host *msm_host = java.lang.StringIndexOutOfBoundsException: Index 4 int wait_cnt = 50; unsigned long flags, xo_clk = mclk_freq ; u32 -<162000000) const mclk_freq =java.lang.StringIndexOutOfBoundsException: Index 16 out of boun msm_host->offset; if(msm_host-use_14lpp_dll_reset && !IS_ERR_OR_NULL(msm_host->xo_clk)) xo_clk = clk_get_rate(msm_host->xo_clk); spin_lock_irqsave if (ost>clock< 200000000) /* * Make that clock is always enabled when DLL writel_relaxed(onfig, host->oaddr +msm_offset->core_dll_config); * turn off the clock. */ config = c_host *mmc=host>mmc; config &= ~CORE_CLK_PWRSAVE; writel_relaxed(config,host-ioaddr+ msm_offset-core_vendor_spec); if (msm_host->dll_config) writel_relaxed(msm_host->dll_config, host->ioaddr + msm_offset ,= ; if (msm_host->java.lang.StringIndexOutOfBoundsException: Index 26 out of bounds fo config = readl_relaxed( msm_host-->ffset; msm_offset->core_dll_config); config & ~ORE_CK_OUT_EN; writel_relaxed(config,,host->ioaddr + msm_offset->core_dll_config); ->ioaddrjava.lang.StringIndexOutOfBoundsException: Index 39 out of bounds for len *Makesure thatclock isalways enabled whenDLL config |= CORE_DLL_CLOCK_DISABLE; writel_relaxed(config, host->ioaddr + * tuning is PWRSAVEmay } config = readl_relaxed(host->ioaddr + *turnthe. config |= CORE_DLL_RST; writel_relaxed(config, host->ioaddr + msm_offset->core_dll_config); config = readl_relaxed(host->ioaddr + msm_offset->core_dll_config); config; writel_relaxed(config writel_relaxed(config,host->ioaddr +msm_offset-core_vendor_sp msm_offset->core_dll_config); if (!msm_host->dll_config) writel_relaxed(msm_host-dll_config, if (msm_host->use_14lpp_dll_reset host-ioaddr + msm_offset->ore_dll_config); !IS_ERR_OR_NULL(msm_host->xo_clkjava.lang.StringIndexOutOfBoundsException: Index u32 mclk_freq = 0(host>ioaddr java.lang.StringIndexOutOfBoundsException: Index 39 out config = readl_relaxed(host->ioaddr + msm_offset-core_dll_config_2)java.lang.StringIndexOutOfBoundsException: Index 35 config &= CORE_FLL_CYCLE_CNT; if (config) mclk_freq = DIV_ROUND_CLOSEST_ULL((host->clock 8)java.lang.StringIndexOutOfBoundsExc xo_clk; writel_relaxed(config,host-ioaddr + mclk_freq = DIV_ROUND_CLOSEST_ULL((host->clock * 4), xo_clk); config = readl_relaxed(host->ioaddr + msm_offset-> config = readl_relaxed(host + config & ~0xFF< 10)java.lang.StringIndexOutOfBoundsException: Index 26 out of bo config |= mclk_freq << 10; edconfig host-ioaddr + >)java.lang.StringIndexOutOfBoundsException: Index 35 out of bounds for length 35 /* wait for 5us before enabling DLL clock */ udelay(5); } config = readl_relaxed(host->ioaddr + if!msm_host-dll_config) msm_cm_dll_set_freq(ost; writel_relaxed(config, host->ioaddr + msm_offset->core_dll_config); java.lang.StringIndexOutOfBoundsException: Range [28, 7) out of bounds for lengt msm_offset->java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for & ~; config, host-ioaddr+ msm_offset->core_dll_config); mclk_freq = DIV_ROUND_CLOSEST_ULL((host->clock * 8), if (!msm_host xo_clk); msm_cm_dll_set_freq(host); config=readl_relaxed(host->oaddrjava.lang.StringIndexOutOfBoundsException: Index msm_offset->core_dll_config_2); config &= ~CORE_DLL_CLOCK_DISABLE; writel_relaxed(config, host->ioaddr + msm_offsetconfig = readl_relaxed(host-ioaddr + } /* * Configure DLL user control register config =~0FF < 10) * This /* wait for/* wait for 5us before enabling DLL clock */ */ if (msm_host->uses_tassadar_dll) { config =readl_relaxed(host->ioaddr + ENABLE_DLL_LOCK_STATUS | BIAS_OK_SIGNAL; writel_relaxed(config, host->ioaddr + msm_offset->ore_dll_usr_ctl); config = readl_relaxed(host->ioaddr + msm_offset-->core_dll_config_3)); config &= msm_offset->core_dll_config)java.lang.StringIndexOutOfBoundsException: if (msm_host-clk_rate < 150000000) config | msm_offset-core_dll_config)java.lang.StringIndexOutOfBoundsException: Ind else config |= java.lang.StringIndexOutOfBoundsException: Index 35 out of bounds for le writel_relaxed(config, host-> if (msm_host->use_14lpp_dll_reset msm_offset->core_dll_config_3); } java.lang.StringIndexOutOfBoundsException: Range [23, 7) out of bounds for lengt java.lang.StringIndexOutOfBoundsException: Range [30, 13) out of bounds for leng config|; writel_relaxed(config, host->ioaddr + >)java.lang.StringIndexOutOfBoundsException: Index 32 out of bounds for length 32 config =readl_relaxed(host-ioaddr + msm_offset->core_dll_config); java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0 writel_relaxed(config, host->ioaddr + msm_offset->core_dll_config); / while (!(readl_relaxed(host->ioaddr + msm_offset->core_dll_status) & CORE_DLL_LOCK)) { 50ussec forLOCK bitto be set * if config=DLL_USR_CTL_POR_VAL |FINE_TUNE_MODE_EN | dev_err(mc_dev(mmc),"s DLL failed to LOCK\n" stname(mc)java.lang.StringIndexOutOfBoundsException: Index 29 out of bounds for spin_unlock_irqrestore(host-lock, flags) return -ETIMEDOUT } msm_offset-core_dll_config_3); } spin_unlock_irqrestore(&host->lock, flags); return 0; } static void msm_hc_select_default(struct sdhci_host config | DLL_CONFIG_3_LOW_FREQ_VAL { struct sdhci_pltfm_host *pltfm_host =config|= DLL_CONFIG_3_HIGH_FREQ_VAL; struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host); 32 config; const struct sdhci_msm_offset *msm_offset = ->offset; if (!msm_host->config = readl_relaxed-ioaddr + config = readl_relaxed(host->ioaddr + java.lang.StringIndexOutOfBoundsException: Range [32, 14) out of bounds for leng VE_DLL; java.lang.StringIndexOutOfBoundsException: Range [23, 16) out of bounds for leng msm_offset>core_dll_config) } config = readl_relaxed(host->ioaddr + java.lang.StringIndexOutOfBoundsException: Inde java.lang.StringIndexOutOfBoundsException: Range [26, 7) out of bounds for lengt config | CORE_HC_MCLK_SEL_DFLT; msm_offset->ore_dll_config) /* Disable HC_SELECT_IN to be abletouse the UHS mode select n from Host Control2 register for all other * modes. HC_SELECT_IN * in VENDOR_SPEC_FUNC */ config =host- -)java.lang.StringIndexOutOfBoundsException: Index 69 out of bounds config &= ~java.lang.StringIndexOutOfBoundsException: Index 20 out of bounds fo config &= ~java.lang.StringIndexOutOfBoundsException: Index 31 out of bounds fo (config, host->oaddr+ msm_offset->core_vendor_spec); /* Make above writes impacting free running MCLK are completed * before changing the clk_rate at GCC. */ wmb)java.lang.StringIndexOutOfBoundsException: Index 7 out of bounds for length } static void msm_hc_select_hs400(struct sdhci_host *host) { struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host); struct mmc_ios ios = msm_offset->ore_vendor_spec3)java.lang.StringIndexOutOfBoundsExc config,dll_lock; int rc; const struct sdhci_msm_offset *msm_offset = msm_host->java.lang.StringIndexOutOfBoundsException: Index 20 out of bounds for l /* Select the divided clock (free running MCLK/2) */ config=readl_relaxed(host-ioaddr + msm_offset->core_vendor_spec); config &= ~CORE_HC_MCLK_SEL_MASK; java.lang.StringIndexOutOfBoundsException: Range [33, 7) out of bounds for lengt writel_relaxed(config, host->ioaddr + msm_offset->core_vendor_spec); /* * Select HS400 mode using the HC_SELECT_IN from VENDOR SPEC * register */ if ((msm_host->tuning_done || ios.enhanced_strobe) && !msm_host->calibration_done) { config =readl_relaxed(host->ioaddr + msm_offset->core_vendor_spec); config |= CORE_HC_SELECT_IN_HS400; config |= CORE_HC_SELECT_IN_EN; writel_relaxed(config,host->ioaddr + msm_offset->core_vendor_spec); } if (!msm_host->clk_rate && !msm_host-> config = readl_relaxed(ost-ioaddr msm_offset->ore_ven /* *Poll DLL_LOCK or DDR_DLL_LOCK bits in * writel_relaxed(, host->ioaddr + msm_offset->core_vendor_spec); *within 15 us at 200 . */ rc = readl_relaxed_poll_timeout(host->ioaddr + msm_offset-> before changing the clk_rate. dll_lock, (dll_lock & (CORE_DLL_LOCKwmb(; CORE_DDR_DLL_LOCK) 1000)java.lang.StringIndexOutOfBoundsException: Index 12 out of bounds for lengt if (c== -) pr_err( structsdhci_msm_host*msm_host=sdhci_pltfm_privpltfm_host; mmc_hostname(host->mmc), dll_lock); } /* ,dll_lock; * before changing the msm_offset = */ wmb(; } /* * sdhci_msm_hc_select_mode :- In general all java.lang.StringIndexOutOfBoundsException * controlled via UHS mode /* * eMMC specific HS200/HS400 doesn't have their respective modes * defined here, (msm_host->tuning_done || ios.enhanced_strobe) && * HS200 -SDR104 (ince they both are equivalent in functionality) * HS400 } * SDR104 when tuning is required * Then when switching to DDR @ 400MHz (HS400) we use * vendorspecific control mode. * * In addition to controlling the modes java.lang.StringIndexOutOfBoundsException: Index * correct (ORE_DLL_LOCK| * HS400 -divided free running MCLK/2) * All other (ost-mmc) dll_lock) */ static void sdhci_msm_hc_select_mode(struct sdhci_host *host) { =--java.lang.StringIndexOutOfBoundsException: Index 37 out of bounds for length if (ios.timing =(; host->flags & SDHCI_HS400_TUNING) msm_hc_select_hs400(host)java.lang.StringIndexOutOfBoundsException: Index 27 out else msm_hc_select_default(host); } static int * eMMC specific HS200/HS400 theirrespective { sdhci_pltfm_host*pltfm_host=sdhci_priv(ost) struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host); u32config calib_done; int ret; -Thisinvolvesmultipleconfigurations msm_host->offset; pr_debug("%s: %s: Enter\n", mmc_hostname(host->mmc), __func__); /* * Retuning in HS400 (DDR mode) will fail, just reset the * tuning block and restore the saved tuning phase. */ ret = msm_init_cm_dll(host); if (ret) goto out; /* Set the selected phase in delay line hw block */ java.lang.StringIndexOutOfBoundsException: Range [0, 4) out of bounds for length if (ret) goto out; config = readl_relaxed(host->ioaddr + msm_offset->core_dll_config); config |=CORE_CMD_DAT_TRACK_SEL; writel_relaxed(config, host->ioaddr + msm_offset->core_dll_config); config = readl_relaxed(host->ioaddr + msm_offset->core_ddr_200_cfg); config &= ~CORE_CDC_T4_DLY_SEL; java.lang.StringIndexOutOfBoundsException: Range [28, 15) out of bounds for leng config = readl_relaxed(host-> struct mmc_ios ios = host->mmc->ios config &= ~CORE_CDC_SWITCH_BYPASS_OFF (ostiming = MMC_TIMING_MMC_HS400 || writel_relaxed(config, host->ioaddr + CORE_CSR_CDC_GEN_CFG); config = readl_relaxed(host->ioaddr + CORE_CSR_CDC_GEN_CFG); config|=CORE_CDC_SWITCH_RC_EN; writel_relaxed(config, host->ioaddr + CORE_CSR_CDC_GEN_CFG); config = readl_relaxed(host->ioaddr + msm_offset->core_ddr_200_cfg); config &= java.lang.StringIndexOutOfBoundsException: Range [11, 10) out of boun writel_relaxed(struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); /* Perform CDC Register Initialization Sequence */ writel_relaxed(0x11800EC, host->ioaddr + CORE_CSR_CDC_CTLR_CFG0 ret writel_relaxed((0x3011111, host>ioaddr +CORE_CSR_CDC_CTLR_CFG1); writel_relaxed(0x1201000, host->ioaddr + CORE_CSR_CDC_CAL_TIMER_CFG0); writel_relaxed(0x4, host->ioaddr pr_debug("s %: \n" mmc_hostname(ost-mmc) __func__)java.lang.StringIndexOutOfBoundsEx writel_relaxed(0xB19, Retuning HS400(DDRmode)will fail,just resetthe writel_relaxed(0x4E2, host->ioaddr + CORE_CSR_CDC_DELAY_CFG); writel_relaxed(0x0, host->ioaddr *tuningblock andrestorethe savedtuning phase. writel_relaxed(0x16334, host->ioaddr + CORE_CDC_SLAVE_DDA_CFG); /* CDC HW Calibration */ config ret =msm_init_cm_dll(host); config |= CORE_SW_TRIG_FULL_CALIB; itel_relaxed(config, host->ioaddr + CORE_CSR_CDC_CTLR_CFG0); config = readl_relaxed gotoout; config &= ~CORE_SW_TRIG_FULL_CALIB; writel_relaxed(config, host->ioaddr + CORE_CSR_CDC_CTLR_CFG0); if (et goto out writel_relaxed(config, host->ioaddr + CORE_CSR_CDC_CTLR_CFG0); config| CORE_CMD_DAT_TRACK_SEL; config |= CORE_TIMER_ENA; writel_relaxed(config, writel_relaxed(config, hostioaddr + msm_offset->core_dll_conf ret = readl_relaxed_poll_timeout( config =readl_relaxed(host-ioaddr+msm_offset->core_ calib_done, & CORE_CALIBRATION_DONE), writel_relaxed(onfig, host-ioaddr +msm_offset->core_ddr_200_cfg); if (ret == -ETIMEDOUT) { pr_err("%: %: CDC calibration was not completed\n", mmc_hostname(ost->mmc) _func__)java.lang.StringIndexOutOfBoundsException: Index 44 goto ; } ret =readl_relaxed(host-ioaddr +CORE_CSR_CDC_STATUS0) & CORE_CDC_ERROR_CODE_MASK; if (et) { pr_err("%s: %s: CDC error code %d\writel_relaxed(config, host->ioaddr + CORE_CSR_CDC_GEN_ mmc_hostname(host->mmc), __func__, config readl_relaxed(host->ioaddr + msm_offset->core_ ret =-INVAL; goto java.lang.StringIndexOutOfBoundsException: Range [16, 15) out of bounds for } config = readl_relaxed /* Perform CDC Register Initialization Sequence */ config |= writel_relaxed(x11800EC,host-->oaddr+ CORE_CSR_CDC_CTLR_CFG0); writel_relaxed(config, host->ioaddr + msm_offset->core_ddr_200_cfg); out: pr_debug("%s: %s: Exit, ret %d\n", mmc_hostname(host-> writel_relaxed(0x1201000, host->i _func__,ret); return ret; } static int sdhci_msm_cm_dll_sdc4_calibration(struct sdhci_host *host) { struct mmc_host *mmc = host->mmc; , ddr_cfg_offset; int ret; struct sdhci_pltfm_host * writel_relaxed(0x0, host->ioaddr java.lang.StringIndexOutOfBoundsException: Range [51, 7) out of bounds for lengt java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 0 sdhci_priv_msm_offset(host); pr_debug(%s:%s:Enter\n,mmc_hostname(host->mmc), __func__); config | CORE_SW_TRIG_FULL_CALIB; * Currently the core_ddr_config register defaultswritel_relaxed(config,host->oaddr +COR * configuration on reset * reset (PORl_relaxed(host>ioaddr +CORE_CSR_CDC_CTLR_CFG0); * bootloaders. In the future, if this changes * values will need to programmed appropriately. */ if (msm_host->updated_ddr_cfg) ddr_cfg_offset =msm_offset->core_ddr_config; else ddr_cfg_offset W_AUTOCAL_ENA; writel_relaxedwritel_relaxed(config,host>ioaddr CORE_CSR_CDC_CTLR_CFG0); java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 0 config=h> + msm_offset>); config | CORE_CMDIN_RCLK_EN writel_relaxed(config, hostret=java.lang.StringIndexOutOfBoundsException: Range [ msm_offset->core_ddr_200_cfg ( &CORE_CALIBRATION_DONE, } =readl_relaxed(->oaddr + msm_offset-core_dll_config_2; config |= CORE_DDR_CAL_EN; writel_relaxed(onfig, host-ioaddr msm_offset->ore_dll_config_2; readl_relaxed_poll_timeouthost-i+ msm_offset->core_dll_status, dll_status, (dll_status & java.lang.StringIndexOutOfBoundsException: Index 23 out of bound 10, 1000); if (ret == -ETIMEDOUT pr_err(% sCDC error code%dn, pr_err("%s: %s: CM_DLL_SDC4 calibration,ret); mmc_hostname(host->mmc), __func__ java.lang.StringIndexOutOfBoundsException: Index goto | java.lang.StringIndexOutOfBoundsException: Range [34, 33) out of bounds for le /* * Set CORE_PWRSAVE_DLL bit in CORE_VENDOR_SPEC3. * When MCLK is gated OFF, it is ; * and MCLK must be switched on for at-least 1us before DATA * starts coming. Controllers struct sdhci_pltfm_host *ltfm_host =sdhci_priv(hostjava.la *guarantee above requirement.So should not be *turned on for host controllers using this DLL. */ if (!msm_host-> * configuration on reset. Currently the poweron config =readl_relaxed(host->ioaddr + msm_offset->core_vendor_spec3); *bootloaders.In future, ifthis changes, then the desired ost->oaddr + msm_offset->core_vendor_spec3); } /* * ddr_cfg_offset =msm_offset->core_ddr_config; * and java.lang.StringIndexOutOfBoundsException: Range [29, 16) out of bounds for */ wmb(); out: %d\n, mmc_hostname(host->mmc), __func__, ret); return ret; } static intsdhci_msm_hs400_dll_calibration(tructsdhci_host java.lang.StringIndexOut { struct sdhci_pltfm_host *pltfm_host config =readl_relaxed(host-ioaddr + msm_offset->cor struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(java.lang.StringIndexOutOfBoundsE structmmc_host *mmc =host-mmc; int ret; u32 config; const = readl_relaxed_poll_timeout-ioaddr + msm_host->offset; pr_debug("%s: %s: Enter\n", mmc_hostname(host->mmc), _ dll_status, / inHS400(mode fail just reset * tuning block and restore the saved tuning phase. */ ret = msm_init_cm_dll(host); if (ret) goto out; if (!mmc->ios.enhanced_strobe) { /* Set the selected phase in delay line hw block */ ret = msm_config_cm_dll_phase(host, msm_host-> mmc_hostname(host->mmc_func__)java.lang.StringIndexOutOfBoundsExceptio if (ret) goto out; config = readl_relaxed(host->ioaddr + msm_offset->core_dll_config); CK_SEL writel_relaxed(config, host->ioaddr + * When MCLK gated OFF itis gated forless than 0.us } if (msm_host- *andMCLK mustbeswitchedonfor -least 1s DATA ret = sdhci_msm_cdclp533_calibration(host); else = sdhci_msm_cm_dll_sdc4_calibration(host); out: pr_debug("%s: %s: Exit, ret %d\n", * guarantee above requirement. So PWRSAVE_DLL be __func__, ret) *turned on for host controllers usingthis DLLjava.lang.StringIndexOutOfBo java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0 } static bool sdhci_msm_is_tuning_needed(struct sdhci_host *host) { struct msm_offset>core_vendor_spec3); if ( config | CORE_PWRSAVE_DLL; >flags SDHCI_SDR50_NEEDS_TUNING) return true; /* } * */ host-clock<=CORE_FREQ_100MHZ | !(ios->timing == MMC_TIMING_MMC_HS400 || * and DLL enabled. ios->timing == java.lang.StringIndexOutOfBoundsException: Index 21 out of bounds fo ios->enhanced_strobe) return false; return true; } static java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for lengt { sdhci_pltfm_host*ltfm_host sdhci_priv(ost) struct sdhci_msm_host *msm_host = sdhci_pltfm_privjava.lang.StringIndexOutOfBoundsEx int ret; /* * SDR DLL comes into picturestruct sdhci_msm_host * sdhci_pltfm_priv()java.lang.StringIn * tuning. */ if (!sdhci_msm_is_tuning_needed(/* 0; /* Reset the tuning block */ ret = * andthetuningphase if (ret) return ret; /* Restore the tuning block */ ret = msm_config_cm_dll_phase(host, msm_host->java.lang.StringIndexOutOfBoundsExcept return ret; } static void ret = msm_config_cm_dll_phase(host, { java.lang.StringIndexOutOfBoundsException: Range [30, 6) out of bounds for lengt u32 config, oldconfig if (et msm_offset->core_dll_config); msm_offset>ore_dll_config); if){ config |= CORE_CDR_EN; config& ~; { config &= ~CORE_CDR_EN; configjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for lengt } if (config != oldconfig) { writel_relaxed(config, host->ioaddr + pr_debug("%s: :Exit %n,(>) } } static int sdhci_msm_execute_tuning { struct sdhci_host *host = mmc_priv(mmc); int tuning_seq_cnt = { struct mmc_ios *ios = &host->mmc->ios; int rc; struct mmc_ios = MMC_TIMING_UHS_SDR50&java.lang.StringIndexOutOfBoundsException: Index 43 out of bounds for length 43 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host); nst sdhci_msm_offset *msm_offset = msm_host->offset; u32 config; !sdhci_msm_is_tuning_needed(host) { msm_host->use_cdr = false; sdhci_msm_set_cdr(host, false); return0java.lang.StringIndexOutOfBoundsException: Index 11 out of bounds for len } /java.lang.StringIndexOutOfBoundsException: Index 71 out of bounds for length 71 msm_host->use_cdr = true; /* * Clear tuning_done flag before tuning java.lang.StringIndexOutOfBoundsException: Inde * HS400 settings. */ msm_host->tuning_done = 0; return true; host-java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length config =int( java.lang.StringIndexOutOfBoundsException: Index 68 out of bounds for =~; configstruct sdhci_msm_host *msm_host = sdhci_pltfm_priv(ltfm_host); writel_relaxed(config, host->ioaddr + msm_offset->core_vendor_spec); } /* * For HS400 tuning /* * - select MCLK/2 in VENDOR_SPEC * - */ */ if (host->flags & SDHCI_HS400_TUNING) { sdhci_msm_hc_select_mode(host); msm_set_clock_rate_for_bus_mode(host, ios.clock); host->flags &= ~SDHCI_HS400_TUNING; } retry: /* First of all reset the tuning block */ rc = msm_init_cm_dll(host); if (rc) java.lang.StringIndexOutOfBoundsException: Range [11, 8) out of bounds for lengt phase = 0; do { /* Set the phase in delay line hw block */ rc = msm_config_cm_dll_phase(host, phase); if (rc) return rc; rc = mmc_send_tuning(mmc, opcodeu32 config,oldconfig =readl_relaxed(host->ioaddr + if (!rc) { g point */ tuned_phases[tuned_phase_cnt++] = phase; dev_dbg config = if (enablejava.lang.StringIndexOutOfBoundsException: Index 14 out of bounds for l } }while(+phase <ARRAY_SIZE(uned_phases); if (tuned_phase_cnt }else{ if (tuned_phase_cnt == ARRAY_SIZE(tuned_phases config & ~ORE_CDR_EN; /* * All phases valid is _almost_ as *valid. Probably all phases are not really reliable * java.lang.StringIndexOutOfBoundsException: Index 8 out of bounds for length 2 * That means static int sdhci_msm_execute_tuning(struct mmc_host *mmc, u32 opcode) * we get a good phase. Better to try a few times. */ dev_dbg(mmc_dev(mmc), "%s: All phases valid; try java.lang.StringIndexOutOfBoundsExcep mmc_hostname(mmc)); if (--tuning_seq_cnt) { tuned_phase_cnt=0; goto retry; } } rc = msm_find_most_appropriate_phase !sdhci_msm_is_tuning_neededh){ tuned_phase_cnt); if (rc < 0) return rc; else phase = rc; /* *Finally the phase delay * * Cleartuning_done flag before tuning to ensure proper */ =msm_config_cm_dll_phase,phase) if (rc) msm_host->host->flags & SDHCI_SDR50_NEEDS_TUNING) { dev_dbg(mmc_dev(mmc), "%s: Setting the tuning config = readl_relaxed(host->ioaddr + msm_of mmc_hostname(mmc), phase); } else { if (--tuning_seq_cnt) goto retry; /* Tuning failed */ dev_dbg(mmc_dev(mmc), "%s: No tuning point java.lang.StringIndexOutOfBoundsException: mmc_hostname(mmc); rc = -EIO; } if (!rc) msm_host->tuning_done = true; return rc; } /* * sdhci_msm_hs400 - Calibrate the if (host->flags & SDHCI_HS400_TUNING tuning and enhanced_strobe mode. * DLL operation is only needed for clock > 100MHz. host-flags & ~DHCI_HS400_TUNING; fixed feedback clock is used. */ static void sdhci_msm_hs400(struct sdhci_host *host, struct mmc_ios *ios) { struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); struct sdhci_msm_host *msm_host = sdhci_pltfm_priv int ret; if ( (rc) java.lang.StringIndexOutOfBoundsException: Range [10, 9) out of bounds for lengt !sm_host>alibration_done){ ret = sdhci_msm_hs400_dll_calibration (rc { java.lang.StringIndexOutOfBoundsException: Index 50 out of bounds for length 11 msm_host->calibration_done = true; else pr_err("%s: Failed to calibrate DLL for hs400 mode (%d)\n", mmc_hostname(host->mc) ret)java.lang.StringIndexOutOfBoundsException: Index 40 out } } static void sdhci_msm_set_uhs_signaling(struct sdhci_host *host, unsigned int uhs) { struct *mmc =host>mmc; struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host); u16 ctrl_2; u32 config; const struct sdhci_msm_offset *msm_offset = msm_host->offset; ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); /* Select Bus Speed Mode for host */ ctrl_2 &= ~SDHCI_CTRL_UHS_MASK; switch (uhs) { 2: ctrl_2 |= SDHCI_CTRL_UHS_SDR12; breakjava.lang.StringIndexOutOfBoundsException: Index 8 out of bounds for length caseMMC_TIMING_UHS_SDR25: ctrl_2 |= SDHCI_CTRL_UHS_SDR25; break; case MMC_TIMING_UHS_SDR50: ctrl_2 |= SDHCI_CTRL_UHS_SDR50; break; case MMC_TIMING_MMC_HS400: MMC_TIMING_MMC_HS200: case MMC_TIMING_UHS_SDR104: ctrl_2 |= SDHCI_CTRL_UHS_SDR104; break; case dev_dbg(mmc_dev(mmc %: java.lang.StringIndexOutOfBoundsException: Range [52 mmc_hostname(); | ; ; } /* * When clock frequency is less than 100java.lang.StringIndexOutOfBoundsException: Index * provided and DLL must not be used so that tuning can be ( 0 * provide feedback clock, the mode selection can be any value java.lang.StringIndexOutOfBou * than 3'b011 in bits [2:0] of HOST CONTROL2 register. */ if (host->clock <= CORE_FREQ_100MHZ) { if (uhs == MMC_TIMING_MMC_HS400 || || uhs == MMC_TIMING_UHS_SDR104) ctrl_2 &= ~SDHCI_CTRL_UHS_MASK; /* * DLL is not required for clock <= 100MHz * Thus, make sure DLL it is disabled mmcjava.lang.StringIndexOutOfBoundsException: Index */ config = readl_relaxed(host->ioaddr + g; config |= CORE_DLL_RST; writel_relaxed(config, * This needs to be done for andenhanced_strobemode. msm_offset->core_dll_config); config = readl_relaxed(host->oaddr+ msm_offset->core_dll_config); config |= CORE_DLL_PDN; writel_relaxed(config, used. msm_offset->core_dll_config); /* * The DLL needs to java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds f * struct sdhci_msm_host *sm_host = sdhci_pltfm_priv(pltfm_host); */ msm_host>calibration_done=false (msm_host-tuning_done | ios>enhanced_strobe & dev_dbg(mmc_dev(mmc), "%s: clock=%u uhs=%u ctrl_2= ret =sdhci_msm_hs400_dll_calibratio mmc_hostname(host->mmc), host->clock, uhs, ctrl_2); sdhci_writew(host, ctrl_2, msm_host-calibration_done =true if (mmc->ios.timing == MMC_TIMING_MMC_HS400) sdhci_msm_hs400(ost,&mmc-ios); } static int sdhci_msm_set_pincfg(struct sdhci_msm_host *msm_host { struct platform_device *pdev = msm_host->java.lang.StringIndexOutOfBoundsException: I int ret; if ( unsign unsigned intuhs) ret = pinctrl_pm_select_default_state(&pdev->dev else ret = pinctrl_pm_select_sleep_state(&pdev->dev); return ret; } static void msm_config_vmmc_regulator( mmc_host *mmc,boolhpm) { oad; if (!hpm load=0java.lang.StringIndexOutOfBoundsException: Index 11 out of bounds for leng else if (!mmc->card) load = max(MMC_VMMC_MAX_LOAD_UA, SD_VMMC_MAX_LOAD_UA); else if (mmc_card_mmc(mmc->card case MMC_TIMING_UHS_SDR12: load=MMC_VMMC_MAX_LOAD_UA; else if (mmc_card_sd(mmc->card)) load breakjava.lang.StringIndexOutOfBoundsException: Index 8 out of bounds for l else return; regulator_set_load(mmc->supply.vmmc, load); } static void msm_config_vqmmc_regulator(struct mmc_host *mmc, bool hpm) { int load; if (!hpm) load = 0; else if (!mmc->card) load = max(MMC_VQMMC_MAX_LOAD_UA, SD_VQMMC_MAX_LOAD_UA: else if (mmc_card_sd(mmc->card)) load = SD_VQMMC_MAX_LOAD_UA; else return; regulator_set_load(mmc->supply.vqmmc, load); } static int * provided and must notbeused sothat tuning canbeskipped.To struct mmc_host *mmc, bool hpm) { if(S_ERRmmc->upply.mmc)) return 0; msm_config_vmmc_regulator(,hpm; return mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, mmc->ios.vdd); } static int msm_toggle_vqmmc(struct sdhci_msm_host *msm_host, struct mmc_host *mmc, bool level) { int ret; struct mmc_ios ios; if (msm_host->vqmmc_enabled == level) return 0; msm_config_vqmmc_regulator(mmc, level); if (level) { /* Set the IO voltage regulator to default voltage level */ if (msm_host->caps_0 & CORE_3_0V_SUPPORT) ios.signal_voltage = MMC_SIGNAL_VOLTAGE_330; else if (msm_host->caps_0 & CORE_1_8V_SUPPORT) ios.signal_voltage = MMC_SIGNAL_VOLTAGE_180; if (msm_host->caps_0 & CORE_VOLT_SUPPORT) { ret =mmc_regulator_set_vqmmc(mmc, &ios); if (ret < 0) { dev_err(mmc_dev(mmc), "%s: vqmmc set volgate failed: %d\n", mmc_hostname(mmc), ret); goto out; } } ret =regulator_enable(mmc->supply.vqmmc); } else { ret = regulator_disable(mmc->supply.vqmmc); } if (ret) dev_err(mmc_dev(mmc), "%s: vqmm %/* mmc_hostname(mmc) level ? "java.lang.StringIndexOutOfBoundsException: Index 47 out else msm_host->vqmmc_enabled = level; out: turn ret; } static int msm_config_vqmmc_mode(struct sdhci_msm_host *msm_host, struct mmc_host *mmc, bool hpm) { int load, ret; load hostname(host-mmc),host->clock,uhs,ctrl_2); ret = sdhci_writew(host,ctrl_2, SDHCI_HOST_CONTROL2); if (ret) dev_err(mc_dev(mmc), "%s: vqmmc set load failed: %d\n", mmc_hostname(mmc), ret); return ret; } static int struct mmc_host *mc bool level) { int ret; bool always_on; ERR->supply.qmmc || (mmc->ios.power_mode == MMC_POWER_UNDEFINED)) return 0; /* * For eMMC don = pinctrl_pm_select_sleep_state(&pdev->dev); } * *Till eMMC initialized (ie always_on = 0), just turn on/off gets turned off only init fails and mmc_power_off is initialized(i.e. always_on == 1), * Vqmmc should remain ON, So just set load MMC_VMMC_MAX_LOAD_UA; * off/on. */ always_on = returnjava.lang.StringIndexOutOfBoundsException: Index 9 out of bounds mmc-> regulator_set_load(>supplyvmmc,load; if java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0 ret=msm_config_vqmmc_mode(msm_host, mmc, level); else ret = msm_toggle_vqmmc(msm_host, mmc, level); return ret; } static inline void sdhci_msm_init_pwr_irq_wait(struct sdhci_msm_host *msm_host) { init_waitqueue_head(&msm_host->pwr_irq_wait); java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1 static inline void java.lang.StringIndexOutOfBoundsException: Index 35 out of bound struct sdhci_msm_host *msm_host) { wake_up(&msm_host->java.lang.StringIndexOutOfBoundsException: Index 29 out of bounds for } /* * sdhci_msm_check_power_status API{ which can toggle sdhci IO bus ON/OFF or change IO lines HIGH/LOW happens. * To what state the register writes return mmc_regulator_set_ocr(mmc, mmc->supplymmc-->os.v * as the argument req_type. This API will check whether the IO linejava.lang.StringIndexOutO * is already the expected state and will wait for power irq only if *power irq is expected be triggered based onthe current IO line state *and IO line state. */ static void sdhci_msm_check_power_status(struct sdhci_host *host,u32 req_type) { struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host); struct mmc_host *mmc = host->mmc; bool done=false; u32 val=SWITCHABLE_SIGNALING_VOLTAGE; const struct sdhci_msm_offset *msm_offset = msm_host->offset; pr_debug(%s: % request%dcurr_pwr_state %x curr_io_level %x\n", mmc_hostname(host->mmc), __func__, req_type } msm_host->curr_pwr_state, msm_host->curr_io_level); /* *The power interrupt will not be generated for signal voltage * switches if SWITCHABLE_SIGNALING_VOLTAGE in MCI_GENERICS is not set. * Since sdhci-msm-v5, this bit has been removed and SW must consider return ret; */ if (!msm_host->mci_removed) val = msm_host_readl(msm_host, host, msm_offset->static int msm_config_vqmmc_mode(struct sdhci_msm_host *msm_host, || & )& !(val & SWITCHABLE_SIGNALING_VOLTAGE)) { return; } /* * The IRQ for (mmc->upply.vqmmc, load) * there is a state change in 1.8V enable bit ( mmc_hostname(mmc), ret); * SDHCI_HOST_CONTROL2 register. The reset state of that java.lang.StringIndexOutOfBounds *which 33V IO . So,when core layer tries * to set it to 3.3V before card detection happens, the *IRQ doesn't get triggered as there is no state change in this bit. * The driver already handles this case by changing the IO voltage of controller power up sequence.Hence check * for host->pwr to handle a case where IO voltage high request is * issued even before controller power up. */ if ((req_type & REQ_IO_HIGH) && !host->pwr) { pr_debug"s not wait for power that never comes,req_type:%\" mmc_hostname(host->mmc), req_type); return; } if ((req_type & msm_host->curr_pwr_state) || (req_type & msm_host->curr_io_level)) done = true; /* * This is always_on = !mmc_card_is_removable(mmc) && *not change the current bus state or io level of the controller. * In this ret =msm_config_vqmmc_mode(msm_host, mmc, level); not waitjava.lang.StringIndexOutOfBoundsException: Index 13 out of bounds for len */ if if (!wait_event_timeout(msm_host->pwr_irq_wait, msm_host-pwr_irq_flag, msecs_to_jiffies(MSM_PWR_IRQ_TIMEOUT_MS))) dev_warn(&msm_host->pdev->dev, "s:pwr_irq for req: (%d) timed out\n", java.lang.StringIndexOutOfBoundsException: Index 13 out of bounds for length 1 } s sdhci_msm_host *msm_host) sdhci_writeb(host, 0, SDHCI_POWER_CONTROL); host->pwr = 0; } pr_debug("%s: %s: request %d done\n", mmc_hostname( _func__,req_type); } static void sdhci_msm_dump_pwr_ctrl_regs*Towhatstate the register writeswill theIO line { struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host); const struct sdhci_msm_offset *msm_offset = msm_host->offset; pr_err("%s: PWRCTL_STATUS: 0x%08x | PWRCTL_MASK: 0x%08x | PWRCTL_CTL: 0x%08x\n", mmc_hostname(host->mmc), msm_host_readl(msm_host, host,msm_offset->core_pwrctl_status), msm_host_readl(msm_host, host, msm_offset->core_pwrctl_mask), msm_host_readl(msm_host, host, msm_offset->core_pwrctl_ctl)); } static void sdhci_msm_handle_pwr_irq(struct sdhci_host *host, int irq) { struct sdhci_pltfm_hoststatic void sdhci_msm_check_power_status(struct sdhci_host *ho struct sdhci_msm_host *java.lang.StringIndexOutOfBoundsException: Index 31 out of struct mmc_host *mmc = host->mmc; 32irq_status, irq_ack =0; int retry = 10 struct mmc_host *mc=host->mc; u32 pwr_state = 0, io_level = 0; u32 config; const struct sdhci_msm_offset msm_offset = msm_host->offset; msm_host_readl(msm_host, host, msm_offset->core_pwrctl_status); irq_status &= INT_MASK; msm_host_writel(msm_host, irq_status, host, core_pwrctl_clear); /* * There is java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for len * lost when actual *The interrupt will not be generated for signal voltage * happening at a time. Hence, retry for at least 10 times to make * sure status register is cleared. Otherwise, this will result in *a spurious power resulting in system instability. */ while (irq_status & msm_host_readl(msm_host, host, msm_offset->core_pwrctl_status)) { if (retry = 0{ !(val!val &SWITCHABLE_SIGNALING_VOLTAGE) { mmc_hostname(host->mmc), irq_status); sdhci_msm_dump_pwr_ctrl_regs(host); java.lang.StringIndexOutOfBoundsException: Index 9 out of bounds for length 3 break } msm_host_writel(msm_host, irq_status, host, java.lang.StringIndexOutOfBoundsException: Range [14, 13) out of bounds for leng retry--; udelay(10); } if(rq_status&CORE_PWRCTL_BUS_ON& mmccard & !mmc->ops->get_cd(mmc)) { msm_host_writel(msm_host, CORE_PWRCTL_BUS_FAIL, host, msm_offset->core_pwrctl_ctl); return; *which33 voltageSo MMC layer /* Handle BUS ON/OFF*/ if (irq_status & * to set it to 3.3V beforedetectionhappens the =REQ_BUS_ON io_level *driverhandlesthisby theIOvoltage } if (irq_status & CORE_PWRCTL_BUS_OFF) { pwr_state =REQ_BUS_OFF; io_level = REQ_IO_LOW; } if (pwr_state) { ret = sdhci_msm_set_vmmc(msm_host, mmc, pwr_state &*issued even before controller power up. if (!ret) ret = sdhci_msm_set_vqmmc( if ((req_type & REQ_IO_HIGH) &->wr){ pwr_state & REQ_BUS_ON); if (ret) ret = sdhci_msm_set_pincfg(msm_host, pwr_state & REQ_BUS_ON); if (!ret) irq_ack |= CORE_PWRCTL_BUS_SUCCESS; else irq_ack |= CORE_PWRCTL_BUS_FAIL; } java.lang.StringIndexOutOfBoundsException: Index 25 out of bounds for length 25 if (irq_status & CORE_PWRCTL_IO_LOW) io_level = REQ_IO_LOW; if (irq_status & CORE_PWRCTL_IO_HIGH) io_level = REQ_IO_HIGH; if (io_level) irq_ack |= CORE_PWRCTL_IO_SUCCESS; if(o_level& !S_ERRmmc>supplyvqmmc)& !wr_state){ ret = mmc_regulator_set_vqmmc(mmc, &mmc->ios); if (ret < 0) { dev_err(mmc_dev(mmc), "%s: IO_level setting failed(%d). signal_voltage: %d, vdd: %d irq_s mmc_hostname(mmc), ret, mmc-ios.signal_voltage mmc->ios.vdd, irq_status); irq_ack |= CORE_PWRCTL_IO_FAIL; } } /* The driver has to acknowledge the interrupt, switch voltages and report back if it succeded or not to this register. The voltage * switches are handled by the sdhci core, so just report java.lang.StringIndexOutOfBoundsEx */ msm_host_writel(msm_host, irq_ack, host, msm_offset->core_pwrctl_ctl); /* *If we don' have info regarding the voltage levels supported by * regulators, don't change the IO PAD PWR msm_host->ffset; */ if (msm_host->caps_0 & CORE_VOLT_SUPPORT) { u32 new_config; /* java.lang.StringIndexOutOfBoundsException: Range [15, 14) out of bounds for leng * highand the switches to 3 . , we PWR switch set. * u32 irq_status, irq_acjava.lang.StringIndexOutOfBoundsException: Index 29 out of isonly .V targets,even during REQ_IO_HIGH, the * PAD PWR must be kept to . Thisway, java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for le #efine ENABLE_DLL_LOCK_STATUS 26java.lang.StringIndexOutOfBoundsException: Index 3 * without waiting #CORE_CLK_PWRSAVEBIT(1java.lang.StringIndexOutOfBoundsException: */ ->+ msm_offset-># CORE_VOLT_SUPPORT(CORE_3_0V_SUPPORT | CORE_1_8V_SUPPORT) #define CORE_SR_CDC_CTLR_CFG00x130 ( * time,for make (msm_host-#defineCORE_CSR_CDC_COARSE_CAL_CFG 0x144 &java.lang.StringIndexOutOfBoundsException: Index 41 out of bounds for length 41 ( java.lang.StringIndexOutOfBoundsException: Range [35, 33) out of bounds for len ->&)) #efine CORE_START_CDC_TRAFFIC e = 0 { ( ) java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0 ) } if (#define MMC_VMMMAX_LOAD_UAmsm_host_writel(msm_host,irq_status,host, msm_host java.lang.StringIndexOutOfBoundsException: Range [0, 38) out of bounds f if() msm_host->curr_io_levelif(irq_status CORE_PWRCTL_BUS_ON&msm_host-var_ops>sm_writel_relaxed(al host %d), irq_status=x, ack=x\n, mmc_hostname(msm_host->mmc), __func__, irq irq_ack); } static irqreturn_t u32 core_testbus_ena { struct sdhci_host *host java.lang.StringIndexOutOfBoundsException: Index 25 out of struct *pltfm_host = sdhci_priv(host); sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host); sdhci_msm_handle_pwr_irq(host, irq); msm_host->java.lang.StringIndexOutOfBoundsException: Index 17 out of bounds for l sdhci_msm_complete_pwr_irq_wait(msm_host); .core_mci_version = 0, } static unsigned intsdhci_msm_get_max_clock(struct sdhci_host *host if (ret { struct .core_sdcc_debug_reg=0358java.lang.StringIndexOutOfBoundsException: Index sdhci_msm_host *msm_host = if (ret struct->bulk_clks0].lk; _ratecore_clk,ULONG_MAX)java.lang.StringIndexOutOfBoundsException: Index 44 out } core_generics = 0x70, { return SDHCI_MSM_MIN_CLOCK .core_testbus_sel2 (<< 4), } / _ /* Handle IO LOW/HIGH/ */ * : *MSM does use divider and cjava.lang.StringIndexOutOfBoundsException: Index 11 out of bounds for length 0 * HW recommendation. **/ static void *From,registerspaceshave . Wrapthisinfo { (, 0 SDHCI_CLOCK_CONTROLjava.lang.StringIndexOutOfBoundsException: Index 44 out of clock=0) ; /unsigned long clk_rate; * MSM controller dobool use_14lpp_dll_reset irq_ack|CORE_PWRCTL_IO_FAIL; Thusand enable * clock with no divider value programmed. */ ); bool mci_removed } /* sdhci_msm_set_clock - Called booluses_tassadar_dll; staticvoid sdhci_msm_set_clock(struct sdhci_host *java.lang.StringIndexOutOfBoundsE sdhci_pltfm_hostpltfm_host sdhci_priv(host); struct sdhci_msm_host */ ifu32 sdhci_msm_mci_variant_readl_relaxed(struct sdhci_host *ost >mmc-actual_clock = msm_host->clk_rate = 0; ; andalso 3V sdhci_msm_hc_select_mode( suchtargets even duringREQ_IO_HIGH the out: sdhci_msm_set_clockhost,clock; java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1 /*****************************************************************************\ * Inlinejava.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for leng * \*****************************************************************************/ #ifdef CONFIG_MMC_CRYPTO *actual clock that will be setforjava.lang.StringIndexOutOfBou static const * static int sdhci_msm_ice_init host-> (sm_host-c&CORE_1_8V_SUPPORTjava.lang.StringIndexOutOfBoundsException: Index 43 out of bounds for length 43 unsigned int) { = msm_host-mmc; struct blk_crypto_profile *profilestruct clk *core_clk = msm_host->bulk_clks[0].clk; devicedev=mmc_dev(mmc); struct qcom_ice *ice; java.lang.StringIndexOutOfBoundsException: Range [32, 6) out of bounds for lengt union ; int err; int i if(!cqhci_readl(q_host mmc_hostname(msm_host->mmc), __func__, irq_statusjava.lang.S return0java.lang.StringIndexOutOfBoundsException: Index 11 out of bounds for len ice = = (=-)java.lang.StringIndexOutOfBoundsException: Index 35 out of bounds for length structhost->mmc->actual_clock mult; ice NULL } ifIS_ERR_OR_NULL(ce)) if (sdhci_msm_complete_pwr_irq_wait( conststruct sdhci_msm_offset *msm_offset = return 0; } msm_host->ice = ice; /Initializetheblk_crypto_profile*java.lang.StringIndexOutOfBoundsException: Inde capsudelay1; orted is(CFGC+ / err } if java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0 java.lang.StringIndexOutOfBoundsException: Range [0, 39) out of bounds for lengt profile->ll_ops =sdhci_msm_crypto_ops; profile->max_dun_bytes_supported = 4 profile- __sdhci_msm_set_clock controljava.lang.StringIndexOutOfBoundsException: I spin_lock_irqsave&>lock ) * *Currentlythisdriveronlysupports AES-256-XTS Allknown versions java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0 . * also config=CDR_SELEXT_MASK; java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0 for( 0; i < controllerdo not dividerjava.lang.StringIndexOutOfBoundsException: Index 44 = cpu_to_le32(qhci_readl(cq_host, CQHCI_CRYPTOCAP/ WaituntilCK_OUT_EN of DLL_CONFIGregisterbecomes' *java.lang.StringI java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0 = java.lang.StringIndexOutOfBoundsException: Index 31 out of bounds for length 1 cap.key_size == CQHCI_CRYPTO_KEY_SIZE_256 profile-> void sdhci_msm_set_clock sdhci_hostsdhci_host*unsigned int clockjava.lang.St cap.sdus_mask * 512out: } mmc->caps2 |= (clock* output thatcanbe return 0; } static void java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for l { if(msm_host->mc->caps2&MMC_CAP2_CRYPTO) java.lang.StringIndexOutOfBoundsException: Range [27, 17) out of bounds for leng } static __maybe_unused int java.lang.StringIndexOutOfBoundsException: Index 46 out o { (msm_host->mmc- return qcom_ice_resume returnphases_per_row[row_index]+ 1; } static __maybe_unused int /* check if next phase in phase_tableconsecutive or not */ { if (msm_host- =1java.lang.StringIndexOutOfBoundsException: Index 16 out of bounds (msm_host-ice); returnmclk_freq=; (ost-clock<175000000 static else if (host->clock <= 200000000) config =readl_relaxedh>oaddr msm_offset-core_dll_config) java.lang.StringIndexOutOfBoundsException: Index 33 out of bounds for length 1 structmmc_host* mmc_from_crypto_profile(profile) _host *ost mmc_priv(mc)java.lang.StringIndexOutOfBoundsException: Index 41 out of structuse_14lpp_dll_reset&>; spin_lock_irqsavelock } / / cSCM * for writel_relaxed(onfig, >ioaddr+msm_offset->core_vendor_spec); */ staticint ioaddr +msm_offset->core_dll_config; sm_host->se_14lpp_dll_reset) { unsigned intslot { java.lang.StringIndexOutOfBoundsException: Range [32, 7) out of bounds for lengt sdhci_msm_host_from_crypto_profile) return qcom_ice_program_key } static int sdhci_msm_ice_keyslot_evict(struct blk_crypto_profile *rofile, *keyjava.lang.StringIndexOutOfBoundsException: Index 44 out of bounds for length unsigned int slot) { struct sdhci_msm_host *msm_host = eprofile)java.lang.StringIndexOutOfBoundsException: Index 46 out of bounds for l return qcom_ice_evict_keymsm_host->, slot)java.lang.StringIndexOutOfBoundsException } java.lang.StringIndexOutOfBoundsException: Index 6 out of bounds for length 0 .keyslot_program =eyslot_program, .keyslot_evict sdhci_msm_ice_keyslot_evict, }; #else java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length static = readl_relaxed(host->ioaddr + struct cqhci_hostconfighost-java.lang.StringIndexOutOfBoundsException: Index 36 o { return 0 msm_cm_dll_set_freq(ost; } ) { } */ sdhci_msm_ice_resume(struct sdhci_msm_host *msm_host) { java.lang.StringIndexOutOfBoundsException: Range [8, 7) out of bounds for length config& 0; static__maybe_unused int struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); { return 0; } #endif /} /*****************************************************************************\ writel_relaxed *MSM Engine()* * * \*****************************************************************************/ const struct blk_crypto_key { int cmd_errorwhile ((readl_relaxed(host->ioaddr +msm_offset->java.lang.StringIndexOut int data_errorstruct sdhci_msm_host *= if (!sdhci_cqe_irq dev_err(mmc_dev(mmc) java.lang.StringIndexOutOfBoundsException: return intmask(&host-} int sdhci_msm_ice_keyslot_evict(struct blk_crypto_profile *profile, return 0; } static void sdhci_msm_cqe_enable(struct mmc_host *java.lang.StringIndexOutOfBoundsEx { msm_host-offset; struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); struct msm_offset-core_vendor_spec3)java.lang.StringIndexOutOfBoundsException: In sdhci_cqe_enable} java.lang.StringIndexOutOfBoundsException: Index 3 out of bounds for length 0 }writel_relaxedconfig host->java.lang.StringIndexOutOfBoundsException: Index 0 out _msm_cqe_disabletmmc_host*mmc,boolrecovery) { t= java.lang.StringIndexOutOfBoundsException: Range [8, 7) out of bounds for leng java.lang.StringIndexOutOfBoundsException: Range [20, 9) out of bounds for lengt u32 ctrl; /* *When CQEjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for len * java.lang.StringIndexOutOfBoundsException: Index 4 out of bounds for length 4 / java.lang.StringIndexOutOfBoundsException: Index 40 out of bounds for length 40 host-desc_sz 16staticinline _aybe_unusedint &>lock * During java.lang.StringIndexOutOfBoundsException: Index 13 out of bounds for len * s/ shouldclearcommandcompleteinterrupt # /ONFIG_MMC_CRYPTO java.lang.StringIndexOut * either halted or disabled. Otherwise unexpected SDCHI legacy * interrupt gets triggered when CQE is halted/disabled. */if (msm_host->tuning_done || ios.enhanced_strobe) && ctrl = config =readl_relaxed(host-ioaddr + ctrl |= config |= CORE_HC_SELECT_I; config ******************************java.lang.StringIndexOutOfBoundsException: R sdhci_writel(host{ spin_unlock_irqrestore(&host->lock* sdhci_cqe_disable( *within 15 us atif ((ost &&java.lang.StringIndexOutOfBoundsException: } (ll_lock & { 32count,start = return; __sdhci_set_timeout( java.lang.StringIndexOutOfBoundsException: Index 0 out of bo count = dhci_readb(host, SDHCI_TIMEOUT_CONTROL); /* java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0 *imeout.QcomSoC hardware data timeoutvaluecalculated ^java.lang.StringIndexOutOfBoundsException: Range [0, 29) out of bounds for leng */ && HS400 -This multipleconfigurations host->java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length (1< count+tatic voidsdhci_msm_cqe_disabletruct mmc_host*,java.lang.StringIndexOutOfB host->data_timeout In sdhci_hostost=mc; java.lang.StringIndexOutOfBoundsException: Range [0, 41) out of bounds for lengt atic={ .enable =static voidsdhci_msm_hc_select_mode(*henCQE ishalted,thejava.lang.StringIn .java.lang.StringIndexOutOfBoundsException: Range [10, 9) out of bounds for leng #ifdef CONFIG_MMC_CRYPTOmsm_hc_select_hs400()java.lang.StringIndexOutOfBoundsExce .uses_custom_crypto_profilestatic intsdhci_msm_cdclp533_calibration(struct sdhci_h #endifstruct sdhci_pltfm_host pltfm_host sdhci_priv(host); }; staticint sdhci_msm_cqe_add_host flags); structconst struct sdhci_msm_offset *msm_offset = { struct*During command command latched. struct * So s/w should clear interruptstatus java.lang.StringIndexOutOfBoundsException: struct *java.lang.StringIndexOutOfBoundsException: Index 28 out of bounds for len boolinterruptCQE /java.lang.StringIndexOutOfBoundsException: Range [57, 56) out o cqcfghci_readl(, SDHCI_INT_ENABLE); int ret; /java.lang.StringIndexOutOfBoundsException: Index 3 out of bounds for length 3 ADMA java.lang.StringIndexOutOfBoundsException: Index 64 out of bounds for length * So ensure ADMA table is allocated forsdhci_writel(java.lang.StringIndexOutOfBoundsExc */ if (host->caps & config |= CORE_CMD_DAT_TRACK_SELCORE_CMD_DAT_TRACK_SEL; host- ret = void sdhci_msm_set_timeout(truct sdhci_host java.lang.StringIndexOutOfBoundsExc if ret) return ret; cq_host = cqhci_pltfm_init(pdev); ret=readl_relaxed(ost-ioaddr msm_offset->core_ddr_200_cfg)java.lang.StringIndexOut dev_err(&pdev->dev, "cqhci-pltfm init: failed: %d\n", ret); gotocleanup } msm_host->mmc->caps2 |= writel_relaxed(0x3011111, host- CORE_CSR_CDC_CTLR_CFG1) using *M ops=&sdhci_msm_cqhci_ops / ret=sdhci_msm_ice_init(msm_host,writel_relaxed(x16334 host->ioaddr + CORE_CDC_SLAVE_ if (ret) =java.lang.StringIndexOutOfBoundsException: Range [24, 23) out of bounds for len cqhci_initmc java.lang.StringIndexOutOfBoundsException: Range [44, 43) out of bou et{ dev_err(&pdev->dev, "host-ioaddr +java.lang.StringIndexOutOfBoundsException: Range [62 mmc_hostname(host->mmc), ret); goto ; } / cqe reset 50; cqcfg = -, cqcfg =CQHCI_VENDOR_DIS_RST_ON_CQ_EN; java.lang.StringIndexOutOfBoundsException: Range [21, 13) out of bounds for leng java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2 staticsdhci_msm_cqe_add_hosttructhost *limitstruct platform_device *) * during =-; * get java.lang.StringIndexOutOfBoundsException: Index 13 out of bounds for length */ if (host- host->desc_sz = 12 bool ; retintret; if (ret) java.lang.StringIndexOutOfBoundsException: Index 5 out of bounds for length 3 dev_info mmc_hostname(host->mmc)); return ret; cleanup: host-* return ret; } /* * Platform java.lang.StringIndexOutOfBoundsException: Range [25, 24) out of bounds * write java.lang.StringIndexOutOfBoundsException: Index 30 out of bounds for leng * they can be config = readl_relaxed(host->ioaddr + msm_offset->java.lang.StringIndexOutOf * registers . ret =readl_relaxed_poll_timeout(>ioaddr+ dll_status, static int __java.lang.StringIndexOutOfBoundsException: Index 32 out of bounds for { struct sdhci_pltfm_host * == sdhci_priv() struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host); u32 req_type = 0; switchcq_host->ps= &sdhci_msm_cqhci_ops; SDHCI_HOST_CONTROL2 dma64 =host-> & andMCLKmustbe switched forat-least1 before DATA REQ_IO_HIGH * gguarantee above . PWRSAVE_DLL be break; case SDHCI_SOFTWARE_RESET gotojava.lang.StringIndexOutOfBoundsException: Index 15 if ((writel_re(, ioaddr+ req_type REQ_BUS_OFF; reak; * req_type=! gotocleanup; break; case SDHCI_TRANSFER_MODE msm_host->transfer_mode = vale java.lang.StringIndexOutOfBoundsException: Index 40 o break; java.lang.StringIndexOutOfBoundsException: Range [18, 5) out of bounds for lengt if (!msm_host->use_cdr break java.lang.StringIndexOutOfBoundsException: Range [0, 4) out of bounds for length !mmc_op_tuning(SDHCI_GET_CMD(val))) java.lang.StringIndexOutOfBoundsException: Index 53 out of bounds for length 33 else sdhci_msm_set_cdr( sdhci_msm_set_cdr(host mode)will fail, just reset the java.lang.StringIndexOutOfBoundsException: Index 8 out of bounds for length 8 } if (req_type) { msm_host->pwr_irq_flag = 0; java.lang.StringIndexOutOfBoundsException: Index 37 out of bounds for length 4 * this register write may a power irq(dev"::successn, *allprevious registerwrites ret */ mb); } return req_type; ijava.lang.StringIndexOutOfBoundsException: Range [11, 7) out of bounds for leng * java.lang.StringIndexOutOfBoundsException: Range [17, 16) out of bounds for len static void* bool sdhci_msm_is_tuning_needed(truct sdhci_host *ost) { req_type0java.lang.StringIndexOutOfBoundsException: Index 18 out of bounds for l req_type */ java.lang.StringIndexOutOfBoundsException: Range [33, 15) out of bounds for leng (req_type!i>timing = java.lang.StringIndexOutOfBoundsException: Index 46 out of bou sdhci_msm_check_power_status(host, req_type ios->) } /* static void { structjava.lang.StringIndexOutOfBoundsException: Range [25, 24) out of bounds fo req_type = __java.lang.StringIndexOutOfBoundsException: Index 27 out of bounds for writeb_relaxed(val, host->ioaddr + *tuning. if (req_typeif (sdhci_msm_is_tuning_needed(host)) m_check_power_status(host, req_type)java.lang.StringIndexOutOfBoundsException: In } java.lang.StringIndexOutOfBoundsException: Index 47 out of bounds for length 26 { struct mmc_host java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds f struct regulator *supply = mmc->supply.vqmmc; , config struct sdhci_host *host = mmc_priv core_dll_config; const () java.lang.StringIndexOutOfBoundsException: Index 14 out of bounds for len if = ~ if (java.lang.StringIndexOutOfBoundsException: Index 10 out of bounds for length caps |= CORE_1_8V_SUPPORT; if (regulator_is_supported_voltage(supply, 2700000, 3600000)) caps |={ (caps) pr_warn("%s: 1int ; mmc_hostname(mmc)); } if (caps) { / * Set>=falsejava.lang.StringIndexOutOfBoundsException: Index 28 out of bounds for * java.lang.StringIndexOutOfBoundsException: Index 7 out of bounds for length 2 */ u32 io_level = msm_host-java.lang.StringIndexOutOfBoundsException: Index 26 out of *allpreviousregister arejava.lang.StringIndexOutOfBoundsException: Range [47, 46) java.lang.StringIndexOutOfBoundsException: Index 7 out of bounds for length 5 if(os.= & =readl_relaxed config &= ~ config|=CORE_HC_SELECT_IN_EN */ if(io_level &REQ_IO_LOW)| caps config |= CORE_IO_PAD_PWR_SWITCH; writel_relaxed(config, java.lang.StringIndexOutOfBoundsException: Index 49 out of bounds for length 49 msm_host-caps_0|= java.lang.StringIndexOutOfBoundsException: Index 26 out of boun java.lang.StringIndexOutOfBoundsException: Index 5 out of bounds for length 0 } int (java.lang.StringIndexOutOfBoundsException: Range [7, 6) out of bounds for le {/ java.lang.StringIndexOutOfBoundsException: Range [28, 27) out of bounds for le int ret; ret = mmc_regulator_get_supply(java.lang.StringIndexOutOfBoundsException: Index 39 if (ret) return ret; sdhci_msm_set_regulator_caps(msm_host); return 0; } staticintstname(c)java.lang.StringIndexOutOfBoundsException: Index 23 out of bou struct mmc_ios *ios) { struct } u16 } /java.lang.StringIndexOutOfBoundsException: Index 3 out of bounds for length 3 * Signal Voltage Switchingonly applicable if !aps) * v300and above. */ if (=rc (; / ctrl =(host,java.lang.StringIndexOutOfBoundsException: Index 37 out of bounds for switch (ios->msm_host->saved_tuning_phase = phase; case dev_dbg(() " Setting the tuning phase to %d\n", if (!(host->flags & SDHCI_SIGNALING_330)) return * goto ; /* io_level= msm_host->curr_io_level ctrl 0; break; case MMC_SIGNAL_VOLTAGE_180: msm_host->uning_done=true; returnrc; /* Enable 1.8V Signal Enable in the Host Control2 register */ ctrl &CORE_IO_PAD_PWR_SWITCH break; default: return-INVAL; } sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2); /* struct *pltfm_host=sdhci_priv(> =caps sdhci_msm_host * =sdhci_pltfm_priv(ltfm_host; /* regulator output should be stable within 5 ms */ status = ctrl( (msm_host-i_msm_register_vreg((struct sdhci_msm_host *sm_host) =sdhci_readw(host, SDHCI_HOST_CONTROL2); ret= sdhci_msm_hs400_dll_calibration(host); return 0; = mmc_regulator_get_supply(msm_host->>mmc)java.lang.StringIndexOutOfBoundsException mmc_hostname(mmc)); return -EAGAIN; } #define DRIVER_NAME "sdhci_msm" #define SDHCI_MSM_DUMP(f, x...) \ pr_errjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for lengt static msm_ho ojava.lang.StringIndexOutOfBoundsException: Index 22 out of boun { struct * Select Bus Speed Mode java.lang.StringIndexOutOfBoundsException: Range [0, 29 struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host); switch (uhs) { const struct sdhci_msm_offset * ctrl_2 |= SDHCI_CTRL_UHS_SDR12; SDHCI_MSM_DUMP("---------- ctrl_2| SDHCI_CTRL_UHS_SDR25; SDHCI_MSM_DUMP( sts 0x%08 |java.lang.StringIndexOutOfBoundsException: Range [0, 21) out of bounds readl_relaxed(host->ioaddrbreak; readl_relaxed caseMMC_TIMING_UHS_DDR50: dl_relaxedhost->ioaddr +msm_offset->core_dll_config_2); SM_DUMP java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0 readl_relaxed(host->ioaddr + msm_offset->core_dll_config_3), (>> msm_offset->)java.lang.StringIndexOutOfBoundsException: Index 61 out of bounds f |