Quelle  rk3588-turing-rk1.dtsi   Sprache: unbekannt

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Device tree definitions for the Turing RK1 SoM.
 *
 * Copyright (c) 2023 Sam Edwards <CFSworks@gmail.com>
 *
 * Based on RK3588-EVB1 devicetree
 * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
 */

/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include "rk3588.dtsi"

/ {
 compatible = "turing,rk1", "rockchip,rk3588";

 aliases {
  ethernet0 = &gmac1;
  mmc0 = &sdhci;
 };

 fan: pwm-fan {
  compatible = "pwm-fan";
  cooling-levels = <0 25 95 145 195 255>;
  fan-supply = <&vcc5v0_sys>;
  pinctrl-names = "default";
  pinctrl-0 = <&pwm0m2_pins &fan_int>;
  interrupt-parent = <&gpio0>;
  interrupts = <RK_PA4 IRQ_TYPE_EDGE_FALLING>;
  pwms = <&pwm0 0 50000 0>;
  #cooling-cells = <2>;
 };

 vcc3v3_pcie30: regulator-vcc3v3-pcie30 {
  compatible = "regulator-fixed";
  regulator-name = "vcc3v3_pcie30";
  regulator-min-microvolt = <3300000>;
  regulator-max-microvolt = <3300000>;
  enable-active-high;
  gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>;
  pinctrl-names = "default";
  pinctrl-0 = <&vcc3v3_pcie30_en>;
  startup-delay-us = <5000>;
 };

 vcc5v0_sys: regulator-vcc5v0-sys {
  compatible = "regulator-fixed";
  regulator-name = "vcc5v0_sys";
  regulator-always-on;
  regulator-boot-on;
  regulator-min-microvolt = <5000000>;
  regulator-max-microvolt = <5000000>;
 };

 vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {
  compatible = "regulator-fixed";
  regulator-name = "vcc_1v1_nldo_s3";
  regulator-always-on;
  regulator-boot-on;
  regulator-min-microvolt = <1100000>;
  regulator-max-microvolt = <1100000>;
  vin-supply = <&vcc5v0_sys>;
 };
};

&combphy2_psu {
 status = "okay";
};

&cpu_b0 {
 cpu-supply = <&vdd_cpu_big0_s0>;
};

&cpu_b1 {
 cpu-supply = <&vdd_cpu_big0_s0>;
};

&cpu_b2 {
 cpu-supply = <&vdd_cpu_big1_s0>;
};

&cpu_b3 {
 cpu-supply = <&vdd_cpu_big1_s0>;
};

&cpu_l0 {
 cpu-supply = <&vdd_cpu_lit_s0>;
};

&cpu_l1 {
 cpu-supply = <&vdd_cpu_lit_s0>;
};

&cpu_l2 {
 cpu-supply = <&vdd_cpu_lit_s0>;
};

&cpu_l3 {
 cpu-supply = <&vdd_cpu_lit_s0>;
};

&gmac1 {
 clock_in_out = "output";
 phy-handle = <&rgmii_phy>;
 phy-mode = "rgmii-rxid";
 pinctrl-0 = <&gmac1_miim
       &gmac1_tx_bus2
       &gmac1_rx_bus2
       &gmac1_rgmii_clk
       &gmac1_rgmii_bus>;
 pinctrl-names = "default";
 rx_delay = <0x00>;
 tx_delay = <0x43>;
 status = "okay";
};

&gpu {
 mali-supply = <&vdd_gpu_s0>;
 status = "okay";
};

&i2c0 {
 pinctrl-names = "default";
 pinctrl-0 = <&i2c0m2_xfer>;
 status = "okay";

 vdd_cpu_big0_s0: regulator@42 {
  compatible = "rockchip,rk8602";
  reg = <0x42>;
  fcs,suspend-voltage-selector = <1>;
  regulator-name = "vdd_cpu_big0_s0";
  regulator-always-on;
  regulator-boot-on;
  regulator-min-microvolt = <550000>;
  regulator-max-microvolt = <1050000>;
  regulator-ramp-delay = <2300>;
  vin-supply = <&vcc5v0_sys>;

  regulator-state-mem {
   regulator-off-in-suspend;
  };
 };

 vdd_cpu_big1_s0: regulator@43 {
  compatible = "rockchip,rk8603", "rockchip,rk8602";
  reg = <0x43>;
  fcs,suspend-voltage-selector = <1>;
  regulator-name = "vdd_cpu_big1_s0";
  regulator-always-on;
  regulator-boot-on;
  regulator-min-microvolt = <550000>;
  regulator-max-microvolt = <1050000>;
  regulator-ramp-delay = <2300>;
  vin-supply = <&vcc5v0_sys>;

  regulator-state-mem {
   regulator-off-in-suspend;
  };
 };
};

&i2c1 {
 pinctrl-names = "default";
 pinctrl-0 = <&i2c1m2_xfer>;
 status = "okay";

 vdd_npu_s0: regulator@42 {
  compatible = "rockchip,rk8602";
  reg = <0x42>;
  fcs,suspend-voltage-selector = <1>;
  regulator-name = "vdd_npu_s0";
  regulator-always-on;
  regulator-boot-on;
  regulator-min-microvolt = <550000>;
  regulator-max-microvolt = <950000>;
  regulator-ramp-delay = <2300>;
  vin-supply = <&vcc5v0_sys>;

  regulator-state-mem {
   regulator-off-in-suspend;
  };
 };
};

&i2c6 {
 status = "okay";

 hym8563: rtc@51 {
  compatible = "haoyu,hym8563";
  reg = <0x51>;
  #clock-cells = <0>;
  clock-output-names = "hym8563";
  pinctrl-names = "default";
  pinctrl-0 = <&hym8563_int>;
  interrupt-parent = <&gpio0>;
  interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
  wakeup-source;
 };
};

&mdio1 {
 rgmii_phy: ethernet-phy@1 {
  /* RTL8211F */
  compatible = "ethernet-phy-id001c.c916";
  reg = <0x1>;
  pinctrl-names = "default";
  pinctrl-0 = <&rtl8211f_rst>;
  reset-assert-us = <15000>;
  reset-deassert-us = <50000>;
  reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
 };
};

&package_thermal {
 polling-delay = <1000>;

 trips {
  package_active1: trip-active1 {
   temperature = <45000>;
   hysteresis = <5000>;
   type = "active";
  };
  package_active2: trip-active2 {
   temperature = <50000>;
   hysteresis = <5000>;
   type = "active";
  };
  package_active3: trip-active3 {
   temperature = <60000>;
   hysteresis = <5000>;
   type = "active";
  };
  package_active4: trip-active4 {
   temperature = <70000>;
   hysteresis = <5000>;
   type = "active";
  };
  package_active5: trip-active5 {
   temperature = <80000>;
   hysteresis = <5000>;
   type = "active";
  };
 };

 cooling-maps {
  map1 {
   trip = <&package_active1>;
   cooling-device = <&fan 1 1>;
  };
  map2 {
   trip = <&package_active2>;
   cooling-device = <&fan 2 2>;
  };
  map3 {
   trip = <&package_active3>;
   cooling-device = <&fan 3 3>;
  };
  map4 {
   trip = <&package_active4>;
   cooling-device = <&fan 4 4>;
  };
  map5 {
   trip = <&package_active5>;
   cooling-device = <&fan 5 5>;
  };
 };
};

&pcie2x1l1 {
 linux,pci-domain = <1>;
 pinctrl-names = "default";
 pinctrl-0 = <&pcie2_reset>, <&pcie30x1m1_0_clkreqn>, <&pcie30x1m1_0_waken>;
 reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
 status = "okay";
};

&pcie30phy {
 status = "okay";
};

&pcie3x4 {
 linux,pci-domain = <0>;
 pinctrl-names = "default";
 pinctrl-0 = <&pcie3_reset>, <&pcie30x4m1_clkreqn>, <&pcie30x4m1_waken>;
 reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
 vpcie3v3-supply = <&vcc3v3_pcie30>;
 status = "okay";
};

&pd_gpu {
 domain-supply = <&vdd_gpu_s0>;
};

&pinctrl {
 fan {
  fan_int: fan-int {
   rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
  };
 };

 hym8563 {
  hym8563_int: hym8563-int {
   rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
  };
 };

 pcie2 {
  pcie2_reset: pcie2-reset {
   rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
  };
 };

 pcie3 {
  pcie3_reset: pcie3-reset {
   rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
  };

  vcc3v3_pcie30_en: pcie3-reg {
   rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
  };
 };

 rtl8211f {
  rtl8211f_rst: rtl8211f-rst {
   rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
  };
 };
};

&pwm0 {
 status = "okay";
};

&sdhci {
 bus-width = <8>;
 no-sdio;
 no-sd;
 non-removable;
 mmc-hs400-1_8v;
 mmc-hs400-enhanced-strobe;
 status = "okay";
};

&spi2 {
 status = "okay";
 pinctrl-names = "default";
 pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
 num-cs = <1>;

 pmic@0 {
  compatible = "rockchip,rk806";
  spi-max-frequency = <1000000>;
  reg = <0x0>;

  interrupt-parent = <&gpio0>;
  interrupts = <7 IRQ_TYPE_LEVEL_LOW>;

  pinctrl-names = "default";
  pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
       <&rk806_dvs2_null>, <&rk806_dvs3_null>;
  system-power-controller;

  vcc1-supply = <&vcc5v0_sys>;
  vcc2-supply = <&vcc5v0_sys>;
  vcc3-supply = <&vcc5v0_sys>;
  vcc4-supply = <&vcc5v0_sys>;
  vcc5-supply = <&vcc5v0_sys>;
  vcc6-supply = <&vcc5v0_sys>;
  vcc7-supply = <&vcc5v0_sys>;
  vcc8-supply = <&vcc5v0_sys>;
  vcc9-supply = <&vcc5v0_sys>;
  vcc10-supply = <&vcc5v0_sys>;
  vcc11-supply = <&vcc_2v0_pldo_s3>;
  vcc12-supply = <&vcc5v0_sys>;
  vcc13-supply = <&vcc_1v1_nldo_s3>;
  vcc14-supply = <&vcc_1v1_nldo_s3>;
  vcca-supply = <&vcc5v0_sys>;

  gpio-controller;
  #gpio-cells = <2>;

  rk806_dvs1_null: dvs1-null-pins {
   pins = "gpio_pwrctrl1";
   function = "pin_fun0";
  };

  rk806_dvs2_null: dvs2-null-pins {
   pins = "gpio_pwrctrl2";
   function = "pin_fun0";
  };

  rk806_dvs3_null: dvs3-null-pins {
   pins = "gpio_pwrctrl3";
   function = "pin_fun0";
  };

  regulators {
   vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
    regulator-boot-on;
    regulator-min-microvolt = <550000>;
    regulator-max-microvolt = <950000>;
    regulator-ramp-delay = <12500>;
    regulator-name = "vdd_gpu_s0";
    regulator-enable-ramp-delay = <400>;

    regulator-state-mem {
     regulator-off-in-suspend;
    };
   };

   vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
    regulator-always-on;
    regulator-boot-on;
    regulator-min-microvolt = <550000>;
    regulator-max-microvolt = <950000>;
    regulator-ramp-delay = <12500>;
    regulator-name = "vdd_cpu_lit_s0";

    regulator-state-mem {
     regulator-off-in-suspend;
    };
   };

   vdd_log_s0: dcdc-reg3 {
    regulator-always-on;
    regulator-boot-on;
    regulator-min-microvolt = <675000>;
    regulator-max-microvolt = <750000>;
    regulator-ramp-delay = <12500>;
    regulator-name = "vdd_log_s0";

    regulator-state-mem {
     regulator-off-in-suspend;
     regulator-suspend-microvolt = <750000>;
    };
   };

   vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
    regulator-always-on;
    regulator-boot-on;
    regulator-min-microvolt = <550000>;
    regulator-max-microvolt = <950000>;
    regulator-ramp-delay = <12500>;
    regulator-name = "vdd_vdenc_s0";

    regulator-state-mem {
     regulator-off-in-suspend;
    };
   };

   vdd_ddr_s0: dcdc-reg5 {
    regulator-always-on;
    regulator-boot-on;
    regulator-min-microvolt = <675000>;
    regulator-max-microvolt = <900000>;
    regulator-ramp-delay = <12500>;
    regulator-name = "vdd_ddr_s0";

    regulator-state-mem {
     regulator-off-in-suspend;
     regulator-suspend-microvolt = <850000>;
    };
   };

   vdd2_ddr_s3: dcdc-reg6 {
    regulator-always-on;
    regulator-boot-on;
    regulator-name = "vdd2_ddr_s3";

    regulator-state-mem {
     regulator-on-in-suspend;
    };
   };

   vcc_2v0_pldo_s3: dcdc-reg7 {
    regulator-always-on;
    regulator-boot-on;
    regulator-min-microvolt = <2000000>;
    regulator-max-microvolt = <2000000>;
    regulator-ramp-delay = <12500>;
    regulator-name = "vdd_2v0_pldo_s3";

    regulator-state-mem {
     regulator-on-in-suspend;
     regulator-suspend-microvolt = <2000000>;
    };
   };

   vcc_3v3_s3: dcdc-reg8 {
    regulator-always-on;
    regulator-boot-on;
    regulator-min-microvolt = <3300000>;
    regulator-max-microvolt = <3300000>;
    regulator-name = "vcc_3v3_s3";

    regulator-state-mem {
     regulator-on-in-suspend;
     regulator-suspend-microvolt = <3300000>;
    };
   };

   vddq_ddr_s0: dcdc-reg9 {
    regulator-always-on;
    regulator-boot-on;
    regulator-name = "vddq_ddr_s0";

    regulator-state-mem {
     regulator-off-in-suspend;
    };
   };

   vcc_1v8_s3: dcdc-reg10 {
    regulator-always-on;
    regulator-boot-on;
    regulator-min-microvolt = <1800000>;
    regulator-max-microvolt = <1800000>;
    regulator-name = "vcc_1v8_s3";

    regulator-state-mem {
     regulator-on-in-suspend;
     regulator-suspend-microvolt = <1800000>;
    };
   };

   avcc_1v8_s0: pldo-reg1 {
    regulator-always-on;
    regulator-boot-on;
    regulator-min-microvolt = <1800000>;
    regulator-max-microvolt = <1800000>;
    regulator-name = "avcc_1v8_s0";

    regulator-state-mem {
     regulator-off-in-suspend;
    };
   };

   vcc_1v8_s0: pldo-reg2 {
    regulator-always-on;
    regulator-boot-on;
    regulator-min-microvolt = <1800000>;
    regulator-max-microvolt = <1800000>;
    regulator-name = "vcc_1v8_s0";

    regulator-state-mem {
     regulator-off-in-suspend;
     regulator-suspend-microvolt = <1800000>;
    };
   };

   avdd_1v2_s0: pldo-reg3 {
    regulator-always-on;
    regulator-boot-on;
    regulator-min-microvolt = <1200000>;
    regulator-max-microvolt = <1200000>;
    regulator-name = "avdd_1v2_s0";

    regulator-state-mem {
     regulator-off-in-suspend;
    };
   };

   vcc_3v3_s0: pldo-reg4 {
    regulator-always-on;
    regulator-boot-on;
    regulator-min-microvolt = <3300000>;
    regulator-max-microvolt = <3300000>;
    regulator-ramp-delay = <12500>;
    regulator-name = "vcc_3v3_s0";

    regulator-state-mem {
     regulator-off-in-suspend;
    };
   };

   vccio_sd_s0: pldo-reg5 {
    regulator-always-on;
    regulator-boot-on;
    regulator-min-microvolt = <1800000>;
    regulator-max-microvolt = <3300000>;
    regulator-ramp-delay = <12500>;
    regulator-name = "vccio_sd_s0";

    regulator-state-mem {
     regulator-off-in-suspend;
    };
   };

   pldo6_s3: pldo-reg6 {
    regulator-always-on;
    regulator-boot-on;
    regulator-min-microvolt = <1800000>;
    regulator-max-microvolt = <1800000>;
    regulator-name = "pldo6_s3";

    regulator-state-mem {
     regulator-on-in-suspend;
     regulator-suspend-microvolt = <1800000>;
    };
   };

   vdd_0v75_s3: nldo-reg1 {
    regulator-always-on;
    regulator-boot-on;
    regulator-min-microvolt = <750000>;
    regulator-max-microvolt = <750000>;
    regulator-name = "vdd_0v75_s3";

    regulator-state-mem {
     regulator-on-in-suspend;
     regulator-suspend-microvolt = <750000>;
    };
   };

   vdd_ddr_pll_s0: nldo-reg2 {
    regulator-always-on;
    regulator-boot-on;
    regulator-min-microvolt = <850000>;
    regulator-max-microvolt = <850000>;
    regulator-name = "vdd_ddr_pll_s0";

    regulator-state-mem {
     regulator-off-in-suspend;
     regulator-suspend-microvolt = <850000>;
    };
   };

   avdd_0v75_s0: nldo-reg3 {
    regulator-always-on;
    regulator-boot-on;
    regulator-min-microvolt = <750000>;
    regulator-max-microvolt = <750000>;
    regulator-name = "avdd_0v75_s0";

    regulator-state-mem {
     regulator-off-in-suspend;
    };
   };

   vdd_0v85_s0: nldo-reg4 {
    regulator-always-on;
    regulator-boot-on;
    regulator-min-microvolt = <850000>;
    regulator-max-microvolt = <850000>;
    regulator-name = "vdd_0v85_s0";

    regulator-state-mem {
     regulator-off-in-suspend;
    };
   };

   vdd_0v75_s0: nldo-reg5 {
    regulator-always-on;
    regulator-boot-on;
    regulator-min-microvolt = <750000>;
    regulator-max-microvolt = <750000>;
    regulator-name = "vdd_0v75_s0";

    regulator-state-mem {
     regulator-off-in-suspend;
    };
   };
  };
 };
};

&tsadc {
 status = "okay";
};

&uart2 {
 pinctrl-0 = <&uart2m0_xfer>;
 status = "okay";
};

&uart9 {
 pinctrl-0 = <&uart9m0_xfer>;
 status = "okay";
};

/* USB 0: USB 2.0 only, OTG-capable */
&u2phy0 {
 status = "okay";
};

&u2phy0_otg {
 status = "okay";
};

&usbdp_phy0 {
 /*
  * TODO: On the RK1, USBDP0 drives the DisplayPort pins and is not
  * involved in this USB2-only bus. The bus controller (below) needs to
  * know that it doesn't have a USB3 port so it can ignore any
  * USB3-related signals. This is handled in hardware by updating the
  * GRFs corresponding to that bus controller. Alas, Linux currently
  * puts the code to do that in the USBDP driver, so USBDP0 must be
  * enabled for now.
  */
 rockchip,dp-lane-mux = <0 1 2 3>; /* "No USB lanes" */
 status = "okay";
};

&usb_host0_xhci {
 extcon = <&u2phy0>;
 maximum-speed = "high-speed";
 status = "okay";
};

/* USB 1: USB 3.0, host only */
&u2phy1 {
 status = "okay";
};

&u2phy1_otg {
 status = "okay";
};

&usbdp_phy1 {
 status = "okay";
};

&usb_host1_xhci {
 dr_mode = "host";
 extcon = <&u2phy1>;
 status = "okay";
};

/* USB 2: USB 2.0, host only */
&u2phy2 {
 status = "okay";
};

&u2phy2_host {
 status = "okay";
};

&usb_host0_ehci {
 status = "okay";
};

&usb_host0_ohci {
 status = "okay";
};