/* * I/O Processor (IOP) management * Written and (C) 1999 by Joshua M. Thompson (funaho@jurai.org) * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice and this list of conditions. * 2. Redistributions in binary form must reproduce the above copyright * notice and this list of conditions in the documentation and/or other * materials provided with the distribution.
*/
/* * The IOP chips are used in the IIfx and some Quadras (900, 950) to manage * serial and ADB. They are actually a 6502 processor and some glue logic. * * 990429 (jmt) - Initial implementation, just enough to knock the SCC IOP * into compatible mode so nobody has to fiddle with the * Serial Switch control panel anymore. * 990603 (jmt) - Added code to grab the correct ISM IOP interrupt for OSS * and non-OSS machines (at least I hope it's correct on a * non-OSS machine -- someone with a Q900 or Q950 needs to * check this.) * 990605 (jmt) - Rearranged things a bit wrt IOP detection; iop_present is * gone, IOP base addresses are now in an array and the * globally-visible functions take an IOP number instead of * an actual base address. * 990610 (jmt) - Finished the message passing framework and it seems to work. * Sending _definitely_ works; my adb-bus.c mods can send * messages and receive the MSG_COMPLETED status back from the * IOP. The trick now is figuring out the message formats. * 990611 (jmt) - More cleanups. Fixed problem where unclaimed messages on a * receive channel were never properly acknowledged. Bracketed * the remaining debug printk's with #ifdef's and disabled * debugging. I can now type on the console. * 990612 (jmt) - Copyright notice added. Reworked the way replies are handled. * It turns out that replies are placed back in the send buffer * for that channel; messages on the receive channels are always * unsolicited messages from the IOP (and our replies to them * should go back in the receive channel.) Also added tracking * of device names to the listener functions ala the interrupt * handlers. * 990729 (jmt) - Added passing of pt_regs structure to IOP handlers. This is * used by the new unified ADB driver. * * TODO: * * o The SCC IOP has to be placed in bypass mode before the serial console * gets initialized. iop_init() would be one place to do that. Or the * bootloader could do that. For now, the Serial Switch control panel * is needed for that -- contrary to the changelog above. * o Something should be periodically checking iop_alive() to make sure the * IOP hasn't died. * o Some of the IOP manager routines need better error checking and * return codes. Nothing major, just prettying up.
*/
/* * ----------------------- * IOP Message Passing 101 * ----------------------- * * The host talks to the IOPs using a rather simple message-passing scheme via * a shared memory area in the IOP RAM. Each IOP has seven "channels"; each * channel is connected to a specific software driver on the IOP. For example * on the SCC IOP there is one channel for each serial port. Each channel has * an incoming and an outgoing message queue with a depth of one. * * A message is 32 bytes plus a state byte for the channel (MSG_IDLE, MSG_NEW, * MSG_RCVD, MSG_COMPLETE). To send a message you copy the message into the * buffer, set the state to MSG_NEW and signal the IOP by setting the IRQ flag * in the IOP control to 1. The IOP will move the state to MSG_RCVD when it * receives the message and then to MSG_COMPLETE when the message processing * has completed. It is the host's responsibility at that point to read the * reply back out of the send channel buffer and reset the channel state back * to MSG_IDLE. * * To receive message from the IOP the same procedure is used except the roles * are reversed. That is, the IOP puts message in the channel with a state of * MSG_NEW, and the host receives the message and move its state to MSG_RCVD * and then to MSG_COMPLETE when processing is completed and the reply (if any) * has been placed back in the receive channel. The IOP will then reset the * channel state to MSG_IDLE. * * Two sets of host interrupts are provided, INT0 and INT1. Both appear on one * interrupt level; they are distinguished by a pair of bits in the IOP status * register. The IOP will raise INT0 when one or more messages in the send * channels have gone to the MSG_COMPLETE state and it will raise INT1 when one * or more messages on the receive channels have gone to the MSG_NEW state. * * Since each channel handles only one message we have to implement a small * interrupt-driven queue on our end. Messages to be sent are placed on the * queue for sending and contain a pointer to an optional callback function. * The handler for a message is called when the message state goes to * MSG_COMPLETE. * * For receiving message we maintain a list of handler functions to call when * a message is received on that IOP/channel combination. The handlers are * called much like an interrupt handler and are passed a copy of the message * from the IOP. The message state will be in MSG_RCVD while the handler runs; * it is the handler's responsibility to call iop_complete_message() when * finished; this function moves the message state to MSG_COMPLETE and signals * the IOP. This two-step process is provided to allow the handler to defer * message processing to a bottom-half handler if the processing will take * a significant amount of time (handlers are called at interrupt time so they * should execute quickly.)
*/
/* * IOP structures for the two IOPs * * The SCC IOP controls both serial ports (A and B) as its two functions. * The ISM IOP controls the SWIM (floppy drive) and ADB.
*/
/* * Register the interrupt handler for the IOPs.
*/
void __init iop_register_interrupts(void)
{ if (iop_ism_present) { if (macintosh_config->ident == MAC_MODEL_IIFX) { if (request_irq(IRQ_MAC_ADB, iop_ism_irq, 0, "ISM IOP", (void *)IOP_NUM_ISM))
pr_err("Couldn't register ISM IOP interrupt\n");
} else { if (request_irq(IRQ_VIA2_0, iop_ism_irq, 0, "ISM IOP",
(void *)IOP_NUM_ISM))
pr_err("Couldn't register ISM IOP interrupt\n");
} if (!iop_alive(iop_base[IOP_NUM_ISM])) {
pr_warn("IOP: oh my god, they killed the ISM IOP!\n");
} else {
pr_warn("IOP: the ISM IOP seems to be alive.\n");
}
}
}
/* * Register or unregister a listener for a specific IOP and channel * * If the handler pointer is NULL the current listener (if any) is * unregistered. Otherwise the new listener is registered provided * there is no existing listener registered.
*/
/* * Complete reception of a message, which just means copying the reply * into the buffer, setting the channel state to MSG_COMPLETE and * notifying the IOP.
*/
void iop_complete_message(struct iop_msg *msg)
{ int iop_num = msg->iop_num; int chan = msg->channel; int i,offset;
/* * Send a message * * The message is placed at the end of the send queue. Afterwards if the * channel is idle we force an immediate send of the next message in the * queue.
*/
while (code_len--) {
*code_start++ = iop_base[iop_num]->ram_data;
}
}
/* * Compare the code in the shared RAM of an IOP with a copy in system memory * and return 0 on match or the first nonmatching system memory address on * failure.
*/
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