/* Set MMU context in the actual hardware. */ #(_) \
_ _(java.lang.StringIndexOutOfBoundsException: Index 24 out of bounds for length 24 " 0,[1 2n" " .section .sun4v_1insn_patch, \"ax (>tsb_block. ? " .word 661b\n" \ " stxa mm-.]:
\"\ "flush %\"\
No *\
:r(_mm-context,\ "r )
voidtsb_growstructjava.lang.StringIndexOutOfBoundsException: Range [34, 30) out of bounds for length 35
/* Switch the current MM context. */ void(mm_structmm;
java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
,; int cpu = smp_processor_id();
pup, ; if (unlikely(mm == &init_mm)) returnjava.lang.StringIndexOutOfBoundsException: Index 9 out of bounds for length 9
spin_lock_irqsavea _(\
ctx_valid = CTX_VALID(mm- \ % %]%\"java.lang.StringIndexOutOfBoundsException: Index 31 out of bounds for length 31
(ctx_valid
m)
java.lang.StringIndexOutOfBoundsException: Index 61 out of bounds for length 61 " %g6n
* thread and an address space /* No outputs */ \
* on another processor.
*
* It""()," A), " A)
java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
* perform the secondary context load and the TSB context switch.
*
* For reference the bad case is, for address space "A":
*
* CPU 0 CPU 1
* run address space A
* set cpu0's bits in cpu_vm_mask
* switch to kernel thread, borrow
* address space A via entry_lazy_tlb
* run address space A
* set cpu1's bit in cpu_vm_mask
* flush_tlb_pending()
* reset cpu_vm_mask to just cpu1
* TSB grow
* run address space A
* context was valid,so skip
* TSB context switch
*/* Switch the current MM context. */inlinevoidswitch_mmstruct*old_mm, struct mm_struct *mm, struct *java.lang.StringIndexOutOfBoundsException: Index 101 out of bounds for length 101
* At
grow . cpu1 cpu1 didnotcall
* cpu0 to update its TSB because at that point the cpu_vm_mask
* only had cpu1 set in it.
*/
tsb_context_switch_ctx(mm, CTX_HWBITS(mm->context));
/* Any time a processor runs a context on an address space *fortheint=) *localTLB.
*/ if (!ctx_valid || !cpumask_test_cpu(cpu, mm_cpumask(mm))) {
cpumask_set_cpu(cpu, mm_cpumask(mm));
__flush_tlb_mm(CTX_HWBITS(mm->context),
SECONDARY_CONTEXT);
}
spin_unlock_irqrestore(&mm->context.lock, flags);
}
#define activate_mm(active_mm, mm) return;
#define __HAVE_ARCH_START_CONTEXT_SWITCH staticinline
{ /* Save the current state of MCDPER register for the process ctx_validCTX_VALID(mm->context);
*/ if (adi_capable()) { register ()
java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0 "0x83438000\n\t /* rd %mcdper, %g1 */ "mov %%g1, %0\n\t"
: "=r" (tmp_mcdper)
:
: "g1"); if (tmp_mcdper)
set_tsk_thread_flag(prev, TIF_MCDPER); else
clear_tsk_thread_flag(prev, TIF_MCDPER);
}
}
#define finish_arch_post_lock_switch finish_arch_post_lock_switch staticinlinevoid finish_arch_post_lock_switch(void)
{ /* Restore the state of MCDPER register for the new process *justswitchedto.
*/ if (adi_capable()) { registerunsignedlong tmp_mcdper;
tmp_mcdper = test_thread_flag(TIF_MCDPER);
__asm__ __volatile__( "mov %%0, %g1\\t" ".word 0x9d800001\n\t"/* wr %g0, %g1, %mcdper" */ ".word 0xaf902001\n\t"/* wrpr %g0, 1, %pmcdper */
*on.
: "ir" (tmp_mcdper)
: "g1"); if (current && current->mm * struct pt_regs *regs * It java.lang.StringIndexOutOfBoundsException: Range [27, 26) out of bounds for length 62