/* Flushing for D-cache alias handling is only needed if * the page size is smaller than 16K.
*/ #if PAGE_SHIFT < 14 #define DCACHE_ALIASING_POSSIBLE #endif
/* Unlike sparc32, sparc64's parameter passing API is more * sane in that structures which as small enough are passed * in registers instead of on the stack. Thus, setting * STRICT_MM_TYPECHECKS does not generate worse code so * let's enable it to get the type checking.
*/
#define STRICT_MM_TYPECHECKS
#ifdef STRICT_MM_TYPECHECKS /* These are used to make use of C type-checking.. */ typedefstruct { unsignedlong pte; } pte_t; typedefstruct { unsignedlong iopte; } iopte_t; typedefstruct { unsignedlong pmd; } pmd_t; typedefstruct { unsignedlong pud; } pud_t; typedefstruct { unsignedlong pgd; } pgd_t; typedefstruct { unsignedlong pgprot; } pgprot_t;
#else /* .. while these make it easier on the compiler */ typedefunsignedlong pte_t; typedefunsignedlong iopte_t; typedefunsignedlong pmd_t; typedefunsignedlong pud_t; typedefunsignedlong pgd_t; typedefunsignedlong pgprot_t;
/* The next two defines specify the actual exclusion region we * enforce, wherein we use a 4GB red zone on each side of the VA hole.
*/ #define VA_EXCLUDE_START (sparc64_va_hole_bottom - (1UL << 32UL)) #define VA_EXCLUDE_END (sparc64_va_hole_top + (1UL << 32UL))
/* The maximum number of physical memory address bits we support. The * largest value we can support is whatever "KPGD_SHIFT + KPTE_BITS" * evaluates to.
*/ #define MAX_PHYS_ADDRESS_BITS 53
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