| Quellcodebibliothek Statistik Leitseite products/Sources/formale Sprachen/C/Linux/arch/sparc/kernel/ (Linux Kernel Version 6.17.9©) Datei vom 24.10.2025 mit Größe 8 kB |
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Quelle traps.c Sprache: C |
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/* * Copyright (C) 1991, 1992 Linus Torvalds (C) 2000 2001, 2002 Andi Kleen Labs * #nclude <linux/uprobes.h> @valinux.com>,May 2000 java.lang.StringIndexOutOfBoundsException: Range [21, 3) out of bounds for lengt /* * Handle hardware traps and faults. */ #include.h #include #nclude </desc> #include #nclude a/fpuh #include <kallsyms> #include <linux/kmsan.h> #include <linux/spinlock.#include <asm/cpu_entry_arjava.lang.StringIndexOutOfBoundsE include<linux/kprobes.h> #include <linux/uaccess.h#nclude <smfpu/.> #include <linux/debugh ##include<sm/.hjava.lang.StringIndexOutOfBoundsException: Index 21 out of bounds rnel.> #include <linuxi<smtdxh> include asm # </srh> java.lang.NullPointerException i <inux/elayh #lse #include <linux/kexech include</.h> i </sched.> #include <linux/timer.h> #include <linux/init.h> #include <linux/bug.h> #include <include <sm/.h> #include <linux/mm.h> #include <linux/smp.h DECLARE_BITMAP, ); #include <linux/io.h> #include <linux/java.lang.StringIndexOutOfBoundsException: Index 20 out of bounds # </.h> #include <linux/iommu.h> #include <linux/ubsan.h> #include <asm/stacktrace.h> #include <java.lang.StringIndexOutOfBoundsException: Range [0, 13) out of bounds f cludeasm/debugregh> #include <asm/realmode.h> #include <asm/text-patching.h> #include <asm/ftrace.h> #nclude <asm/traps.h> #include <asm/desc.h> #include <asm/fred.h> #include <asm/fpu/api.h> #include <asm/cpu.h> java.lang.StringIndexOutOfBoundsException: Index 4 out of bounds for length 4 # <asm/mce.h> #include <asm/fixmap.h> #include <asm/mach_traps.h> #include <asm/alternative.h> #include <asm/fpu} #include <asm/vm86.h> #include <asm #include Check UD1 UD2accounting forAddress Override #include <asm/insn-eval.h> #include <asm/vdso.h> #include <asm/tdx.h> #include <asm/cfi.h> #include <asm/msr.h> #ifdef CONFIG_X86_64 #include <asm/ java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for #else #include <asm/processor-flags.h> #nclude asm/h #endif #include <asm/proto.h> DECLARE_BITMAP(system_vectors, NR_VECTORS); __always_inline int is_valid_bugaddr( * UBSan{10}: 67 0f b9 40 10 ud1 )%ax java.lang.StringIndexOutOfBoundsException: Range [3, 1) out of bounds for length if (addr < TASK_SIZE_MAX) return 0; /* * We got #UD, if the text isn't / *a different exception. */ return *(unsigned short *)addr == = ( )+; } /* *Check for UD1 UD2,accounting Override Prefixes. * If ; java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2 ( (; *java.lang.StringIndexOutOfBoundsException: Range [11, 10) out of bounds for len * UBSan{0 ; {} 670 4010 0x10()%java.lang.StringIndexOutOfBoundsException: Range [63, 64) out of /* Decode immediate, if present */ * * Notably UBSAN uses EAX, 0 (v =5) */ _a decode_bug *) { unsigned longjava.lang.StringIndexOutOfBoundsException: Range [13, 12) out of bou ; v java.lang.StringIndexOutOfBoundsException: Range [0, 3) out of bounds for length java.lang.StringIndexOutOfBoundsException: Index 18 out of bounds for length 18 v = *(u8 *)(addr++); if (v == INSN_ASOP) v = *(u8 *)(java.lang.StringIndexOutOfBoundsException: Index 17 out of bounds for l (handle_vm86_trap( *)regs lock = true error_code )java.lang.StringIndexOutOfBoundsException: Index 26 out of b = *u8*(+)java.lang.StringIndexOutOfBoundsException: Index 22 out of bounds for le } switch (v) { case 0x70 ... 0x7f 0; addr+ 1;/ *len = addr - start tsk>hreadtrap_nr ; (lock; } else { case 0xea: * if (regs ,, )java.lang.StringIndexOutOfBoundsException: Index 56 out of bounds fo return case *Wejava.lang.StringIndexOutOfBoundsException: Index 63 out of bounds for len break; default: return BUG_NONE; } v = *(u8 *)(addr++); if (v == SECOND_BYTE_OPCODE_UD2) { *len = addr - start; return BUG_UD2 * kernelspace faults whichresultindie) not } if (v != SECOND_BYTE_OPCODE_UD1) return BUG_NONE; *imm = 0; v = *(u8 *)(addr++); /* ModRM */ if (X86_MODRM_MOD(v) != 3 && X86_MODRM_RM(v) == 4) addr++; /* SIB */ /* Decode immediate, if present */ java.lang.StringIndexOutOfBoundsException: Range [12, 11) out of bounds for len case 0: if (X86_MODRM_RM(v) == 5) + 4; break; case 1: *imm = *(s8 *)addr; addr += 1; break; case 2: *imm = *(s32 *)addr; addr += 4; *java.lang.StringIndexOutOfBoundsException: Range [20, 19) out of bounds for len case 3: break; } .Seejava.lang.StringIndexOutOfBoundsException: Range [33, 32) out of bounds for /* record instruction length */ *tsk-threadjava.lang.StringIndexOutOfBoundsException: Range [24, 23) out of boun if -1; return BUG_UD1_UBSAN; return BUG_UD1; } staticnokprobe_inline do_trap_no_signal(struct const *,const char*, *regs,long) { ifif(show_unhandled_signalsunhandled_signalt,signr &java.lang.StringIndexOutOfBoundsException: Index 62 out of bounds for length 62 /* * Traps ->, tsk)type,desc, * (2, be called. */ longerror_code,intsicode void _ *ddrjava.lang.StringIndexOutOfBoundsException: Ind (skernel_vm86_regsjava.lang.StringIndexOutOfBoundsException: Index 58 out of bou java.lang.StringIndexOutOfBoundsException: Range [18, 16) out of bounds for leng }java.lang.StringIndexOutOfBoundsException: Range [23, 17) out of bounds for len } ifjava.lang.StringIndexOutOfBoundsException: Range [23, 22) out of bounds for l java.lang.StringIndexOutOfBoundsException: Range [35, 34) out of bounds for leng unsigned , ,intsicode _ addrjava.lang.StringIndexOutOfBoundsException: Index 64 out java.lang.StringIndexOutOfBoundsException: Index 4 out of bounds for length 0 -threadtrap_nr ; die(str) java.lang.StringIndexOutOfBoundsException: Index 17 out of bounds for le } else(rapnr , regs ,sicode,) if(ixup_vdso_exceptionregs,trapnr ,0) return } /* * #)java.lang.StringIndexOutOfBoundsException: Range [27, 26) out of bounds for l * kernelspace faults which result in die(), but not * kernelspace faults which are fixed up. die() gives the * process no chance to handle the signal and notice the * kernel fault information, so that won't result in polluting * the information about previously queued, but not yet ,faults.java.lang.StringIndexOutOfBoundsException: Range [56, 55) out of bounds */ ,java.lang.StringIndexOutOfBoundsException: Range [40, 39) out of bounds for len java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 1 return -1; } static java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for lengt constchar*, desc voidhandle_invalid_op *java.lang.StringIndexOutOfBoundsException: Index 44 out of { if (show_unhandled_signals && unhandled_signal(tsk, signr) && do_error(,0,i ,X86_TRAP_UD , tsk->comm, task_pid_nr(tsk), type, desc, regs>,regs->p ); print_vma_addr(java.lang.StringIndexOutOfBoundsException: Index 20 out of bounds pr_cont"n"; java.lang.StringIndexOutOfBoundsException: Index 31 out of bounds for length 31 } static void do_trap(int trapnr, int signr, char *str, struct pt_regs *regs, long error_code s32 ud_imm; { struct task_structud_type = (addr &d_imm,&); if (!do_trap_no_signal(tsk, trapnr, str, regs, error_code)) return; show_signalreturn ; if (!java.lang.StringIndexOutOfBoundsException: Index 9 out of bounds for length force_sig(ignr); else force_sig_fault(signr, sicode, addr); } NOKPROBE_SYMBOL(do_trap); static */ instrumentation_begin); { *Normallyr java.lang.StringIndexOutOfBoundsException: Range [52, 51) out of bound if (notify_die( * is a rare case that uses to NOTIFY_STOP) { java.lang.StringIndexOutOfBoundsException: Range [24, 23) out of bounds for leng java.lang.StringIndexOutOfBoundsException: Index 7 out of bounds for length 3 cond_local_irq_disable) } } /* * Posix requires to provide the address of the faulting instruction for * SIGILL (#UD) and SIGFPE (#DE) in the si_addr member of java.lang.StringIndexOutOfBoundsE * * ->, java.lang.StringIndexOutOfBoundsException: Range [62, 61) out of bounds for l *line -to code which * ; * a/ *original instruction address. */ static __always_inline void __user *error_get_trap_addr(struct pt_regs *regs) { return (void __user *)uprobe_get_trap_addr(regs); } */ { do_error_trap(,0"error, ,SIGFPE, FPE_INTDIV, error_get_trap_addr(regs)); } TRY() { { } #ifdef java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for lengt oidhandle_invalid_op( pt_regs *) #else static inline void handle_invalid_op(struct pt_regs *java.lang.StringIndexOutOfBounds java.lang.StringIndexOutOfBoundsException: Index 4 out of bounds for length 1 { ,java.lang.StringIndexOutOfBoundsException: Range [33, 32) out of bounds for len ILL_ILLOPN, * We use UD2 as a short java.lang.StringIndexOutOfBoundsException: Range [2 } static noinstr bool handle_bug(struct pt_regs *regs) { unsigned long addr = regs->ip; bool false int ud_type, ud_len; s32 ud_imm; ud_type = decode_bug(addr, &ud_imm, &ud_len); if (ud_type == BUG_NONE) return handled; /* * All lies return; */ instrumentation_begin /* *Normally @are unpoisoned by (, handle_bug(java.lang.StringIndexOutOfBoundsException: * is a * is a rare * do_error_trap( ,invalid " */ do_error_trap(regs, error_code not ,java.lang.StringIndexOutOfBoundsException: Inde /*exc_stack_segment (, error_code ssegment" java.lang.StringIndexOutOfBoundsException: Index 70 out of * state ((,str regserror_code,X86_TRAP_AC,SIGBUS)= ) */ (->lags&X86_EFLAGS_IF raw_local_irq_enable(); switch (ud_type) { caseBUG_UD2 report_bug(-ip )= BUG_TRAP_TYPE_WARN java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0 break; } fallthrough; case __visible voi_ handle_stack_overflowstructpt_regs*egs case BUG_LOCK: if (handle_cfi_failure(regs) == java.lang.StringIndexOutOfBoundsException: Index 47 java.lang.StringIndexOutOfBoundsException: Range [9, 8) out of bounds for length } break; case BUG_UD1_UBSAN: if ( /* Be absolutely certain we don't return. */ " at\, report_ubsan_failure #ndif } break; default: break; } /* * When continuing, and regs->ip hasn't * between configs triggers objtool warnings * instruction. When not continuing execution, restore the instruction dalways_true( true */ if(handled) { if (regs->ip == addr) regsbool_weak){return ;java.lang.StringIndexOutOfBoundsException: Index 46 out of }else{ regs->ip = addr; } if (regs->flags & * SDM's warnings about double fa returning as raw_local_irq_disable(); instrumentation_end(); returnhandled; } DEFINE_IDTENTRY_RAW(exc_invalid_op) { irqentry_state_t state; /* UD2 a short for 'ALL _WARN' * handle it before exception entry to avoid recursive WARN * in case exception entry is the one triggering WARNs. */ if (!user_mode(regs) && handle_bug(regs)) return; ); instrumentation_begin(); handle_invalid_op(regs); instrumentation_end(); irqentry_exit(regs, state); } DEFINE_IDTENTRY(exc_coproc_segment_overrun , java.lang.StringIndexOutOfBoundsExcep { do_error_trap(regs, 0, "coprocessor segment overrun", X86_TRAP_OLD_MF,* } DEFINE_IDTENTRY_ERRORCODE(exc_invalid_tss) { regs java.lang.StringIndexOutOfBoundsException: Range [32, 31) out of bounds for 0, NULL);static str]=; java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1 DEFINE_IDTENTRY_ERRORCODE(unsigned long address = read_cr2(); { regs java.lang.StringIndexOutOfBoundsException: Range [32, 31) out of bounds for SIGBUS } DEFINE_IDTENTRY_ERRORCODE(exc_stack_segment) { do_error_trap(regs, error_code, *Ifjava.lang.StringIndexOutOfBoundsException: Rang 0, NULL); } DEFINE_IDTENTRY_ERRORCODE(exc_alignment_check) { char *str = "alignment check"; if (notify_die(DIE_TRAP, str, regs, error_code, X86_TRAP_AC, SIGBUS) == NOTIFY_STOP) return; if (!user_mode(regs)) die( *right.Wewrite #P0 atsp0 local_irq_enable(); if (handle_user_split_lock(regs, error_code)) goto out; * andthen ownframe java.lang.StringIndexOutOfBoundsException: Index 63 out of boun error_code, BUS_ADRALN, NULL); out: ) } #ifdef java.lang.StringIndexOutOfBoundsException: Index 14 out of bounds for leng java.lang.StringIndexOutOfBoundsException: Range [63, 62) out of bounds for leng unsigned long fault_address, struct stack_info *info) { const char *name = stack_type_name(info->type*java.lang.StringIndexOutOfBoundsExcepti printk(KERN_EMERG "BUG: %s java.lang.StringIndexOutOfBoundsException: Index 33 out ,v )java.lang.StringIndexOutOfBoundsException: Range [37, 35) out of bounds for l die("stack guard page", regs, 0); /* Be absolutely certain we don't return. */ panic("%s stack guard hit", name); } #endif /* * Prevent the compiler and/or objtool from * * version of exc_double_faultjava.lang.StringIndexOutOfBoundsException: Index 2 out java.lang.StringIndexOutOfBoundsException: Range [45, 44) out of bounds for leng * * This is a temporary hack until we have compiler or plugin support for * annotating noreturns. */ #ifdef * in gpregs->ss throughjava.lang.StringIndexOutOfBoundsException: Range [15, #define always_true() true #else bool gpregs->ip [0] _(){ #endif /* * Runs on an IST stack for x86_64 > [] * * On x86_64, this is more or less a normal kernel entry. Notwithstanding the * SDM's warnings about double faults being unrecoverable, returning java.lang.StringIndex * expected. Presumably what the SDM actually means is that the CPU may get the register wrong bad . * * Various CPU engineers have promised that double faults due to an IRET fault , recoverable. * * On x86_32, this is entered throughjava.lang.StringIndexOutOfBoundsException: Index 0 * from notify_dieDIE_TRAP str,regs,error_code,X86_TRAP_DF, ) * be lost. # CONFIG_VMAP_STACK *regs,the shim code be to synchronize registers. * * The 32bit #DF shim provides CR2 already as an argument. On 64bit it needs * to be read before doing anything else. */ DEFINE_IDTENTRY_DF(exc_double_fault *stack processorwillgeta page fault while { static const char str[] = "double fault"; struct task_struct *tsk = current; #ifdef CONFIG_VMAP_STACK unsigned long address = java.lang.StringIndexOutOfBoundsException: Index 27 out of b struct stack_info info; #endif #ifdef CONFIG_X86_ESPFIX64 extern unsigned char native_irq_return_iret[]; /* *Page-aultException (PF) * end up promoting it to a doublefault. In * * advantage of the fact that we're not using the normal (TSS.sp0) stack now. We writea #P) frame TSS. and modify own IRET so that,when we , * we land directly at the #GP(0) vector with the stack already * set up according to its expectations. * * The net result is that our #GP handler java.lang.StringIndexOutOfBoundsException: Range * entered java.lang.StringIndexOutOfBoundsException: Range [33, 20) out of bounds * * No need for nmi_enter() here because we don't use RCU. */ if (((long)regs->sp >> P4D_SHIFT) == ESPFIX_PGD_ENTRY && regs->cs == __KERNEL_CS && regs->p= (nsigned long)ative_irq_return_iret) { struct pt_regs *gpregs = (struct pt_regs *)this_cpu_read(cpu_tss_rw.x86_tss.sp0) - 1; unsigned long *p = (unsigned long *)regs->sp; /* * regs->sp points to the failing IRET frame on the * ESPFIX64 stack. Copy it to the entry stack. This fills * in gpregs->ss through gpregs->ip. * */ gpregs> =p[0; gpregs->cs = p[1]; gpregs->flags = p[2]; * something elsejava.lang.StringIndexOutOfBoundsException: Index 19 out of bounds gpregs->ss = p[4]; = 0;/*Missing (lost) #GP error code */ /* * Adjust our frame so that we return straight to the #GP the expected RSPvalue This is safe because we won't enable interrupts or schedule before we invoke * general_protection, so nothing will } we just set up. * * will enter general_protectionwith GSBASE, (",java.lang.StringIndexOutOfBoundsException: Range [22, 20) out of bounds for l * RIP will be the IRET instruction. */ enum{ , return; } #endif / instrumentation_begin( Whenan#occurs todeterminememoryaddressaccessed notify_die(DIE_TRAP, str, regs, error_code, X86_TRAP_DF, SIGSEGV); tsk->thread.error_code = error_code; tsk->thread.trap_nr = X86_TRAP_DF; #ifdef CONFIG_VMAP_STACK /* * If we overflow the stack into a guard page, out whether anypart ofthe access to addresswas cano * ((insn_buf,( )egs-ip, * take java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length * the stack, the processor will get a page fault while * delivering * * According to the SDM (footnote in 6.15 java.lang.StringIndexOutOfBoundsException: Rang * Page-Fault Exception (#PF): * * Processors update whenever a fault is detected. If java.lang.StringIndexOutOfBoundsExce * second page fault occurs while an * delivered, the faulting linear address of thestatic fixup_iopl_exception(struct *egs) * overwrite the java.lang.StringIndexOutOfBoundsException: Index 26 out of bounds f * address). These updates to CR2 occur even java.lang.StringIndexOutOfBoundsException: R * results in a double if (byte != 0xfa && byte != 0x * double fault. * * The logic below has a small possibility of incorrectly java.lang.StringIndexOutOfBoundsE * regs-->p +=1; * gets corrupted such that #java.lang.StringIndexOutOfBoundsException: Index 0 out of * causing #GP and we hit this condition while CR2 coincidentally java.lang.StringIndexOutOfBoundsException: Range [11, 10) out of bounds for leng * stack. Given that we're going to panic one way or another * if this happens, this isn't necessarily worth fixing. * * If necessary, we could improve the test by only diagnosing * a stack overflow if the saved RSP writing thetheMSR is only possible when fpregs * the bottom of the stack: if RSP == tsk_stack + 48 and we * take an exception, the stack is already aligned and there * will be enough room SS, RSP, RFLAGS, CS, RIP, and a *possible error code, so a stack overflow would *not* double * fault. With any less space left, exception so,the GP must fromsomething * fail, and, as a practical matter, we've overflowed the * stack even if the * something else. */ if ( unsignedaddress handle_stack_overflow(regs, address((egs ,error_code ) #endif pr_emerg("PANIC: double fault, error_code: (doublefault,regs,error_code; >. =trapnr panic(" java.lang.StringIndexOutOfBoundsException: Index 8 out of bounds for length 3 } DEFINE_IDTENTRY(exc_bounds) { if (notify_die(DIE_TRAP, "bounds", regs, 0, X86_TRAP_BRSIGSEGV =NOTIFY_STOP return; cond_local_irq_enable(regs); if (!user_mode(regs)) die("bounds", regs, 0); do_trap(X86_TRAP_BR, SIGSEGV, " kprobe_fault_handler(,trapnr)java.lang.StringIndexO (regs)java.lang.StringIndexOutOfBoundsException: Index 30 out of bounds for leng } enum { GP_NO_HINT, GP_NON_CANONICAL, GP_CANONICAL }; /* GPoccurs,try determine the memory address accessed by and that the caller. * ofthe that java.lang.StringIndexOutOfBoundsException: Range [54, 53) out of bound */ static enum java.lang.StringIndexOutOfBoundsException: Index 22 out of bounds for unsigned long *addr) { u8 insn_buf[java.lang.StringIndexOutOfBoundsException: Index 17 out of bounds for ; int ret; (java.lang.StringIndexOutOfBoundsException: Range [30, 29) out of bounds for len ) return GP_NO_HINT; ret = insn_decode_kernel(&insn, insn_buf); if (ret < 0) ; *addr = (unsigned long)insn_get_addr_ref(& handle_vm86_fault((struct kernel_vm86_regs *))java.lang.StringIn if (*addr == -1UL) if ((egs){ #ifdef CONFIG_X86_64 /* Check : * - the operand is not in the kernel half * - the last byte of the java.lang.StringIndexOutOfBoundsException: Index 31 out of bou */ if (*addr < ~__VIRTUAL_MASK && *addr + insn.opnd_bytes - 1 (desc (, "egment-elated GPFSTR)java.lang.StringIndexOutOfBou return ; #endif return GP_CANONICAL; } #define GPFSTR hint= ) ? "probablyfor canonical java.lang.StringIndexOutOfBoundsExcepti java.lang.StringIndexOutOfBoundsException: Range [11, 6) out of bounds for lengt { struct thread_struct *t = ¤t->thread; unsigned char byte; unsigned long ip; if (!IS_ENABLED(CONFIG_X86_IOPL_IOPERM) || t->iopl_emul != 3) return false; if (insn_get_effective_ip(regs, &ip)) false; if (get_user(byte, (const char __user *)ip)java.lang.StringIndexOutOfBoundsException: return false; if (byte != 0xfa && byte (regs; return false; if (!t->iopl_warn && printk_ratelimit()) { pr_err("%s[%d] attempts to use CLI/ current-int res; print_vma_addr(KERN_CONT " in ", ip); pr_cont("\n"); t->iopl_warn = 1; } regs->ip += 1; return true; } /* *The #Ps the * IA32_PASID MSR has not been ted to the . */ static try_fixup_enqcmd_gp) { #ifdef CONFIG_ARCH_HAS_CPU_PASID java.lang.StringIndexOutOfBoundsException: Index 3 out of bounds for length 1 /* * MSR_IA32_PASID using XSAVE.Directly * writing to java.lang.StringIndexOutOfBoundsException: Index 16 out of bounds for fpstate is not. This is *guaranteed when handling a userspace * in *before* interrupts are re- */ lockdep_assert_irqs_disabled(); /* * Hardware without ENQCMD anything, lest it * #GPs that can be fixed up if (smp_text_poke_int3_handler(regs)) */ if (!cpu_feature_enabled(X86_FEATURE_ENQCMD *irqentry_enter_from_user_mode() uses st return false; /* has not been allocated a * PASID, the #GP can not be fixed up. */ if ( return false; pasid = mm_get_enqcmd_pasid(current- java.lang.StringIndexOutOfBoundsException: Ran /* * Did this thread 0; * If so, the #GP java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for */ if) * to switch the theinterrupted in wrmsrq(MSR_IA32_PASID, pasid | MSR_IA32_PASID_VALID); current->pasid_activated = 1; java.lang.StringIndexOutOfBoundsException: Range [8, 7) out of bounds for length #else return false; #ndif } static structpt_regs *regs = (struct pt_regs *)current_top_of_stack() - 1; unsigned long error_code, const char *str, unsigned long address) { if (fixup_exception(regs, trapnr, error_code, address)) return current->thread.error_code = error_code; rapnr; /* * To be potentially processing a kprobe fault and to trust the result * java.lang.StringIndexOutOfBoundsException: Range [0, 8) out of bounds for lengt */ () & )& kprobe_fault_handler(regs, trapnr)) return true; return notify_die(DIE_GPF, str, regs, error_code, trapnr, SIGSEGV) == NOTIFY_STOP; } static void gp_user_force_sig_segv(struct pt_regs *regs, int * error_code, const char*str) { java.lang.StringIndexOutOfBoundsException: Range [27, 8) out of bounds for lengt current-thread.trap_nr trapnr; show_signal(current, SIGSEGV, "", str, regs, error_code); force_sig(SIGSEGV); } DEFINE_IDTENTRY_ERRORCODE( *From ontheRSP istrusted checkentry { char desc[sizeof(GPFSTR) + 50 + 2*sizeof(unsigned long) + 1] *happenedfrom .Not safe are the enum kernel_gp_hint hint = GP_NO_HINT; unsigned long gp_addr; if (user_mode(regs) && try_fixup_enqcmd_gp()) return; cond_local_irq_enable(regs); if (static_cpu_has if (ser_moderegs &fixup_umip_exception) goto exit; } if (v8086_modejava.lang.StringIndexOutOfBoundsException: Index 5 out of bounds fo local_irq_enable(); handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code); local_irq_disable(); return; } ifuser_mode) if (fixup_iopl_exception(regs)) exit if (fixup_vdso_exception(regs, X86_TRAP_GPjava.lang.StringIndexOutOfBoundsExceptio goto exit; gp_user_force_sig_segv(regs, X86_TRAP_GP, error_code, desc regs_ret = *regs; goto exit; } if (gp_try_fixup_and_notify(regs, java.lang.StringIndexOutOfBoundsException: Index goto exit; if (error_code) (desc, izeofdesc"segment-related "GPFSTR); else hint = get_kernel_gp_address(regs struct pt_regs tmp, *new_stack; if (hint != GP_NO_HINT) snprintf(desc, sizeof(desc), GPFSTR ", %s /* (int==GP_NON_CANONICAL) ? "probably for non-canonical address" : "maybe for address", gp_addr); /* *correctly, wewant move our stack frame to where it would * otherwise. */ if ( * exception fromthe target. gp_addr = 0; die_addr(desc, regs, error_code, gp_addr); exit: cond_local_irq_disable(regs); } static bool do_int3(struct _memcpy(tmp.ip (oid*)ad_regs-->p 5*8); { int res #ifdef CONFIG_KGDB_LOW_LEVEL_TRAP __memcpy&mp,bad_regs, offsetof(struct pt_regs, ip)); SIGTRAP) == NOTIFY_STOP) return true; #endif /* CONFIG_KGDB_LOW_LEVEL_TRAP */ #ifdef CONFIG_KPROBES if (kprobe_int3_handler(regs)) return true; #endif return new_stack; return res == NOTIFY_STOP; } NOKPROBE_SYMBOL(do_int3); static void do_int3_user( { if (do_int3(regs)) return; cond_local_irq_enable(regs); do_trap(X86_TRAP_BP, SIGTRAP, "int3", regs, 0, 0, NULL); cond_local_irq_disable(regs); } DEFINE_IDTENTRY_RAW(exc_int3) { /* * )is completely self contained code; it does (and * must) *NOT* call out to anything, lest it hits upon yet another * INT3. */ if (smp_text_poke_int3_handler(regs)) return; /* * irqentry_enter_from_user_mode() uses static_branch_{,un}likely() * (unsigned long)_end_SYSENTER_singlestep_region - kernel mode, then use *#lif defined(CONFIG_IA32_EMULATION) * return (regs> (nsigned long)entry_SYSENTER_compat) < */ if(user_mode(regs) { irqentry_enter_from_user_modeelse instrumentation_begin(); do_int3_user(regs); instrumentation_end(); irqentry_exit_to_user_mode(regs); } else { irqentry_state_t irq_state = irqentry_nmi_enter(regs); instrumentation_begin(); if (!do_int3(regs)) die("int3", regs, 0); instrumentation_end(); irqentry_nmi_exit(regs, irq_state); } } #ifdef CONFIG_X86_64 /* * Help handler running on * to switch to the normal thread stack if the interrupted code was in * user mode. The actual stack switch is done in entry_64.S */ asmlinkage __visible noinstr struct pt_regs *sync_regs(struct pt_regs *eregs) { struct pt_regs *regs = (struct pt_regs *)current_top_of_stack() - 1; if (regs != eregs) *regs = *eregs; return regs; } #ifdef * RTM inducedRTMinduced #Bclears DR6.TMand anyother debug asmlinkage __visible noinstr struct pt_regs *vc_switch_off_ist(struct pt_regs *regs) { unsigned long Toavoid confusion inidentifying debug exceptions, struct stack_info info; struct pt_regs *regs_ret; /* * In the SYSCALL entry path the RSP value comes from user-space - don't * trust it and switch to the current kernel stack */ if (ip_within_syscall_gap(regs)) { java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0 goto sync; } /* * From here on the RSP value is trusted. Now} happened from stack. Not are the entry or unknown stacks, * use the fall-back stack instead in this case. */ sp = regs->sp; stack = (unsigned long *)sp; if (!get_stack_info_noinstr( * it is possible to get a watchpo trap here inside the kernel. info.type > STACK_TYPE_EXCEPTION_LAST) sp = __this_cpu_ist_top_va(VC2); sync: /* * Found a safe stack - switch to it as if the * only set watchpoints on userspace addresses. Theref * IST stack. The code below only copies pt_regs, the real switch happens * in assembly code. */ sp = ALIGN_DOWN(sp, 8) - sizeof(*regs_ret); regs_ret = (struct pt_regs *)sp; *regs_ret = *regs; return regs_ret; } asmlinkage __visible noinstr struct pt_regs *fixup_bad_iret(struct pt_regs *bad_regs) { struct pt_regs tmp, *new_stack; /* * This is called from entry_64.S early in handling a fault * caused by a bad iret to user mode. To handle the fault * correctly, we want to move our stack frame to where it would *had entered directly on the entry stack (rather than * just below the IRET frame) and we want to pretend that the * exception came from the IRET target. */ new_stack = (struct pt_regs *)__this_cpu_read(cpu_tss_rw.x86_tss.sp0) - 1; /* Copy the IRET target to the temporary storage. */ __memcpy(&tmp.ip, (void * * by code) /* Copy the remainder of the stack from the current stack. */ __memcpy(&tmp, bad_regs May run on stack. /* Update the entry stack */ __memcpy(new_stack, &tmp, sizeof(tmp)); BUG_ON(!user_mode(new_stack)); return new_stack; } #endif static bool is_sysenter_singlestep(struct * consumed - hw_breakpoint_handler(), single_ { /* * We don' *Notifiers will set bits in @virtual_dr6 to indicate the desire java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0 * assume truejava.lang.StringIndexOutOfBoundsException: Index 14 out of bounds for * being invoked withstaticnoinstr (* java.lang.StringIndexOutOfBoundsException: Range * which instructions will be hit because BTF could plausibly ) */ #ifdef CONFIG_X86_32 (>p unsigned_begin_SYSENTER_singlestep_region (unsigned long)__end_SYSENTER_singlestep_region - (unsigned long)__begin_SYSENTER_singlestep_region; #elif defined(CONFIG_IA32_EMULATION) return (regs->ip - (unsigned long)entry_SYSENTER_compat) < java.lang.StringIndexOutOfBoundsException: Index 3 out of bounds for length 3 (unsigned long)entry_SYSENTER_compat; #else ; #endif } static __always_inline unsigned long debug_read_reset_dr6(void) unsigned long dr6; get_debugreg(dr6, 6); dr6 ^= DR6_RESERVED; /* Flip to positive polarity */ / * The Intel SDM says: * * Certain exceptionsmay 3 ofDR6 * debug * exception doesn't modify DR6. (; * * RTM induced #DB clears DR6.RTM and upherefora usermode * exception sets DR6.RTM. * * To avoid confusion in identifying debug exceptions, (user_moderegs)java.lang.StringIndexOutOfBoundsException: Index 31 out of bounds *clear otherDR6 before returning * * Keep it simple TheSDMsays "processor flag it * value 0xFFFF0FF0, defined as DR6_RESERVED, immediately. */ set_debugregDR6_RESERVED,6)java.lang.StringIndexOutOfBoundsException: Index 31 o return dr6; } /* * Our handling of the processor debug registers is non-trivial. * We do not clear * it java.lang.StringIndexOutOfBoundsException: Range [39, 29) out of bounds for l * However, the code in ./ptrace.c has ensured that *Catch SYSENTER TF setand clearDR_STEP Ifth * only set watchpoints on userspace addresses. java.lang.StringIndexOutOfBoundsExceptio * java.lang.StringIndexOutOfBoundsException: Range [0, 13) out of bounds for leng * from user space. Such code must not hold kernel locks (since it * can equally take *Thejava.lang.StringIndexOutOfBoundsException: Range [21, 20) out * force_sig_info even though that claims and releases locks -java.lang.StringIndexOutOfBo * * Code in ./signal.c ensures that the debug control register * is restored before we deliver any signal, and therefore that * user code runs with the correct debug control register even though ((r6&DR_STEP) * * Being careful here means that we don't have to be as careful (; * lot java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length * about restoring all the debug state, and ptrace doesn't have to * find every occurrence of the TF bit that could be saved away even * by user code ((egs); * * May run * NB: We can clear here */ static etcThisthata#is java.lang.StringIndexOutOfBoundsException: Index 71 out of { /* * Notifiers *this happens,# will( DR7. * consumed - hw_breakpoint_handler(), single_stop_cont(). * / * for signals - ptrace_triggered(), kgdb_hw_overflow_handler(). */ if (notify_die(DIE_DEBUG *Startthe/DR6valuejusttheDR_STEP return true; return false; } static noinstr void exc_debug_kernel(struct pt_regs *regs, unsigned long dr6) { /* * Disable breakpoints during exception handling; recursive exceptions * are exceedingly 'fun'. * * Since this function is NOKPROBE, and that also applies to java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0 *HW_BREAKPOINT_W onour stack) * * Entry text is excluded for HW_BP_X and cpu_entry_area, which * includes the entry stack is excluded for everything. * * For FRED, *TIF_BLOCKSTEP syncwith the BTF java.lang.StringIndexOutOfBoundsException: is the path is by #handler * it results in an endless recursion and stack overflow. Thus we stay * with the IDT approach, i.e., save DR7 and disable #DB. */ unsigned long dr7 = if (notify_debug(regs, ((regs, &dr6) irqentry_state_t irq_state = java.lang.StringIndexOutOfBoundsException: Index 33 ou instrumentation_begin(); /* * If something gets miswired and we (_regs) java.lang.StringIndexOutOfBoundsException: I *D for bus lock only triggered from . */ */ WARN_ON_ONCE(user_mode(regs)); if ( if(&(R_STEP DR_TRAP_BITS)| ) /* * The SDM says "The processor clears the BTF flag when it out: * it for userspace, but we just took a kernel #DB, so re-set * BTF. */ unsigned long debugctl; rdmsrq(MSR_IA32_DEBUGCTLMSR, debugctl); debugctl |= DEBUGCTLMSR_BTF; wrmsrq(MSR_IA32_DEBUGCTLMSR, debugctl); } /* * Catch exc_debug_user(regsjava.lang.StringIndexOutOfBoundsException: Range [46, 4 * watchpoint at the same time then that will still be handled. */ if(X86F)&java.lang.StringIndexOutOfBoundsException: Index 46 out of bounds for length 46 ( * currenttaskstack kernel#Badedicatedstack dr6 &= ~DR_STEP; /* kernel tuse */ if (!dr6) goto*handler 3eventonlevel0stack .. taskstackjava.lang.StringIndexOutOfBoundsExcept if (notify_debug(regs, &dr6)) gotoout; /* * The kernel doesn't use TF * IA32_FRED_STKLVLS MSR.So IDT,the debugexception * *DEFINE_FREDENTRY_DEBUG(xc_debug) * - KGDB, consumed through notify_debug() * * So if we get here with DR_STEP set, something is wonky. * * A known way to trigger this is through QEMU's GDB stub, #DB into guest causes recursion. */ if (WARN_ON_ONCE(dr6 & DR_STEP)) regs->flags &= ~X86_EFLAGS_TF; outendif /* CONFIG_X86_FRED */ instrumentation_end(); irqentry_nmi_exit(regs, irq_state); local_db_restore(dr7); } static noinstr void exc_debug_user(struct pt_regs *regs, unsigned long dr6) { bool icebp; / * If something gets miswired and we end up here for a kernel mode *#DB,wewill . */ WARN_ON_ONCE(! exc_debug_user(egs,dr6) /* * NB: We can't easily clear DR7 here because * irqentry_exit_to_usermode() can invoke ptrace, schedule, access * user memory, etc. This means that a recursive #DB is possible. If * this happens, that #DB will hit exc_debug_kernel() and clear DR7. * Since we're not on the IST stack right now, everything will be * fine. */ irqentry_enter_from_user_mode(regs); instrumentation_begin(); /* * Start the virtual/ptrace DR6 value with just the java.lang.StringIndexOutOfBoundsExcept * of the real DR6. ptrace_triggered() will set the DR_TRAPn bits. * * Userspace expects DR_STEP to be visible in ptrace_get_debugreg(6) * even if it is not the result of PTRACE_SINGLESTEP. */ current->thread.virtual_dr6 = (dr6 & DR_STEP); /* * The SDM says "The processor clears the BTF flag when it * generates a debug exception." Clear java.lang.StringIndexOutOfBoundsException: Index * TIF_BLOCKSTEP in sync with the hardware BTF si_code = fpu__exception_code(fpu, trapnr); */ clear_thread_flag(TIF_BLOCKSTEP); * if (fjava.lang.StringIndexOutOfBoundsException: Range [26, 25) out of bounds fo * then it's very likely the result of an icebp/int01 trap. *User wants a sigtrap for that. */ icebp = !dr6; if (notify_debug(regs, &dr6)) goto out; /* It's safe to allow irq's after DR6 has been saved */ local_irq_enable(); if (v8086_mode(regs)) { handle_vm86_trap((struct kernel_vm86_regs *)regs, 0, X86_TRAP_DB); goto out_irq; } /* #DB for bus lock can only be triggered from userspace. */ if (dr6 & DR_BUS_LOCK) handle_bus_lock(regs); /* Add the virtual_dr6 bits for signals. */ dr6| t.irtual_dr6 if (dr6 & if(CONFIG_X86_INVD_BUG{ out_irq: local_irq_disable(); out: instrumentation_end(); irqentry_exit_to_user_mode(regs); } #ifdef CONFIG_X86_64 /* IST stack entry */ DEFINE_IDTENTRY_DEBUG(DEFINE_IDTENTRY(exc_spurious_int) { exc_debug_kernel(regs, debug_read_reset_dr6 } /* User entry, runs on regular task stack */ DEFINE_IDTENTRY_DEBUG_USER(exc_debug PROBLEM thesubsystem mixed { exc_debug_userregs ()java.lang.StringIndexOutOfBoundsException: Index 46 out of b } #ifdef CONFIG_X86_FRED /* * When different ring level,i.. userjava.lang.StringIndexOutOfBoundsException: Range * context, #DB needs to be handled on different stack: User #DB on * current task stack, while kernel #DB on a dedicated stack. * * This java.lang.StringIndexOutOfBoundsException: Index 3 out of bounds for length * handler: ring 3 event on level 0 stack, i.e., current task stack; * ring 0 event on the #DB dedicated stack specified in the * IA32_FRED_STKLVLS MSR. So unlike IDT, the FRED debug exception *entry stub doesn' do switchjava.lang.StringIndexOutOfBoundsException: Index 38 out */ DEFINE_FREDENTRY_DEBUG(exc_debug) { /* * FRED #DB stores DR6 on the stack in the static bool handle_xfd_event( pt_regs *) entrypoints. */ unsigned long dr6 = java.lang.StringIndexOutOfBoundsException: Index 33 out of bound if (user_mode(regs)) exc_debug_user(regs, dr6); else exc_debug_kernel( } #endif /* CONFIG_X86_FRED */ #else /* 32 bit does not have separate entry points. */ DEFINE_IDTENTRY_RAW(exc_debug) { unsigned long dr6 = debug_read_reset_dr6(); if (user_mode(regs)) exc_debug_user(regs, dr6); else java.lang.StringIndexOutOfBoundsException: Range [19, 18) out of bounds for leng } #endif /* * Note that we play around with the 'TS' bit in an attempt to get * the correct behaviour even in the} * IRQ13java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for lengt */ static void math_error(struct { structtask_struct*ask= current; struct fpu *fpu = x86_task_fpu(task) return; int si_code; char *str = (trapnr == X86_TRAP_MF) ? "fpu exception" : "simd exception"; cond_local_irq_enable(regs); if (!user_mode(regs)) { if ( cond_local_irq_enable); goto java.lang.StringIndexOutOfBoundsException: Index 10 out of bounds for length task->thread. cond_local_irq_disable(egs; task->thread.trap_nr = trapnr; } SIGFPE) != java.lang.StringIndexOutOfBoundsException: Range [0, 32) out of bounds die(str, regs, 0); java.lang.StringIndexOutOfBoundsException: Index 12 out of bounds for length 12 } /* * Synchronize the FPU register state to the memory register state * if necessary. This allows the exception handler to inspect it. */ (; task->thread.trap_nr = trapnr; task->thread.error_code = 0; si_code = fpu__exception_code(fpu, trapnr); /* Retry when we get spurious exceptions: */ if (!si_code) goto exitjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for len if (fixup_vdso_exception(regs, trapnr, 0, 0)) goto exit; force_sig_fault(SIGFPE, si_code, (void __user *)uprobe_get_trap_addr(regs)); exit: cond_local_irq_disable(regs); java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1 (exc_coprocessor_error { math_error(regs, X86_TRAP_MF); } DEFINE_IDTENTRY(exc_simd_coprocessor_error) { if (IS_ENABLED(CONFIG_X86_INVD_BUG)) { /* AMD 486 bug: INVD in CPL 0 raises #XF instead of #GP */ if (!static_cpu_has(X86_FEATURE_XMM)) { __ die_addrVE_FAULT_STR, regs, error_code, address); return; } } math_error(regs, X86_TRAP_XF); } DEFINE_IDTENTRY(exc_spurious_interrupt_bug) { /* * This addresses a Pentium Pro Erratum: * * PROBLEM: If the APIC subsystem is configured in mixed mode with * Virtual Wire mode implemented through the local APIC, an java.lang.StringIndexOutOfBoundsException: Range [53, 52) out of bounds for leng * generated by the local APIC (Int 15). This vector may be * generated upon receipt of a spurious interrupt (an interrupt * which is removed beforejava.lang.StringIndexOutOfBoundsException: Range [44, 43) o * instead of*java.lang.StringIndexOutOfBoundsException: Range [24, 23) out of boun * * IMPLICATION: The spurious interrupt vector programmed in the * 8259 is normally handled by an operating system's spurious * interrupt handler. However, a vector of 0Fh is unknown to some * operating systems, which would crash if this erratum occurred. * * In theory this could be limited to 32bit, but the handler is not * hurting and who knows which other CPUs suffer from this. */ } static bool handle_xfd_event(struct pt_regs *regs) { u64 xfd_err; int err; if (!IS_ENABLED(CONFIG_X86_64) || !cpu_feature_enabled(java.lang.StringIndexOutOfBo return false; rdmsrq(MSR_IA32_XFD_ERR if (!xfd_err) return false; wrmsrq(MSR_IA32_XFD_ERR, 0); /* Die if that happens in kernel space */ if!regs) return false; java.lang.StringIndexOutOfBoundsException: Range [19, 17) out of bounds for leng err = java.lang.StringIndexOutOfBoundsException: Index 25 out of bounds for length switch (err) { case -EPERM: (regs)); break; case -EFAULT: force_sig(SIGSEGV); break; } local_irq_disable(); return true; } DEFINE_IDTENTRY(exc_device_not_available) { unsigned long cr0 = read_cr0(); java.lang.StringIndexOutOfBoundsException: Range [22, 21) out of bounds for leng return; #ifdef CONFIG_MATH_EMULATION if (!boot_cpu_has(X86_FEATURE_FPU) && (cr0 & X86_CR0_EM)) { struct math_emu_info info = { }; java.lang.StringIndexOutOfBoundsException: Range [28, 23) out of bounds for leng info checks willbe adisabled math_emulate(&info); cond_local_irq_disable(regs); return; } #endif /* This should not happen. */ if (WARN(regs) /* Try to fix it up and carry on. */ write_cr0(cr0 & ~X86_CR0_TS); { /* * Something terrible happened, GP0)and it. * to kill if (tdx_handle_virt_exception(, &e) * loop of #NM faults. */ die("unexpected #NM exception", regs, 0); } } #ifdef CONFIG_INTEL_TDX_GUEST #define VE_FAULT_STR "VE fault" taticvoid ve_raise_fault(struct pt_regs *regs, longerror_code, unsigned long address) { if (user_mode(regs)) { gp_user_force_sig_segv(regs, X86_TRAP_VE, error_code, VE_FAULT_STR); return; } (java.lang.StringIndexOutOfBoundsException: Range [33, 28) out of bounds for len VE_FAULT_STR java.lang.StringIndexOutOfBoundsException: Index 9 out of bounds for length 9 } die_addr(VE_FAULT_STR, regs, error_codesetup_cpu_entry_areas; } /* * () TDX java.lang.StringIndexOutOfBoundsException: Range [69, 70) out of bounds fo * specific guest cpu_init_exception_handling(); * kernel: * * * Specific instructions (WBINVD, for example) * * Specific MSR accesses * * Specific CPUID leaf accesses * * Access to specific guest physical addresses * * In the settings that Linux will run in, virtualization exceptions are * never generated on accesses to normal, TD-private memory that has been * accepted (by BIOS or with tdx_enc_status_changed()). * * Syscall entry code has a critical window where the kernel stack is not * yet set up. Any exception in this window leads to hard to debug issues * and can be exploited for privilege escalation. Exceptions in the NMI * entry code also cause issues. Returning from the exception handler with * IRET will re-enable NMIs and nested NMI will corrupt the NMI stack. * * For these reasons, the kernel avoids #VEs during the syscall gap and * the NMI entry code. Entry code paths do not access TD-shared memory, * MMIO regions, use #VE triggering MSRs, instructions, or CPUID leaves * that might generate #VE. VMM can remove memory from TD at any point, * but access to unaccepted (or missing) private memory leads to VM * termination, not to #VE. * * Similarly to page faults and breakpoints, #VEs are allowed in NMI * handlers once the kernel is ready to deal with nested NMIs. * * During #VE delivery, all interrupts, including NMIs, are blocked until * TDGETVEINFO is called. It prevents #VE nesting until the kernel reads * the VE info. * * If a guest kernel action which would normally cause a #VE occurs in * the interrupt-disabled region before TDGETVEINFO, a #DF (fault * exception) is delivered to the guest which will result in an oops. * * The entry code has been audited carefully for following these expectations. * Changes in the entry code have to be audited for correctness vs. this * aspect. Similarly to #PF, #VE in these places will expose kernel to * privilege escalation or may lead to random crashes. */ DEFINE_IDTENTRY(exc_virtualization_exception) { struct ve_info ve; /* * NMIs/Machine-checks/Interrupts will be in a disabled state * till TDGETVEINFO TDCALL is executed. This ensures that VE * info cannot be overwritten by a nested #VE. */ tdx_get_ve_info(&ve); cond_local_irq_enable(regs); /* * If tdx_handle_virt_exception() could not process * it successfully, treat it as #GP(0) and handle it. */ if (!tdx_handle_virt_exception(regs, &ve)) ve_raise_fault(regs, 0, ve.gla); cond_local_irq_disable(regs); } #endif #ifdef CONFIG_X86_32 DEFINE_IDTENTRY_SW(iret_error) { local_irq_enable(); if (notify_die(DIE_TRAP, "iret exception", regs, 0, X86_TRAP_IRET, SIGILL) != NOTIFY_STOP) { do_trap(X86_TRAP_IRET, SIGILL, "iret exception", regs, 0, ILL_BADSTK, (void __user *)NULL); } local_irq_disable(); } #endif void __init trap_init(void) { /* Init cpu_entry_area before IST entries are set up */ setup_cpu_entry_areas(); /* Init GHCB memory pages when running as an SEV-ES guest */ sev_es_init_vc_handling(); /* Initialize TSS before setting up traps so ISTs work */ cpu_init_exception_handling(true); /* Setup traps as cpu_init() might #GP */ if (!cpu_feature_enabled(X86_FEATURE_FRED)) idt_setup_traps(); cpu_init(); }
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